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Thermal Mapping of Power Semiconductors in H-Bridge Circuit^{ †}

^{1}

^{2}

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^{†}

## Abstract

**:**

## 1. Introduction

## 2. Operation Principle of H-Bridge Circuit

_{f}.

_{lo}is in the opposite direction to the reference voltage U

_{te}. The amplitude of the load voltage U

_{lo}becomes slightly higher and lags the reference voltage with φ

_{u}. Similarly, in the case of the rectifier mode, the loading current is in phase with the reference voltage, which results in the leading load voltage.

_{1}and T

_{4}conduct depending on the direction of loading current. Besides, the inductor current increases in stages 2 and 4, but it maintains the same in the rest of the period. Similarly, the loading current flowing through the power devices during rectifier mode is presented in Figure 2b. At different directions of the loading current, the conducting devices change to the complementary switches at all stages.

_{1}and T

_{4}are primarily conducting. However, in the case of the rectifier mode, the diodes D

_{1}and D

_{4}conduct mainly. Consequently, the conduction loss is dominated by the IGBT in the inverter mode but by the diode in the rectifier mode.

## 3. Loss Dissipation and Junction Temperature of Power Devices

#### 3.1. Loss Dissipation

_{1}and lower diode D

_{4}are selected as an example. Under the steady-state operation, the loading current flowing through the upper IGBT T

_{1}and lower diode D

_{4}is described in Figure 3. It is noted that I

_{lo_T}and I

_{lo_D}indicate the loading current through the IGBT and diode, P

_{con_T}and P

_{con_D}indicate the power loss of the IGBT and diode, and E

_{sw_T}and E

_{sw_D}indicate the switching energy for the IGBT and diode, respectively. Due to the direction of the loading current, both the IGBT and the diode conducts only half of the fundamental period T

_{f}. Within a switching period T

_{sw}, as the loading current commutes from D

_{4}to T

_{1}once, the conduction losses and switching losses are generated in both the IGBT and the diode. Due to the fact that the sinusoidal loading current induces different dissipations in every switching period, the average power loss can be calculated, which is accumulated from each switching pattern during a fundamental period.

_{con_T}can be calculated as,

_{f}denotes the fundamental period, V

_{CE}denotes the on-state voltage of the IGBT, i

_{lo}denotes the loading current, and d denotes the duty cycle.

_{u}, and making a linear approximation of the IGBT forward characteristics (initial on-state voltage drop V

_{CE0}and equivalent resistor r

_{CE}), the conduction loss of the IGBT can be deduced by [19],

_{m}denotes the amplitude of the loading current, and M denotes the modulation index, which equals the converter output voltage over half of the dc-bus voltage.

_{con_D}can be calculated as,

_{F}denotes the on-state voltage of the freewheeling diode. It can be noted that the lower diode conducts if its driving signal is high.

_{F0}and equivalent resistor r

_{F}), the conduction loss of the diode can be deduced by,

_{on}and turn-off energies E

_{off}of the IGBT can be described as a polynomial function [20], where a

_{T}denotes the zero-polynomial term, b

_{T}denotes the linear term, and c

_{T}denotes the quadratic term,

_{swT}can be calculated within a fundamental period,

_{sw}denotes the switching frequency, V

_{dc}denotes dc-bus voltage, and V

_{dc}* denotes the dc-bus voltage under the testing condition.

_{rr}can be described as a polynomial function,

_{swD}can be deduced as follows,

#### 3.2. Junction Temperaute Estimation

_{jm}can be calculated as,

_{j}can be calculated as [19],

_{thJC}, R

_{thCH}denote the thermal resistance from the junction to case of the power module, and the TIM, respectively. Subscripts T and D denote the IGBT and the freewheeling diode, where subscripts i denotes a four-layer Foster structure for the power module. P is the power loss of each power semiconductor, and T

_{H}is the heatsink temperature. In Equation (11), t

_{p}denotes the fundamental period of the current, t

_{on}denotes a half of fundamental period, and τ denotes the thermal time constant of each Foster layer.

## 4. Thermal Stresses of Power Devices at Various Loading Conditions

#### 4.1. Dominating Factors for Device Loading

#### 4.2. Simulation and Experimental Verification

## 5. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

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**Figure 1.**Configuration of H-bridge circuit and phasor diagram between test leg and load leg. (

**a**) Single-phase H-bridge circuit. (

**b**) Phasor diagram in the case of inverter mode. (

**c**) Phasor diagram in the case of rectifier mode.

**Figure 2.**Activated power switches at various operation modes. (

**a**) Inverter mode. (

**b**) Rectifier mode.

**Figure 3.**Schematic waveforms of the loss calculation under the steady-state operation. (Note: T

_{f}denotes the fundamental period, and T

_{sw}denotes the switching period.).

**Figure 4.**Thermal model of power semiconductor for thermal cycling caused by the fundamental frequency.

**Figure 5.**Impacts of various power factors (PFs) on power module. (

**a**) Loss dissipation. (

**b**) Mean junction temperature. (

**c**) Junction temperature swing.

**Figure 6.**Impact of various loading currents (I

_{lo}) on power module. (

**a**) Loss dissipation. (

**b**) Mean junction temperature. (

**c**) Junction temperature swing.

**Figure 7.**Impact of various fundamental frequencies (f

_{1}) on power module. (

**a**) Loss dissipation. (

**b**) Mean junction temperature. (

**c**) Junction temperature swing.

**Figure 8.**Impacts of various switching frequencies (f

_{sw}) on power module. (

**a**) Loss dissipation. (

**b**) Mean junction temperature. (

**c**) Junction temperature swing.

**Figure 9.**Loss dissipation and junction temperature of IGBT and diode with fundamental frequency of 10 Hz and switching frequency of 10 kHz. (

**a**) Inverter mode. (

**b**) Rectifier mode.

**Figure 10.**Experimental setup of H-bridge circuit. (

**a**) Control block diagram. (

**b**) Photo of experimental setup.

**Figure 11.**Experimental results in terms of the loading current and junction temperature of power semiconductors. (

**a**) Inverter mode. (

**b**) Rectifier mode.

Rating of Power Device | 1200 V/50 A |

Filter inductor L_{f} | 300 μH |

DC-link voltage V_{dc} | 400 V |

Rated power factor PF | −1 |

Rated peak current I_{lo} | 20 A |

Rated fundamental frequency f_{1} | 10 Hz |

Rated switching frequency f_{sw} | 10 kHz |

**Table 2.**Parameters Used in Loss Model and Thermal Model of Power Semiconductors [23].

IGBT | Diode | ||
---|---|---|---|

Loss model | V_{CE} @ 50 A, T_{j} = 150 °C (V) | 2.25 | / |

V_{F} @ 50 A, T_{j} = 150 °C (V) | / | 1.65 | |

E_{on} @ 50 A, T_{j} = 150 °C (mJ) | 7.7 | / | |

E_{off} @ 50 A, T_{j} = 150 °C (mJ) | 4.8 | / | |

E_{rr} @ 50 A, T_{j} = 150 °C (mJ) | / | 3.7 | |

Thermal model | Fourth order thermal resistance R_{th} (°C/kW) | 0.0324 | 0.0486 |

0.1782 | 0.2673 | ||

0.1728 | 0.2592 | ||

0.1566 | 0.2349 | ||

Fourth order thermal time constant τ_{th} (s) | 0.01 | 0.01 | |

0.02 | 0.02 | ||

0.05 | 0.05 | ||

0.1 | 0.1 |

IGBT | Diode | ||||||
---|---|---|---|---|---|---|---|

Sim. | Exp. | Error | Sim. | Exp. | Error | ||

Inverter mode | Junction temperature swing (°C) | 53.8~67.7 | 43.9~46.9 | / | 50.1~56.1 | 40.8~41.3 | / |

Mean temperature (°C) | 60.8 | 45.4 | 15.4 | 53.1 | 41.1 | 12.0 | |

Temperature deviation (°C) | 13.9 | 3.0 | 10.9 | 6.0 | 0.5 | 5.5 | |

Rectifier mode | Junction temperature swing (°C) | 52.2~60.2 | 42.8~45.2 | / | 53.0~63.5 | 41.2~42.2 | / |

Mean temperature (°C) | 57.2 | 44.0 | 13.2 | 58.3 | 41.7 | 16.6 | |

Temperature deviation (°C) | 10.0 | 2.4 | 7.6 | 10.5 | 1.0 | 9.5 |

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## Share and Cite

**MDPI and ACS Style**

Zhou, D.; Peng, Y.; Iannuzzo, F.; Hartmann, M.; Blaabjerg, F. Thermal Mapping of Power Semiconductors in H-Bridge Circuit. *Appl. Sci.* **2020**, *10*, 4340.
https://doi.org/10.3390/app10124340

**AMA Style**

Zhou D, Peng Y, Iannuzzo F, Hartmann M, Blaabjerg F. Thermal Mapping of Power Semiconductors in H-Bridge Circuit. *Applied Sciences*. 2020; 10(12):4340.
https://doi.org/10.3390/app10124340

**Chicago/Turabian Style**

Zhou, Dao, Yingzhou Peng, Francesco Iannuzzo, Michael Hartmann, and Frede Blaabjerg. 2020. "Thermal Mapping of Power Semiconductors in H-Bridge Circuit" *Applied Sciences* 10, no. 12: 4340.
https://doi.org/10.3390/app10124340