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Article

A 24 GHz-Optimized Up-Conversion Mixer for Beyond-5G: A Combined ComGAPSO and ImGKAN Approach

1
Department of Smart Robot Convergence and Application Engineering, Pukyong National University, Busan 48513, Republic of Korea
2
Department of Global IT Engineering, Kyungsung University, Busan 48513, Republic of Korea
3
Department of Electronics and Telecommunication Engineering, Symbiosis Institute of Technology, Pune Campus, Symbiosis International, Deemed University, Pune 412115, India
4
Department of Spatial Engineering, Pukyong National University, Busan 48513, Republic of Korea
*
Authors to whom correspondence should be addressed.
Micromachines 2026, 17(7), 794; https://doi.org/10.3390/mi17070794
Submission received: 5 April 2026 / Revised: 15 June 2026 / Accepted: 26 June 2026 / Published: 29 June 2026
(This article belongs to the Special Issue Advances in CMOS Integrated Sensors and Biosensors)

Abstract

An optimal CMOS up-conversion mixer is designed using a novel combination of genetic algorithms and particle swarm optimization (ComGAPSO) and improved-Kolmogorov–Arnold networks (ImGKAN) for 5G communication. The proposed ImGKAN, trained with ComGAPSO, enhances optimization through social interactions and private cognition through social interactions. The proposed hybrid approach enables accurate parameter determination due to the effective modeling and compensation of nonlinearities in the up-conversion mixer. The proposed optimized mixer incorporates an enhanced linearity boosting technique (LBT) along with a tunable capacitive feedback common-source (TCF-CS) structure. This combination effectively suppresses third-order nonlinear distortion while compensating for parasitic capacitances to improve gain performance and enhance circuit stability. The proposed design achieves a peak conversion gain (CG) of approximately 4.2 dB near 24 GHz. In terms of isolation characteristics, the LO-IF isolation reaches about −44 dB. Additionally, the RF-IF isolation is around −30 dB, ensuring minimal undesired coupling between the input and output paths, while the LO-RF isolation is maintained near −39 dB. The optimized mixer exhibits an output 1 dB compression point (OP1dB) of 5.1 dBm and an input 1 dB compression point (IP1dB) of −1.1 dBm. The RF port shows a return loss of approximately −24 dB near 24 GHz. The LO port exhibits a return loss in the range of −3 to −5 dB, with improved matching observed over the operating band. Meanwhile, the IF port demonstrates strong matching at lower frequencies, with return loss values dropping below −20 dB. Furthermore, the measured optimized design achieves a minimum noise figure (NF) of approximately 3.8 dB at 24 GHz.

1. Introduction

During the past few years, wireless communication systems have evolved rapidly, so high data rates, low latency, and increased capacity have become increasingly important, particularly in Beyond-5G (B-5G) communications. This is where B-5G systems and capabilities come into play, as they need to meet these demands while also delivering performance enhancements that surpass the capabilities of existing LTE and 5G networks [1] A key component of B-5G communication is the development of efficient, low-power, and highly linear RF circuits. As part of this communication chain, up-conversion mixers play an active role, directly impacting linearity, gain, and overall efficiency.
To overcome the challenges of transmitter design, it is essential to be equipped with an up-conversion mixer that can be used to achieve high linearity and high gain while minimizing the need for additional amplification stages, which can degrade linearity [2]. Additionally, for advanced communication systems, up-conversion mixers operating at frequencies between 20 and 30 GHz are particularly useful, as they offer high data throughput and wide bandwidth [3].

1.1. A. Motivational Perceptions into the ComGAPSO–ImGKAN Mixer Design

A new approach is presented by ImGKAN, which integrates GAs along with PSOs to address the limitations of traditional up-conversion mixer designs by integrating their strengths and weaknesses in the design process. There are two main mechanisms used to achieve convergence in local search spaces: GA, which has robust exploration capability for global optimization, and PSO which has the capability for solving local problems [4,5,6]. Thus, it is possible to design highly efficient RF circuits that meet the performance requirements for B-5G. Figure 1 presents an overview of the proposed 24 GHz optimized up-conversion mixer.

B. Related Literature

Mixers used in RF systems are broadly classified into passive and active types, each offering distinct trade-offs in performance. Passive mixers rely on switching mechanisms driven by the local oscillator (LO) to perform frequency translation, resulting in inherently low power consumption, high linearity, and favorable noise characteristics [7,8]. However, they suffer from conversion loss and typically demand relatively high LO drive levels. In contrast, active mixers provide conversion gain, improved port isolation, and reduced LO power requirements, making them more suitable for integrated circuit implementations despite their increased power consumption [9,10].
Prior studies have explored various CMOS mixer topologies to enhance performance metrics such as noise figure (NF), conversion gain (CG), and linearity. For instance, designs in [11,12] focused on minimizing noise and improving NF, whereas others [13,14,15] achieved gains in specific parameters at the expense of linearity or isolation. Additionally, alternative configurations applying RF and LO signals at different transistor terminals [16] and techniques such as derivative superposition and active baluns [17,18] have been introduced, though often with penalties in power efficiency.
To further improve mixer performance, numerous linearization approaches have been proposed, particularly in Gilbert-cell-based architectures, which are widely adopted due to their superior isolation and gain characteristics [19,20]. Enhancements such as dual transconductance boosting [21], cascode folding [22], source degeneration [23], class-AB transconductance stages [24], and harmonic suppression techniques [25] have demonstrated notable improvements. However, these methods often increase circuit complexity or degrade gain.
Although prior works have reported mixers operating in the millimeter-wave range (15–35 GHz), most designs focus on optimizing a single parameter, such as gain or linearity, rather than achieving a balanced improvement. Only limited studies, such as [26], have addressed both high conversion gain and linearity simultaneously at 24 GHz; yet these lack comprehensive technical analysis and are primarily targeted at automotive radar applications. In contrast, the growing demand for Beyond-5G systems necessitates mixer designs that simultaneously achieve high linearity, gain, and power efficiency at 24 GHz frequencies.
In addition, Yang et al. [27] proposed a 24–30 GHz mixer employing a novel linearization technique to achieve enhanced linearity without significantly increasing power consumption. Bae and Han [28] introduced a wideband CMOS mixer operating from 24 to 40 GHz for 5G FR2 applications, demonstrating improved bandwidth and gain characteristics. Lin and Lan [29] reported a high-conversion-gain mixer covering 12.4–32 GHz for 28 GHz 5G New Radio systems. Furthermore, Wang and Wen [30] presented a broadband 30–60 GHz CMOS mixer with low LO drive requirements, targeting next-generation millimeter-wave transceivers. Collectively, these studies demonstrate the increasing importance of intelligent optimization frameworks for achieving multi-objective performance enhancement in millimeter-wave mixers intended for Beyond-5G and future 6G transceivers.
The remainder of this paper is organized as follows. Section 2 presents the design of the proposed up-conversion mixer system. Section 3 describes the up-conversion mixer optimization process using the ComGAPSO–ImGKAN approach. The results and discussion are provided in Section 4.

1.2. Main Contributions

The novelty of this work lies in its optimization methodology and its impact on circuit performance. We use a ComGAPSO-backed ImGKAN for RF parameter optimization. This approach captures complex nonlinear relationships between design variables and performance metrics more effectively than conventional tuning. It integrates global search capabilities with learning-based nonlinear modeling. The ImGKAN model also enables implicit nonlinear compensation during parameter selection.
  • A new hybrid optimization approach, ComGAPSO–ImGKAN, is proposed by integrating GA and PSO to exploit both evolutionary search capability and swarm intelligence for efficient parameter optimization.
  • The proposed ImGKAN accurately models and compensates for nonlinear behavior in the up-conversion mixer, enabling precise circuit parameter tuning and improved performance.
  • An advanced LBT techniques combined with a TCF-CS structure is introduced to suppress third-order nonlinear distortion and mitigate parasitic capacitances.
  • The measured optimized mixer achieves good RF performance, including higher CG (4.2 dB), improved linearity OP1dB = 5.1 dBm, IP1dB = −1.1 dBm, and reduced NF (3.8 dB) at 24 GHz.
  • The proposed design demonstrates reduced power consumption (3.4 mW at 1.2 V), which is suitable for beyond-5G applications.

2. Circuit Architecture and Implementation

The proposed up-conversion mixer, illustrated in Figure 2, converts a 2.4 GHz IF signal to a 24 GHz RF signal. The IF signal is first amplified by the Gm stage, which consists of a tunable capacitive feedback common-source (TCF-CS) structure and linearity boosting technique (LBT) block. The TCF-CS stage uses transistors M1 and M2 along with varactors (Cv1, Cv2), whose capacitance is controlled by a tuning voltage (Vt). These varactors cancel the parasitic gate-drain capacitance (Cgd) through capacitive neutralization, improving gain and stability. The tuning transistor operates in the subthreshold region to minimize power consumption.
The LBT stage enhances linearity by combining primary (Mp) and secondary (Ms) transistors with source degeneration inductors (Ls1, Ls2). The primary transistor operates in strong inversion, while the secondary transistor operates in moderate inversion, reducing gate noise and improving linearity compared to conventional derivative superposition techniques. The amplified signal is then fed into the switching stage (M3–M6), where a 21.6 GHz LO signal is applied to perform frequency up-conversion, generating a 24 GHz RF output. Finally, the RF output is delivered through a push–pull buffer (using PMOS Mpb and NMOS Mnb with a feedback resistor (Rf) to achieve proper 50 Ω impedance matching. Overall, the combination of TCF-CS for gain enhancement and LBT for linearity improvement results in a high-performance, low-noise up-conversion mixer. Table 1 shows the proposed mixer simulation parameters.

2.1. Optimization Process Using ComGAPSO–ImGKAN Approach

Our present implementation of improved GKAN incorporates KAN layers: architecture 1, which applies the learnable functions to aggregation features after they have been reconstructed. Figure 3 shows the proposed architecture of the ImGKAN.

2.1.1. Proposed ImGKAN Architectures

In this architecture, the embedding of nodes at layer + 1 are basically generated by passing the aggregated (e.g., summation) node embedding at layer through KAN layer (), which is represented in Equations (1) and (2).
H Archit . 1 ( + 1 ) = KANlayer A H Archit . 1 ( )
H Archit . 1 ( 0 ) = X
The KAN layer, although appearing simple in Equation (2), presents challenges for optimization. Here, we find the following:
1. Residual Activation Functions: The activation function ϕ(x) combines a basis function b(x), reminiscent of residual connections, and a spline function, as presented in Equation (3):
ϕ ( x ) = w b b ( x ) + w s spline ( x )
The basis function is typically defined as in Equation (4):
b ( x ) = silu ( x ) = x 1 + e x
The spline component is expressed as a weighted sum of B-splines as in Equation (5):
spline ( x ) = i c i B i ( x )
where ci are coefficients that can be adjusted during training. Notably, wb and ws could be absorbed into b(x) and spline(x) but are kept separate to fine-tune the function’s amplitude.
2. InitializationScales: The activation functions are initialized such that ws = 1 and spline (x) ≈ x. wb is set based on the Xavier initialization scheme, traditionally used for initializing layers in the MLP as in Equation (6):
R MLP = W 3 σ 2 W 2 σ 1 W 1 ( x )
3. Dynamic Spline Grid Updates: The spline grids are updated dynamically based on the input activations. This modification caters to the inherent bounded nature of spline functions, accommodating the evolutionary nature of activation values during training.
Considering L number of layers for these architectures, then the forward model is presented as Z = soft max(H(L) Archit. 1) as shown in Equations (7) and (8):
Z = soft max H ( L )
R KAN ( x ) = ϕ 3 ϕ 2 ϕ 1 ( x )
The mixer is represented as a graph G = (V,E), where nodes V denote circuit elements (transistors, passive components, RF/LO/IF ports) and edges E represent signal flow and nonlinear interactions. In Figure 4, we can see the proposed ImGKAN approach configuration.
Each node is associated with a feature vector containing xi device parameters, bias conditions, and parasitic effects. The learning objective is to approximate the nonlinear mapping in Equations (9)–(12):
y = f RF ( X )
The ImGKAN layer updates node representations as:
h i ( l + 1 ) = j N ( i ) ϕ l W l h j ( l )
The final prediction is:
y ^ = Φ 3 Φ 2 Φ 1 ( X )
Training data are generated via circuit simulations under parameter sweeps, and the model is trained using:
L = y y ^ 2
Unlike conventional surrogate models, the proposed ImGKAN leverages both graph topology and learnable nonlinear basis functions to effectively capture strong nonlinearities and component-level interactions in up-conversion mixers. The trained model is integrated with the ComGAPSO optimization framework to enable efficient exploration of the design space and accurate determination of optimal circuit parameters.

2.1.2. Optimization Process ImGKAN Using ComGAPSO

The proposed ComGAPSO combines GA and PSO to improve optimization performance. By integrating GA’s evolutionary mechanisms with PSO’s social learning strategy, the hybrid approach achieves better results than using either method independently.
1. Initialization: In ComGAPSO, both GA and PSO operate on a shared population. Initially, individuals are randomly generated and can be viewed as chromosomes (GA) or particles (PSO). System parameters, such as the number of neural nodes, rules, and learning coefficients are predefined. After initialization, new generations are produced through enhancement, crossover, and mutation operations.
2. Enhancement (PSO-Based Learning): After evaluating fitness, the top 50% of individuals are selected as elites. Instead of directly passing them to the next generation, they are first improved using PSO. In this step, the following occurs:
  • Elites are treated as a swarm;
  • Each individual updates itself based on
    (a)
    personal experience (cognitive learning);
    (b)
    best-performing individuals (social learning).
This process mimics natural learning, where individuals improve through both self-experience and interaction with others. It helps prevent premature convergence and enhances search capability. The improved elites form half of the next generation.
3. Crossover (GA-Based Evolution): The remaining population is generated using crossover among enhanced elites. Parents are selected using a tournament selection method, where individuals with better fitness are more likely to be chosen.
A two-point crossover technique is applied:
  • Two random crossover points are selected;
  • Genetic information between parents is exchanged;
  • Two new offspring are generated.
This strategy ensures that offspring inherit strong features from high-quality parents, improving overall population fitness. It also introduces diversity and supports global exploration. Figure 4 presents the flow chart of the ComGAPSO process.

2.1.3. Optimization Setup: Design Vector, Objective, and Constraints

The design vector is given by,
x = [ W i , L i , I bias , V bias , C j , L k ]
where Wi/Li represent transistor dimensions of the transconductance and switching stages, Ibias, Vbias, denote bias voltages and currents, RL and CL are load components, and Cfb and Cvar correspond to feedback and tunable capacitive elements used in the LBT and TCF-CS structures.
In our work, we consider the objective function in Equation (13),
max F = w 1 C G C G max + w 2 I P 1 d B I P 1 d B , max w 3 P cons P max w 4 N F N F max
The objective function is designed to maximize conversion gain (CG) and linearity (represented by IP1dB) while penalizing power consumption and noise figure (NF). It should be noted that higher weights are assigned to CG and IP1dB compared to NF and power consumption.
Figure 5 presents the algorithm learning process of ImGKAN using the ComGAPSO process. The figure illustrates the learning process of the ImGKAN model using a hybrid GA and PSO approach. It begins with random initialization of the population, where candidate solutions are generated. Each solution is then evaluated based on a fitness function to determine its performance. The top 50% of the best-performing solutions are selected as elites for further improvement. These elite solutions undergo enhancement using PSO-based learning, followed by GA operations such as crossover and mutation to introduce diversity and explore new solutions. A new generation is created and the process repeats until the stopping criteria are satisfied, ensuring convergence to an optimal or near-optimal solution. Table 2 presents the parameter settings of the optimization algorithms.

2.1.4. Testing Functions of Convergence Curve

In this section, we consider six benchmark functions, three of which are unimodal functions and three of which are multimodal functions. Equations (14) and (15) present the unimodal function and Equations (16)–(19) present the multimodal functions.
func 1 ( x ) = i = 1 n x i 2
func 2 ( x ) = max i | x i | , 1 i n
func 3 ( x ) = i = 1 n 1 100 x i + 1 x i 2 2 + ( x i 1 ) 2
func 4 ( x ) = i = 1 n x i sin | x i |
func 5 ( x ) = i = 1 n x i 2 10 cos ( 2 π x i ) + 10
func 6 ( x ) = 20 exp 0.2 1 n i = 1 n x i 2 exp 1 n i = 1 n cos ( 2 π x i ) + 20 + e
The convergence results in Figure 6 quantitatively demonstrate the superiority of the proposed ComGAPSO algorithm over conventional GA and PSO methods across all benchmark functions. In unimodal cases (Figure 6a,b), ComGAPSO achieves final fitness values on the order of 10−26 and 10−7, respectively, compared to PSO (10−24, 10−6) and GA (10−6, 100, indicating an improvement of approximately 2–6 orders of magnitude over GA and 1–2 orders over PSO. For multimodal functions (Figure 6c–f), the proposed method consistently avoids premature convergence and reaches lower minima; for example, in Figure 6e, ComGAPSO attains a fitness value near 10–15, significantly outperforming PSO 10−7 and GA 10−0, corresponding to improvements of 10 and 15 orders of magnitude, respectively. Similarly, in Figure 6d, ComGAPSO achieves approximately 10−3.9, compared to PSO 10−3.8 and GA 10−3.7, showing steady incremental gains. In Figure 6f, although PSO converges rapidly initially, it stabilizes around 10−1, whereas ComGAPSO maintains a lower level near 10−2, while GA has significantly slower convergence.
Figure 7 illustrates the computational cost (in seconds) of PSO, GA, and the proposed ComGAPSO algorithm as a function of population size. As the population increases from 50 to 600, all three algorithms exhibit a near-linear growth in computational time; however, the rate of increase differs significantly among them. For PSO, the computational time increases steeply from approximately 15 s at population 50 to about 430 s at population 600, indicating the highest computational burden. In contrast, GA shows moderate growth, rising from around 10 s to 200 s over the same population range.
The proposed ComGAPSO algorithm consistently demonstrates the lowest computational cost, increasing from approximately 5 s at population 50 to only about 75 s at population 600. This represents a substantial improvement: at population 600, ComGAPSO reduces computation time by approximately 82.5% compared to PSO and 62.5% compared to GA.
Even at mid-range population (e.g., 300), ComGAPSO (35 s) is significantly faster than GA (90 s) and PSO (180 s), achieving roughly 80% and 61% reductions, respectively. Additionally, the slope of the ComGAPSO curve is much lower, indicating better scalability and computational efficiency as population size increases.

2.1.5. Relevance of Benchmark Optimization to Mixer Design

In the case of the unimodal benchmark functions, these evaluate the local exploitation capability of the optimization algorithm. Fast convergence on these functions indicates that ComGAPSO can efficiently refine circuit parameters once a promising design region has been identified. In the mixer optimization process, this behavior is particularly important for accurately tuning transistor sizing, bias conditions, and matching-network elements to maximize conversion gain while maintaining acceptable noise and linearity performance.
The multimodal benchmark functions emulate the existence of multiple local optima commonly encountered in RF circuit design. For the proposed mixer, numerous combinations of device dimensions and bias conditions may satisfy a subset of performance requirements while degrading others. The superior performance of ComGAPSO on multimodal functions demonstrates its ability to avoid premature convergence and locate globally optimal design solutions.
The computational-cost analysis highlights the practical advantage of the proposed optimization approach. Since each candidate mixer solution requires circuit-level evaluation through ADS simulations, optimization runtime is strongly dependent on the number of required evaluations. The reduced computational cost achieved by ComGAPSO translates into fewer simulation iterations and shorter design cycles.
To further quantify this benefit, the optimized mixer achieved an improvement in simulated CG from 4.2 dB to 5.2 dB (an approximately 24% enhancement), while reducing power consumption from 4.9 mW to 3.4 mW (an approximately 31% reduction). Additionally, the measured OP1dB improved from 4.1 dBm to 5.1 dBm, demonstrating enhanced linearity. The improvements show that the proposed optimization approach is not only effective on benchmark problems but also leads to noticeable enhancements in the actual RF performance of the 24 GHz mixer design.

3. Results and Discussion

This section presents the performance evaluation of the proposed 24 GHz up-conversion mixer using the optimized algorithm and compares it with a conventional design and measured results. The analysis focuses on key metrics such as CG across a wide frequency range to demonstrate the effectiveness of the proposed approach. The comparison highlights the impact of optimization on improving gain, bandwidth, and overall stability, while also considering practical variations observed in measurements. In this work, a MATLAB (R2024a)–ADS (2024) co-simulation is used to automate the mixer optimization process. The ComGAPSO and ImGKAN algorithm in MATLAB generates candidate design parameters, which are passed to ADS via scripting to update the circuit. ADS then performs simulations (S-parameters, harmonic balance, and noise analysis) to evaluate key metrics such as conversion gain, linearity, noise figure, and power. The results are returned to MATLAB, where they are used to update the optimization process iteratively. This closed-loop approach enables accurate circuit evaluation while efficiently exploring the design space.
Figure 8 shows the process flow for circuit design with optimization and w/o optimization. The figure presents a comparative flow between an optimized and a conventional mixer design process. On the left, the optimized approach begins by initializing a population of mixer parameters and weights, followed by setting up the ImGKAN model for nonlinear mapping. The system evaluates performance metrics such as gain, linearity, noise, and power, and then iteratively improves solutions using hybrid optimization techniques including PSO-based local search, GA crossover, and mutation. A convergence check determines whether the solution is optimal; if not, the population is updated and the process repeats. Once convergence is achieved, the design stages (Gm, I-DS, and switching stage) are finalized to produce a 24-GHz-optimized RF output.
In contrast, the conventional method on the right relies on manual parameter selection and sequential circuit design steps, including Gm stage design, linearity adjustments, and switching stage implementation. The circuit is simulated and repeatedly tuned through trial-and-error until the specifications are met, making the process more time-consuming and less efficient.
Figure 9 shows an analysis of the mixer’s CG with respect to frequency. This shows the CG performance of the proposed optimized mixer compared with the non-optimized and measured results over 20–28 GHz at an LO power of 2 dBm. The optimized design reaches a peak CG of about 5.2 dB near 24 GHz. The gain remains higher and more stable across the mid-band frequencies (22–25.5 GHz). The measured gain is 4.2 dB.
Figure 10 shows the mixer port isolation. In this case, a mixer (measured) with a 24 GHz bandwidth features an isolation between the LO-IF port, RF- IF port, and LO-RF port of −46.2 dB, −33.3 dB, and −42.4 dB, respectively. In the case of the optimized mixer simulation results, when we consider a frequency of 24 GHz, we see that the optimized up-conversion mixer demonstrates strong port-to-port isolation performance. Specifically, the LO-IF isolation reaches approximately −44 dB, indicating excellent suppression of local oscillator leakage into the IF port. The RF-IF isolation is around −30 dB, ensuring minimal undesired coupling between input and output paths, while the LO-RF isolation is maintained near −39 dB, reflecting efficient isolation between the LO and RF ports. A TCF-CS structure coupled with LBT, guided by the proposed optimization algorithm, successfully mitigates parasitic effects and nonlinear distortions.
As Figure 11 shows, the input 1-dB compression point characteristics of the proposed optimized up-conversion mixer demonstrate a significant improvement in linearity compared to the measured baseline. As illustrated in Figure 11, the optimized simulated results closely follow the ideal linear response over a wide input IF power range, indicating effective suppression of nonlinear distortion. The optimized mixer measured results shows a OP1dB of 5.1 dBm, and the IP1dB is −1.1 dBm, respectively, demonstrating good linear performance.
As can be seen in Figure 12, the proposed mixer has a measurable return loss. This mixer (measured) allows the IF port to be configured at 2.4 GHz with a return loss of −22.6 dB, the RF port to be configured at 24 GHz with a return loss of −26.1 dB, and the LO port to be configured at 21.6 GHz with a return loss of −19.1 dB. Furthermore in the case of optimized (simulated) design, the return loss of the IF, RF, and LO ports are −20 dB, −15.7 dB, and −24 dB, respectively. The RF port exhibits a deep return loss of approximately −24 dB near 24 GHz, indicating minimal signal reflection. Similarly, the LO port maintains a return loss of around −3 to −5 dB with improved matching observed across the operating band, while the IF port shows strong matching at lower frequencies with a minimum return loss reaching below −20 dB. Additionally, the LBT technique and the TCF-CS structure contribute further to the improvement in performance by compensating parasitic effects and stabilizing impedance characteristics in cooperation with each other. For B-5G applications operating in the 24 GHz band, the proposed mixer achieves reduced reflection losses, enhanced signal integrity, and improved overall RF performance.
The noise figure (NF) performance is shown in Figure 13. This shows that the proposed optimized up-conversion mixer shows an improvement. As observed from the figure, the measured optimized design achieves a minimum NF of approximately 3.8 dB at 24 GHz.

3.1. Layout Considerations

The proposed mixer, incorporating the LBT and TCF-CS structures, is implemented using 65 nm CMOS technology. The chip micrograph is presented in Figure 14. The overall chip occupies an area of 0.28 mm2 (0.59 mm × 0.47 mm), excluding the pad region. The layout is carefully optimized to maintain stable circuit operation while minimizing parasitic resistances, capacitances, and inductances arising from interconnections, as well as diffusion-related parasitic capacitances.
To reduce gate resistance and parasitic capacitance, the transistors are segmented into multiple fingers. This multi-finger configuration also helps suppress nonlinearity caused by shunt capacitances, thereby improving gain performance. A multi-layer grounding strategy is adopted using several metal layers to create a low-resistance and low-inductance ground path. In addition, wide and thick power routing is implemented to ensure proper AC coupling to ground and to minimize voltage drops across the supply network.
Metal–insulator–metal (MIM) capacitors with a capacitance density of 2.2 fF/µm2 are employed in the design. The inductors are realized using the fifth metal layer of the 65 nm CMOS process, featuring a thickness of 12 µm and achieving a quality factor (Q) of approximately 12. To reduce electromagnetic interference (EMI) between inductors, a grounded shielding plane is placed at a distance of 16 µm from the inductor coils.

3.2. Measurement Setup and Validation

The fabricated mixer was characterized through on-wafer measurements using Ground–Signal–Ground (GSG) RF probes. Figure 15 presents the measurement configuration. A Keysight PNA-X Vector Network Analyzer (VNA) was employed for RF characterization. The local oscillator (LO) signal was generated at 21.6 GHz and applied through the differential LO ports, while the RF input signal was swept from 24 GHz to 30 GHz. The device under test (DUT) was biased using a regulated DC power supply with VDD = 1.2 V through dedicated supply pads.
Prior to measurement, a standard Short–Open–Load–Thru (SOLT) calibration procedure was performed to establish the reference plane at the probe tips and eliminate the effects of cables, connectors, and external fixtures. The reported results therefore represent the intrinsic performance of the fabricated mixer. All measurements were conducted under room-temperature conditions using on-wafer probing without packaging. The measured conversion gain, port isolations, return losses, linearity metrics (IP1dB and OP1dB), and noise figure were obtained under these calibrated conditions, ensuring reliable validation of the proposed ComGAPSO–Im GKAN optimized mixer design.
Table 3 shows the comprehensive performance comparison of 24 GHz CMOS up-conversion mixers, and Table 4 presents a comparison between prior work and this work.

3.3. Practical Application Prospects

While considering the practical application prospects, the proposed ComGAPSO–Im GKAN-optimized 24 GHz up-conversion mixer is fit for emerging Beyond-5G and future 6G wireless communication systems that require high CG, improved linearity, and low power consumption. The proposed optimization approach can be extended to the design of other RF front-end building blocks, including low-noise amplifiers, power amplifiers, and frequency synthesizers. From a system-level perspective, the enhanced CG improves signal quality and receiver sensitivity, while the improved linearity minimizes intermodulation distortion and unwanted spectral emissions. Such performance characteristics are critical in next-generation communication systems that require reliable operation under high data traffic, limited spectral resources, and complex interference conditions. The ComGAPSO–Im GKAN approach significantly reduces the design space exploration time by intelligently identifying optimal transistor dimensions and biasing conditions, thereby shortening the RF integrated circuit development cycle. Consequently, the proposed methodology provides a scalable and efficient solution for future millimeter-wave RF front-end designs requiring simultaneous optimization of gain, linearity, power consumption, and overall circuit performance.
In addition, the proposed mixer architecture can be integrated with advanced intelligent sensing platforms that combine sensor-interface circuits and wireless communication modules. For example, smart sensing systems employing WO3/CNT-based sensors for gas detection and environmental monitoring can benefit from the proposed high-linearity and energy-efficient mixer to enable reliable wireless transmission of sensor data. Furthermore, its ability to efficiently handle multi-objective design constraints makes it attractive for automotive radar, intelligent sensing, IoT communication, and high-speed wireless transceiver applications operating in the millimeter-wave spectrum.

4. Conclusions

This paper presented a 24 GHz optimized CMOS up-conversion mixer for beyond-5G applications using a novel hybrid optimization framework based on ComGAPSO–Im GKAN. By combining the global exploration capability of GAs with the rapid convergence characteristics of PSO, the proposed approach enables precise and efficient parameter optimization for RF circuit design. The integration of the Im GKAN model further enhances system performance through accurate nonlinear modeling and compensation. Moreover, the incorporation of the enhanced LBT together with the TCF-CS structure effectively suppresses third-order distortion and mitigates parasitic effects, contributing to improved overall mixer performance.
A peak CG of approximately 4.2 dB is achieved near 24 GHz. Furthermore, a mixer (measured) with a 24 GHz bandwidth features an isolation between the LO-IF port, RF-IF port, and LO-RF port of −46.2 dB, −33.3 dB, and - 42.4 dB, respectively. The isolation characteristics are LO–IF isolation of −44 dB, RF-IF isolation of −30 dB, and LO-RF isolation of −39 dB. The design achieves a measured OP1dB of 5.1 dBm and IP1dB of −1.1 dBm, demonstrating robust large-signal handling capability. Furthermore, impedance matching performance is also well maintained, with the RF port exhibiting a deep return loss of approximately −24 dB at 24 GHz. The LO port shows a return loss in the range of −3 to −5 dB, with improved matching across the operating band, while the IF port demonstrates strong low-frequency matching with return loss values below −20 dB. In addition, the proposed mixer achieves a measured minimum NF of 3.8 dB, indicating low noise degradation and suitability for high-frequency B-5G communication systems. Despite the promising results, the proposed framework can be further extended to higher frequency bands, such as 60 GHz and terahertz ranges, to support emerging 6G applications.

Author Contributions

Conceptualization, U.A. and T.S.D.; methodology, U.A. and T.S.D.; validation, U.A. and K.T.; formal analysis, U.A., M.S. and S.M.; investigation, U.A.; resources, U.A., J.-Y.R. and Y.L.; data curation, U.A. and M.S.; writing—original draft preparation, U.A. and T.S.D.; writing—review and editing, U.A., K.T., S.M., Y.L. and J.-Y.R.; supervision, K.T., Y.L. and J.-Y.R.; funding acquisition, J.-Y.R. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Global Joint Research Program funded by the Pukyong National University (202506900001).

Data Availability Statement

The data presented in this study are available from the corresponding author upon reasonable request.

Conflicts of Interest

We confirm that the authors declare no conflicts of interest. Furthermore, the funders had no role in the design of the study; in the collection, analysis, or interpretation of data; in the writing of the manuscript; or in the decision to publish the results.

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Figure 1. Overview of the proposed 24 GHz optimized up-conversion mixer.
Figure 1. Overview of the proposed 24 GHz optimized up-conversion mixer.
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Figure 2. Circuit Details (a) Traditional capacitive neutralization, (b) Proposed TCF-CS structure, (c) Varactor implementation, (d) Proposed mixer, (e) Chip micrograph.
Figure 2. Circuit Details (a) Traditional capacitive neutralization, (b) Proposed TCF-CS structure, (c) Varactor implementation, (d) Proposed mixer, (e) Chip micrograph.
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Figure 3. Proposed ImGKAN Approach.
Figure 3. Proposed ImGKAN Approach.
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Figure 4. Flow Chart (ComGAPSO).
Figure 4. Flow Chart (ComGAPSO).
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Figure 5. Algorithm learning process of ImGKAN using ComGAPSO.
Figure 5. Algorithm learning process of ImGKAN using ComGAPSO.
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Figure 6. Convergence curve of GA, PSO, and ComGAPSO variants on unimodal and multimodal functions (a) F1, (b) F2, (c) F3, (d) F4, (e) F5, (f) F6.
Figure 6. Convergence curve of GA, PSO, and ComGAPSO variants on unimodal and multimodal functions (a) F1, (b) F2, (c) F3, (d) F4, (e) F5, (f) F6.
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Figure 7. Computational cost of GA, PSO, and ComGAPSO variants vs. Population.
Figure 7. Computational cost of GA, PSO, and ComGAPSO variants vs. Population.
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Figure 8. With optimization and without optimization process flow.
Figure 8. With optimization and without optimization process flow.
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Figure 9. An analysis of the mixer’s CG with respect to frequency.
Figure 9. An analysis of the mixer’s CG with respect to frequency.
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Figure 10. Mixer port isolation.
Figure 10. Mixer port isolation.
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Figure 11. RF output power vs. IF input power.
Figure 11. RF output power vs. IF input power.
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Figure 12. Return loss.
Figure 12. Return loss.
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Figure 13. Noise Figure.
Figure 13. Noise Figure.
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Figure 14. Chip micrograph.
Figure 14. Chip micrograph.
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Figure 15. Measurement Setup.
Figure 15. Measurement Setup.
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Table 1. Proposed mixer simulation parameters (complete device-level details).
Table 1. Proposed mixer simulation parameters (complete device-level details).
Components/ParameterDimension/ValueComponents/ParameterDimension/Value
Transistor Dimensions
(NMOS/PMOS)
Passive Elements
M1, M2 (RF pair)33 μm/65 nmL1L2 (RF load)172 pH
Mp (LO pair)50 μm/65 nmLs1 (LO matching)70 pH
Ms (Switching pair)40 μm/65 nmLs2 (IF load)90 pH
M3M6 (IF stage)35 μm/65 nmC3C6 (Coupling/Blocking)43 fF
Varactor (Tuning Network)Bias Conditions
Cv1Cv2 (Varactors)12–38 fFVDD (Supply Voltage)1.2 V
Tuning Voltage (Vtune)0.5–1.2 VVbias,RF (M1M2)0.55 V
Q-Factor (at 24 GHz)>18Vbias,LO (Mp)0.60 V
Vbias,IF (M3M6)0.50 V
Resistors and BiasingSupply Current Distribution
Rbias1 (Gate bias)1.5 k Ω IRF (M1M2)1.88 mW
Rbias2 (Source degeneration)200 Ω ILO (Mp)1.36 mW
Rload (IF termination)100 Ω IIF (M3M6)0.98 mW
Total Current (IDD)3.4 mW
Output Matching NetworkSimulation Settings
C RF_match (Series)15 fFRF Frequency24 GHz
L RF_match (Shunt)160 pHIF Frequency2.4 GHz
C IF_match (Coupling)20 fFLO Drive Level2 dBm
R IF_term (IF Load)100 Ω Verification MethodSimulation, Post-Layout Simulation, and Measurement
Table 2. Parameter Settings.
Table 2. Parameter Settings.
CategoryParameterSymbolValue (Used)Description
OptimizationPopulation Size50Number of individuals
Number of Generations100Iteration count
Crossover RatePc0.8GA crossover probability
Mutation RatePm0.05GA mutation probability
Inertia Weightw0.7PSO exploration factor
Cognitive Coefficientc11.5Personal learning factor
Social Coefficientc21.5Global learning factor
ImGKAN
Model
Number of Nodes15Hidden structure size
Learning Rate0.01Training step size
Activation FunctionAdaptive splineNonlinear mapping
Training MethodComGAPSO-Hybrid
optimization based
Surrogate-assisted hybrid
optimization
Design and EvaluationDesign Vector [Wi, Li, Ibias, Vbias, Cj, Lk] Circuit design variables
Objective Function Weights [0.30, 0.20, 0.20, 0.20] For [CG, NF, IP1dB, Power]
RF Constraints C G 5 dB , N F 3.8 dB , I P 1 dB 1 dBm , Isolation 30 dB , S 11 10 dB Performance specifications
SimulatorADS/Cadence Spectre RFCircuit-level evaluation
Table 3. Comparison with recently reported up-conversion mixers.
Table 3. Comparison with recently reported up-conversion mixers.
Ref.YearProc.RF Freq.AreaRF–IFLO–IFLO–RFRF RLLO RLIF RLGainOP1dBNFPower
(nm)(GHz)(mm2)(dB)(dB)(dB)(dB)(dB)(dB)(dB)(dBm)(dB)(mW)
Won et al. [27]201513023.4–29.20.85868.9N/R28.9>10>10>10−1.90.3N/R22.8
Siddique et al. [28]202165240.4040.027.335.1−20.7−24.8−22.64.70.413.85.2
Delwar et al. [29]202265240.4218.124.322.4−21.5−24.7−22.453.5–4.0∼1.0∼4.0∼6.0
Chen et al. [30]20251802–181.20N/R44–6522–35<−8N/RN/R10–16N/RN/R3.69
This Work202665240.28−30−44−39−24.1−19.1−22.64.25.13.83.4
Table 4. Performance comparison of prior work and proposed work.
Table 4. Performance comparison of prior work and proposed work.
ParameterPrior Work (Without Optimization)This Work (With Optimization)
SimulatedMeasuredSimulatedMeasured
Gain (dB)4.23.9–4.05.24.2
NF (dB)3.53.82.93.8
OP1dB (dBm)4.54.16.05.1
P1dB (dBm)00.670−1.1
Chip Area (mm2)0.400.28
Power Consumption (mW)4.93.4
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MDPI and ACS Style

Aras, U.; Delwar, T.S.; Tariq, K.; Singh, M.; Mukhopadhyay, S.; Lee, Y.; Ryu, J.-Y. A 24 GHz-Optimized Up-Conversion Mixer for Beyond-5G: A Combined ComGAPSO and ImGKAN Approach. Micromachines 2026, 17, 794. https://doi.org/10.3390/mi17070794

AMA Style

Aras U, Delwar TS, Tariq K, Singh M, Mukhopadhyay S, Lee Y, Ryu J-Y. A 24 GHz-Optimized Up-Conversion Mixer for Beyond-5G: A Combined ComGAPSO and ImGKAN Approach. Micromachines. 2026; 17(7):794. https://doi.org/10.3390/mi17070794

Chicago/Turabian Style

Aras, Unal, Tahesin Samira Delwar, Khizra Tariq, Mangal Singh, Sayak Mukhopadhyay, Yangwon Lee, and Jee-Youl Ryu. 2026. "A 24 GHz-Optimized Up-Conversion Mixer for Beyond-5G: A Combined ComGAPSO and ImGKAN Approach" Micromachines 17, no. 7: 794. https://doi.org/10.3390/mi17070794

APA Style

Aras, U., Delwar, T. S., Tariq, K., Singh, M., Mukhopadhyay, S., Lee, Y., & Ryu, J.-Y. (2026). A 24 GHz-Optimized Up-Conversion Mixer for Beyond-5G: A Combined ComGAPSO and ImGKAN Approach. Micromachines, 17(7), 794. https://doi.org/10.3390/mi17070794

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