An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor
Abstract
:1. Introduction
2. In-Memory Associative Processing
2.1. Associative Computing
2.2. Operation
3. FFT Processor Architecture
3.1. Butterfly Operation
3.2. Data Movement
3.3. Area-Optimized Architecture
3.4. Dual-Issue Butterfly Operation
4. Evaluation
5. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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Computation Type | Data Location | Functionality Location | Bandwidth Constraint |
---|---|---|---|
Traditional | Separate IC | Processor | Inter-chip Bus |
Near-memory | Same IC | Processor | In-chip Bus |
In-memory | Same IC | Memory | Memory Capacity |
Addition | Subtraction | |||||||
---|---|---|---|---|---|---|---|---|
Compare | Write | Write | ||||||
0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
0 | 0 | 1 | 0 | 1 | 1 | 1 | ||
0 | 1 | 0 | 0 | 1 | 0 | 1 | ||
0 | 1 | 1 | 1 | 0 | 0 | 0 | ||
1 | 0 | 0 | 0 | 1 | 1 | 1 | ||
1 | 0 | 1 | 1 | 0 | 1 | 0 | ||
1 | 1 | 0 | 1 | 0 | 0 | 0 | ||
1 | 1 | 1 | 1 | 1 | 1 | 1 |
Specification | AP (F) | AP (P) | [47] | [33] | [48] | [35] | [34] |
---|---|---|---|---|---|---|---|
FFT Size (N) | 1024 | 1024 | 1024 | 256 | 2048 | 1024 | 4096 |
Technology | 65 nm | 65 nm | 65 nm | 90 nm | 65 nm | 65 nm | 65 nm |
1 | |||||||
Word-length | 12-bit | 12-bit | 16-bit | 10-bit | 12-bit | 32-bit * | 14-bit |
Area | |||||||
Power | 12 mW | 123 mW | 4.15 mW | 165 mW | 1.01 mW | 60.3 mW | 68.6 mW |
Throughput/Area () | 0.89 | 0.89 | 0.03 | 0.47 | 0.015 | 0.22 | 0.67 |
FOM (FFT/Energy/Area) | 70.4 | 7.09 | 6.82 | 15.3 | 7.04 | 3.60 | 2.37 |
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Yantir, H.E.; Guo, W.; Eltawil, A.M.; Kurdahi, F.J.; Salama, K.N. An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor. Micromachines 2019, 10, 509. https://doi.org/10.3390/mi10080509
Yantir HE, Guo W, Eltawil AM, Kurdahi FJ, Salama KN. An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor. Micromachines. 2019; 10(8):509. https://doi.org/10.3390/mi10080509
Chicago/Turabian StyleYantir, Hasan Erdem, Wenzhe Guo, Ahmed M. Eltawil, Fadi J. Kurdahi, and Khaled Nabil Salama. 2019. "An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor" Micromachines 10, no. 8: 509. https://doi.org/10.3390/mi10080509