An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor
Sensors Lab, Advanced Membranes & Porous Materials Center (AMPMC), Computer, Electrical and Mathematical Sciences and Engineering Division, King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi Arabia
Center for Embedded and Cyber-physical Systems, University of California, Irvine, CA 92697, USA
Authors to whom correspondence should be addressed.
Received: 30 June 2019 / Revised: 19 July 2019 / Accepted: 30 July 2019 / Published: 31 July 2019
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Current computation architectures rely on more processor-centric design principles. On the other hand, the inevitable increase in the amount of data that applications need forces researchers to design novel processor architectures that are more data-centric. By following this principle, this study proposes an area-efficient Fast Fourier Transform (FFT) processor through in-memory computing. The proposed architecture occupies the smallest footprint of around 0.1
inside its class together with acceptable power efficiency. According to the results, the processor exhibits the highest area efficiency (
) among the existing FFT processors in the current literature.
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MDPI and ACS Style
Yantir, H.E.; Guo, W.; Eltawil, A.M.; Kurdahi, F.J.; Salama, K.N. An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor. Micromachines 2019, 10, 509.
Yantir HE, Guo W, Eltawil AM, Kurdahi FJ, Salama KN. An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor. Micromachines. 2019; 10(8):509.
Yantir, Hasan E.; Guo, Wenzhe; Eltawil, Ahmed M.; Kurdahi, Fadi J.; Salama, Khaled N. 2019. "An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor." Micromachines 10, no. 8: 509.
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