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Article

A Method for Fault Tolerance of AES Encryption Systems Focused on Improving the Cybersecurity of VANET Through the Use of Residue Codes

by
Igor Anatolyevich Kalmykov
*,
Alexandr Anatolyevich Olenev
,
Daniil Vyacheslavovich Dukhovnyj
,
Igor Alexandrovich Provornov
and
Vladimir Sergeyevich Slyadnev
Department of Computational Mathematics and Cybernetics, North Caucasus Federal University, Stavropol 355017, Russia
*
Author to whom correspondence should be addressed.
World Electr. Veh. J. 2025, 16(8), 462; https://doi.org/10.3390/wevj16080462
Submission received: 3 July 2025 / Revised: 30 July 2025 / Accepted: 8 August 2025 / Published: 13 August 2025

Abstract

The problem of cybersecurity of vehicular ad hoc network (VANET) is far from being fully solved. This is due to the fact that when exchanging data between On Board Units (OBUs) and Roadside Units (RSUs) a wireless channel is used, which is subject to many cyberattacks. It is known that the use of encryption algorithms, particularly Advanced Encryption Standard (AES), can effectively counter many of them. However, during the operation of AES encryption systems, failures may occur, as a result of which closed communication channels may become open and accessible to attackers. Therefore, giving the property of fault tolerance to the used encryption systems is an urgent task. To solve this problem, the article proposes to use redundant residue codes in the polynomial ring (RCPR). The article describes a method of providing fault tolerance of AES encryption systems based on RCPR. Using the developed error correction algorithm for RCPR with one control module, the redundant RCPR can detect 100% of single and double errors, as well as correct 100% of single and 75% of double errors that occur during encryption and decryption. Thus, the developed method based on error correction of AES encryption system allows to parry cyberattacks on vehicles and ensure a higher level of cyber security of VANET.

1. Introduction

The steady growth of population density in megacities and urban agglomerations observed in recent decades necessitates a radical transformation of most urban infrastructures using information and telecommunication technologies. In the transport sector, classical technologies of freight and passenger transportation are being replaced by new technologies, such as the Intelligent Transport System (ITS). ITS includes modern information, communication and telematics technologies. It makes it possible to improve the efficiency of management of the region’s transportation and road complex, as well as to reduce the number of accidents on the road [1]. One of the main elements of ITS is the vehicular ad hoc network (VANET), which is a highly dynamic, self-organizing vehicular network structure. The increased interest in VANET is due to the fact that it is assigned tasks such as transferring information to drivers about road traffic, vehicle status and incidents, managing road transport in the city, improving the safety of transport processes, as well as the level of comfort for drivers and transport users [2].
To solve the above mentioned tasks, VANET includes Roadside Unit (RSU) base stations located along roads and On Board Unit (OBU) modules that are placed on the vehicle. To organize information exchange between moving vehicles and base stations, RSUs and OBUs contain wireless telecommunication devices and specialized computing devices. Various communication interfaces are used to organize the exchange in VANET. Thus Vehicle-to-Vehicle (V2V) interface is used for data exchange between vehicles. The Vehicle-to-Infrastructure (V2I) interface was developed to organize OBU-RSU interaction. RSU base stations also communicate with each other using the Infrastructure-to-Infrastructure (I2I) interface. The Vehicle-to-X (V2X) interface is the result of combining IoT and VANET technologies [3,4].
However, despite the ever-increasing integration of communication technologies and applications aimed at improving the efficiency of data exchange between vehicles, there are many challenges still unresolved in VANET. Such a challenge is ensuring the cybersecurity of the nodes in VANET. Since the data exchange between nodes is performed in real time over an open broadband radio channel, it has many vulnerabilities. Therefore, there has been a recent trend of continuous increase in the number of cyberattacks. According to Juniper Research analysts, the global damage from cyberattacks increases by an average of 11% annually [5].
An integrated approach is needed to effectively counter cyberattacks on the VANET. Obviously, before starting data exchange between objects in V2I and V2V, it is necessary to authenticate them. Message authentication code (MAC) [6,7], zero-knowledge proof protocols [8,9], padding [10,11] and timestamps [12,13] are widely used as authentication methods. After that, encryption is used to counter cyberattacks aimed at reducing confidentiality, which must be performed on a real-time scale. Advanced Encryption Standard (AES) block symmetric cipher, which has a fairly simple implementation and high speed, is now widely used to solve this problem [14]. However, failures and malfunctions may occur during the operation of the encryptors included in RSUs and OBUs. This results in the problem of data retransmission. This situation is quite critical if high-priority emergency messages are transmitted over the VANET. Thus, when using NR-V2X radio access technology, the end-to-end transmission delay should be within the range from 3 to 10 ms [15]. The end-to-end transmission delay is the time it takes for a packet to be transmitted from the sending device to the receiving one. The value of this parameter is affected by both constant delays associated with packet processing, including data encryption and transmission, and variable delays associated with queues on interfaces. In the 802.11p standard, the maximum frame length is 2346 bytes. If universal processors are used in the implementation of the OBU and RSU, the time for encryption and decryption will significantly delay the processing of the message. It was shown in [16] that it takes 11 microseconds to encrypt a 128-bit block of text. Therefore, it will take 1.612 ms to encrypt a frame of 2346 bytes alone. We believe that a similar time is required for decryption. If an error occurs during the encryption process, it becomes necessary to re-encrypt the message, transmit it over the communication channel, and re-decrypt it. As a result, the message processing time increases to a value of 6.448 ms, which exceeds the minimum value of the end-to-end transmission delay of 3 ms. Thus, the use of a fault-tolerant encryptor makes it possible not to exceed the delay time by correcting the error. Obviously, repeated transmission of the message reduces the safety on the road especially at high density of vehicle traffic. This problem can be solved by giving AES the property of fault tolerance. The use of residue codes in the polynomial ring (RCPR) can ensure the operable state of the encryptor by correcting errors arising from failures. Therefore, the development of a method to improve the cybersecurity of the process of data exchange in the VANET through the implementation of AES encryption with a modular code is an urgent task.
The purpose of the article is to develop a method to improve the fault tolerance of AES encryption systems based on RCPR. The application of this method will increase the cybersecurity of VANET by maintaining the operable state of encryptors and decryptors of RSUs and OBUs.
The new scientific results of the article are:
  • A new error correction algorithm for redundant RCPR that allows us to correct errors occurring in the residue of a code combination using a single control module.
  • Mathematical model of fault-tolerant block implementing nonlinear SubBytes transformation with residue codes in the polynomial ring.
  • Mathematical model of a fault-tolerant block implementing linear MixColumns transformation with residue codes in the polynomial ring.
Structure of the article goes as follows. Section 2 analyzes related works. Section 3 is devoted to the development of error correction algorithm for RCPR with one control module. Section 4 presents descriptions of mathematical models of fault-tolerant blocks implementing linear and nonlinear transformations in AES cipher. Section 5 presents the results of the efficiency evaluation of the developed method of improving the fault tolerance of AES encryption systems based on RCPR.

2. Related Works

A characteristic feature of VANET is the use of an open broadband radio channel for data exchange between RSUs and OBUs. In this network, the channel length usually does not exceed 1–5 km. Nevertheless, a number of attacks to which it is susceptible are known. A description of the main types of attacks on availability is presented in [17,18,19,20,21,22,23,24]. It is known that one of the common cyberattacks are Denial-of-Service (DOS) and Distributed Denial-of-Service (DDOS) attacks. In [17], the authors presented a classification of DDOS attacks and described the main effects of these attacks on the VANET. The presented information allows us to understand the attacker’s tactics and choose appropriate countermeasures. Countering Denial-of-Service (DOS) attacks using AES encryption algorithm are shown in [18,19]. In [20,21], types of jamming attacks are discussed. Such attacks aim to disrupt or hinder the reception of information by legitimate nodes in VANET. The papers present countermeasures against passive and active jamming. A description of broadcast tampering attacks in VANET and remedial measures are given in [22]. In [23], research results on the impact of black hole attacks on VANET security are presented. In [24], an effective countermeasure against black hole attacks is described based on the developed AODV routing protocol, which is used to detect these attacks.
When considering the cybersecurity of VANET, attacks on integrity [25,26,27,28,29,30] cannot be overlooked. In [25,26], the authors considered the main types of prankster attacks. To counteract such attacks, Ref. [25] proposes to use a genetic algorithm, and ref. [26] proposes to use a developed GPS module that shows the location of the prankster’s vehicle. Countering node impersonation attacks is described in [27,28]. Methods of countering application attacks on safety and non-safety messages are presented in [29,30].
It is known that authentication methods are quite effective means of countering cyberattacks. Thus, Ref. [31] shows an authentication scheme using AES encryption algorithm. Ref. [32] describes an authentication scheme to improve the security of vehicles in VANET. The authors based the developed scheme on the joint use of AES and RSA ciphers. This allows us to ensure the integrity and confidentiality of transmitted messages.
In [33,34], the authors described effective methods for countering sybil attacks, i.e., generating false identities that allow an intruder to control network resources. In a tunnel attack, legitimate nodes that are far away from each other begin to communicate as if they were close to each other. The method presented in [35] allows to eliminate the effects of such an attack. Countering cyberattacks that utilize spoofing interference is shown in [36,37,38]. In [36], a protocol is presented which reduces the time cost of authentication by reducing its cryptographic strength. This allows us to select the parameters of the protocol depending on the traffic intensity. In [37], a noise-resistant authentication protocol implemented with residue codes is presented. The use of these codes allows to simultaneously increase the imitation resistance of the protocol and ensure its effective operation in a complex interference environment. In [38], the authors propose a new method using machine learning algorithms aimed at combating the falsification of vehicle’s location.
A special place among cyberattacks is occupied by attacks on confidentiality. In [39] the authors considered the issues of ensuring the security of the 6G network. Special attention was paid to the use of artificial intelligence (AI) and machine learning (ML) methods in the network, thanks to which this network makes it possible to increase the efficiency of data exchange between subscribers. For effective operation of AI and ML, it is necessary to use a large amount of data obtained using the Internet of Everything (IoE) technology. However, using IoE reduces network privacy. The authors propose to use the intelligent zero trust (ZT) model, which protects the radio access network (RAN) from potential threats, for quick and easy threat detection in real time. The model is designed taking into account the distributed nature of 6G networks and includes security modules in various nodes, such as the base station, the main network and the cloud. In [28], an analysis of the main attacks’ confidentiality is presented. Their intensity is shown, and the main countermeasures are described. In [40,41], it is proposed to use symmetric cryptographic ciphers to counter eavesdropping and traffic analysis attacks. AES encryption algorithm is quite effective in countering brute force cyberattacks. The application of AES in VANET against these cyberattacks is presented in [42,43,44].
In [45,46,47,48], the main types of man-in-the-middle attacks are analyzed and the proposed methods for countering them in VANET and IoV network are described.
In addition, there is a fairly large body of work that considers the joint application of AES and RSA encryption algorithms [48,49,50,51].
In [48], the developed message delivery protocol is described, in which authentication and confidentiality are implemented via AES cipher. In [49,50,51], schemes of encryption key management systems for VANET based on RSA and AES are presented. In [52], a homomorphic privacy-preserving encryption scheme using AES cipher is proposed to protect vehicle location privacy.
Summarizing the analysis of related works, we can conclude that AES encryption algorithm is widely used as a countermeasure against multiple cyberattacks on VANET. At the same time, VANET encryption is performed at different levels: at the node level and at the message level. The article considers the situation when encryption is performed at the node level, i.e., at the data link layer. Obviously, the effectiveness of the cryptosecurity of VANET largely depends on the reliability of AES encryptors and decryptors. Therefore, error correction and detection during an operation of AES encryptor and decryptor is an urgent task.
Currently, there is a tendency to increase the number of articles in which ML methods are used to eliminate computational errors [53,54,55,56]. This is due to the fact that ML algorithms have the property of implementing self-correction due to their iteratively convergent nature. This makes it possible to increase the reliability and adaptability of computing tools, eliminating computational errors. However, ML methods effectively eliminate only certain calculation errors. These include the obsolescence of training data, a decrease in its accuracy and asynchrony. Therefore, these methods cannot be used to detect and correct errors in AES encryption algorithm.
In order to increase the fault tolerance of AES encryptor and decryptor, it is advisable to use classical methods that can be divided into two groups. The first group includes structural redundancy methods, the advantage of which is simple implementation. For example, it is proposed in [57,58,59] to use the Triple Modular Redundancy (TMR) method to increase fault tolerance. This method allows one to effectively correct single calculation errors that are caused by hardware failure or malfunction. However, this method has a disadvantage: in order to implement it, it is necessary to use three encryptors and decryptors that will work in parallel.
In order to reduce hardware costs, it is proposed in a number of works to use the method of equipment duplication to increase fault tolerance [60,61]. When using this method, there will be two encryptors and decryptors in the OBU and RSU. In this case, the second encryptor/decryptor will be in cold mode, that is, it will be turned on if a functioning encryptor/decryptor fails. The disadvantage of this method is the need to constantly check the operability of functioning devices.
The second group consists of methods using information redundancy. Redundant codes are used in these methods to increase fault tolerance. Cyclic redundancy check (CRC) is proposed in [62,63] to detect errors in the operation of devices caused by failures and malfunctions. This code is based on calculating a checksum for a block of data in order to detect accidental changes in information during transmission or storage. However, this code cannot be used to correct errors during the operation of AES encryptor, because CRC only detects them. Error correction codes (ECCs) have higher error correction abilities. As a rule, such codes are used to increase the noise immunity of data transmission systems [64,65,66]. However, it is impossible to use noise-resistant ECCs to increase the fault tolerance of AES encryptor, since these codes are not arithmetic ones.
Arithmetic residue codes, RCPR in particular, can solve this problem of increasing fault tolerance. These codes perform arithmetic operations in the ring of polynomials. Since calculations take place in parallel and independently on the modules of the code, RCPR allows not only to increase the speed of calculations but is also able to detect and correct errors.
Currently, there are many algorithms for detecting and correcting errors in RCPR. For example, in [67] it is proposed to use the projection method. A modification of this algorithm, which makes it possible to reduce the time required for correction, is presented in [68]. In [69], an algorithm for calculating the interval-index characteristic was proposed. In order to correct errors in the residue code, it was proposed in [70,71] to use the mixed radix system (MRS). However, these methods have significant disadvantages. Their implementation requires large hardware and time costs. Therefore, the development of a method that allows hardware to remain operational in the event of failures and malfunctions is an urgent task.

3. Development of an Error Correction Algorithm for RCPR with One Control Module

This section will cover the mathematical foundations of constructing residue codes. The analysis of well-known error detection and correction algorithms for RCPR is carried out. Their advantages and disadvantages are shown. The developed method of error correction for RCPR is described. For convenience, Table 1 shows the main symbols and variables that are used in this section.

3.1. Redundant Residue Codes

Residue codes in the polynomial ring are similar to residue codes (RC) by principles of construction [72,73,74]. In both codes, code combinations (CCs) are a set of residues obtained by dividing an integer C by the modules. In RC, the modules are relatively prime numbers m 1 < m 2 < < m n . Then RC CC is as follows:
C = ( C 1 ,     C 2 ,     ,   C n ) ,
where C C j mod m j ; j = 1 ,   ,   n .
The use of RC can increase the speed of computation due to the following:
C + A = C 1 + A 1 m 1 , C 2 + A 2 m 2 ,   ,   C n + A n m n , C A = C 1 A 1 m 1 , C 2 A 2 m 2 ,     ,   C n A n m n , C A = C 1 A 1 m 1 , C 2 A 2 m 2 ,     ,   C n A n m n ,
where A A j mod m j ; j = 1 ,   ,   n .
Therefore, RCs have found applications in real-time systems, particularly in digital signal processing [75,76,77,78], in neural network applications [79,80] and cryptography [81,82].
According to [73,74], the modules of the RCPR are irreducible polynomials chosen from condition (3), which are as follows:
deg p 1 ( x ) deg p 2 ( x )     deg p k ( x ) ,
where deg p i ( x ) is the degree of polynomial; i = 1 ,   ,   k .
Then RCPR CC for polynomial C(x) has the following form:
C ( x ) = ( C 1 ( x ) ,     C 2 ( x ) ,     ,   C k ( x ) ) ,
where C ( x ) C i ( x ) mod p i ( x ) ; i = 1 ,     , k .
Allowed RCPR CCs are determined by the range of allowed combinations, which is as follows:
P k ( x ) = i = 1 k p i ( x ) .
In this case, the following inequality holds [73]:
deg P k ( x ) > deg C ( x ) .
If the results of the modular operations represented by (7) do not exceed the range of allowed combinations (5), then the following is obtained:
C ( x ) + A ( x ) = C 1 ( x ) + A 1 ( x ) p 1 ( x ) , C 2 ( x ) + A 2 ( x ) p 2 ( x ) ,     ,   C k ( x ) + A k ( x ) p k ( x ) , C ( x ) A ( x ) = C 1 ( x ) A 1 ( x ) p 1 ( x ) , C 2 ( x ) A 2 ( x ) p 2 ( x ) ,     ,   C k ( x ) A k ( x ) p k ( x ) , C ( x ) A ( x ) = C 1 ( x ) A 1 ( x ) p 1 ( x ) , C 2 ( x ) A 2 ( x ) p 2 ( x ) ,     ,   C k ( x ) A k ( x ) p k ( x ) ,
where A ( x ) A i ( x ) mod p i ( x ) ; i = 1 ,   ,   k .
Analysis of expressions (2) and (7) allows us to conclude about the main advantages of residue codes. Firstly, it is the increase in the speed of calculations due to parallel execution of arithmetic operations in RC and RCPR. AES encryption algorithm is executed in the Galois field G F ( 2 8 ) modulo p ( x ) = x 8 + x 4 + x 3 + x + 1 . Therefore, based on the isomorphism generated by the Chinese Remainder Theorem in polynomials, calculations using this module can be replaced by calculations using two polynomials of the fourth degree. At the same time, RC cannot be used since calculations in it are performed using modules that are relatively prime numbers. Secondly, RCPR allows to detect and correct errors arising in the process of calculations due to independent execution of modular operations on modules. It is the latter property of RCPR that will be used to ensure the fault tolerance property of AES encryption systems.
In order to solve this problem, it is necessary to increase the set of modules of the RCPR by additional control modules. In [73], the error correction abilities of RCPRs were investigated. It was shown that the introduction of one control module p k + 1 ( x ) allows the RCPR to detect a single error, which means the distortion of one residue of the CC. In order to provide correction of a single error, it is necessary to increase the redundancy of the code at the expense of the second control module p k + 2 ( x ) . The possibility of correcting a single distorted residue with the help of two control modules p k + 1 ( x ) and p k + 2 ( x ) was proven in [83]. These modules need to satisfy the following inequality:
deg ( p k + 1 ( x ) p k + 2 ( x ) ) deg ( p k 1 ( x ) p k ( x ) ) .
Violation of this requirement leads to the fact that such redundant code will not be able to correct single errors. At the same time, the introduction of two control modules leads to an expansion of the set of residues. Now, the RCPR CC has the following two additional control residues:
C ( x ) = ( C 1 ( x ) ,   C 2 ( x ) ,   ,   C k ( x ) , C k + 1 ( x ) , C k + 2 ( x ) ) ,
It increases the range of possible CCs to a value of the following:
P k + 2 ( x ) = i = 1 k + 2 p i ( x ) = P k ( x ) p k + 1 ( x ) p k + 2 ( x ) = P k ( x ) P * ( x ) .
Using the approach applicable in redundant RCs, we check the redundant CC from the condition (6).
If condition (6) is satisfied, the redundant CC (9) is considered to be allowed and does not contain an error. Failure of condition (6) indicates that the combination (9) contains an error.

3.2. Error Correction Algorithms for RCPR and the Possibility of Their Application in AES Encryption System

Like RCs, RCPRs are characterized by the presence of many error correction algorithms. Obviously, when selecting an error correction algorithm, it is necessary to take into account the area in which the RCPRs is used. Most algorithms are based on the calculation of position characteristics (PC), which show the location of the redundant CC relative to the range of allowed combinations. One of the first algorithms to identify an erroneous residue and correct it is presented in [67]. In this algorithm, the projections from the redundant CC are first obtained. For this purpose, one residue is removed from the combination (9) one after another. So, j-th projection has the form of
C ˜ j ( x ) = ( C 1 ( x ) ,   ,   C j 1 ( x ) ,   C j + 1 ( x ) ,   ,   C k + 2 ( x ) ) .
Then the obtained combinations are translated into the positional code and the condition (6) is checked. If the projections satisfy the condition
deg   C ˜ 1 ( x ) ,   C ˜ 2 ( x ) ,   C ˜ 3 ( x ) ,   ,   C ˜ k + 2 ( x ) < deg P k ( x ) ,
then the CC does not contain any errors. If
deg   C ˜ 1 ( x ) ,   ,   C ˜ j 1 ( x ) ,   C ˜ j + 1 ( x ) ,   ,   C ˜ k + 2 ( x ) > deg P k ( x ) , deg   C ˜ j ( x ) < deg P k ( x ) ,
then the CC contains an error in the j-th residue. After that, the CC is corrected [67]. A modification of this algorithm, which allows to reduce the time cost of correction, is presented in [68].
In [67], it is proposed to use interval-index characteristic for error correction, which is defined by the equality
L ( x ) = C ( x ) P k ( x ) ,
where [ ] is the whole part of the result of dividing C(x) by the range of the allowed combinations P k ( x ) .
If condition (6) is satisfied, then L ( x ) = 0 . However, the division operation is not performed in RCPRs. Therefore, an algorithm was proposed in [69] which utilizes the Chinese Residue Theorem (CRT):
L ( x ) = i = 1 k + 2 C i ( x ) B i ( x ) P k ( x ) P * ( x ) + = i = 1 k + 2 C i ( x ) K i ( x ) + j = 1 n C j ( x ) B ¨ j ( x ) P k ( x ) P * ( x ) + ,
where B i ( x ) = K i ( x ) P k ( x ) + B ¨ i ( x ) is the orthogonal basis of the RCPR; B ¨ i ( x ) B i ( x ) mod p i ( x ) ; i = 1 ,     k + 2 .
The algorithm based on the CRT isomorphism allows to reduce the computation time of L(x) [83]. Then (15) will take the form
L k + 1 ( x ) = i = 1 k X i ( x ) K i ( x ) P k + 1 ( x ) + + C k + 1 ( x ) K k + 1 ( x ) P k + 1 ( x ) + r ¨ ( x ) p k + 1 ( x ) + , L k + 2 ( x ) = i = 1 k X i ( x ) K i ( x ) P k + 2 ( x ) + + C k + 2 ( x ) K k + 2 ( x ) P k + 2 ( x ) + r ¨ ( x ) p ( x ) + ,
where r ¨ ( x ) is the rank of the redundancy-free CC defined by (4).
MRS is widely used for error correction in residue code. In this case, the polynomial C(x) is represented using MRS coefficients D i ( x ) according to (17):
C ( x ) = D 1 ( x ) + D 2 ( x ) p 1 ( x ) + D 2 ( x ) p 1 ( x ) p 2 ( x ) + + + D k + 1 ( x ) P k ( x ) + D k + 2 ( x ) P k ( x ) p k + 1 ( x ) .
From (17) we can see that if condition (6) is satisfied, then the higher coefficients of MRS D k + 1 ( x ) = 0 , D k + 2 ( x ) = 0 . Algorithms for calculating these coefficients are given in [70,71]
However, despite the variety of error correction algorithms for RCPR using two control modules, it is impossible to apply them to search and correct errors in AES encryption system. This is due to the fact that there are only three irreducible polynomials of degree four. In [84], the first two polynomials p 1 ( x ) = x 4 + x + 1 and p 2 ( x ) = x 4 + x 3 + 1 are used as informational modules on which linear and nonlinear transformations in AES are performed. Therefore, there remains only one polynomial p 3 ( x ) = x 4 + x 3 + x 2 + x + 1 of the fourth degree, which can act as a control module. The use of a polynomial with a degree greater than four as a control module leads to an increase in hardware costs. Thus, in the tabular implementation of operations (7), a lookup table (LUT) table containing 256 memory elements will be required for a fourth-degree polynomial, and 1024 for a fifth-degree polynomial.
In [84], the use of a single control module p 3 ( x ) = x 4 + x 3 + x 2 + x + 1 is shown to improve the robustness of AES encryption system. Since only one control module is used in the RCPR, this code only allows for error detection within a single residue. Let us consider the process of error detection when performing the non-linear SubBytes transformation in RCPR. This transformation implements a substitution operation. The input of the converter (S-table) receives a byte, which is represented as a tuple consisting of three residues:
S ( x ) = ( S 1 ( x ) ,   S 2 ( x ) ,   S 3 ( x ) ) ,
where S ( x ) = S i ( x ) mod p i ( x ) ; i = 1 ,   2 ,   3 .
In accordance with the rules of S-table construction, a byte is taken from its output, which is also represented in the RCPR:
S ( x ) = ( S 1 ( x ) ,   S 2 ( x ) ,   S 3 ( x ) ) ,
where S ( x ) = S i ( x ) mod p i ( x ) ; i = 1 ,   2 ,   3 .
Let a byte S ( x ) = 3 B be the input to the S-table. Then the output value of the byte is equal to
S ( x ) = S u b B y t e s ( S ( x ) ) = S u b B y t e s ( 3 B ) = E 2 .
The input byte is represented as S ( x ) = 3 B = ( E ,   9 ,   5 ) . The output byte has the form S ( x ) = E 2 = ( 3 ,   1 ,   5 ) . To detect the error of performing Subbytes transformation, the authors proposed to create three LUTs of size 256 × 4 bits. The first table stores the first residue of the output byte S 1 ( x ) = 3 . The storage rule is defined as T a b l e 1 ( E ,   9 ) = 3 . The storage rule for the second residue S 2 ( x ) = 1 is defined as T a b l e 2 ( E ,   5 ) = 1 . The storage rule for the third residue of the output byte is defined as T a b l e 3 ( 9 ,   5 ) = 5 . To detect the error, the residues S ( x ) = E 2 = ( 3 ,   1 ,   5 ) are converted to a positional code using CRT:
S ( x ) = S 1 ( x ) B 1 ( x ) + S 2 ( x ) B 2 ( x ) + S 3 ( x ) B 3 ( x ) mod p 3 ( x ) ,
where B i ( x ) is an orthogonal basis; i = 1 ,   2 ,   3 .
Then the condition (6) is checked. The main disadvantage of this algorithm is that it only allows us to detect the error that occurs in the process of performing linear and nonlinear transformations in AES. The developed error correction algorithm, in which two redundant residues are computed using one control module p 3 ( x ) = x 4 + x 3 + x 2 + x + 1 , allows us to eliminate this drawback. The presence of two control residues allows for the correction of one erroneous residue in the RCPR CC.
In order to correct the RCPR CC, it is necessary to determine the location of the erroneous residue and the error depth. So, the solution of these problems falls on two control residues of the RCPR CC in the developed algorithm. In this case, the first control residue C 3 ( x ) should show the error depth. This can be ensured by adding modulo the two informational residues C 1 ( x ) and C 2 ( x ) . To determine the location of the erroneous residue, the second control residue C 4 ( x ) is used. It is the sum modulo p 3 ( x ) = x 4 + x 3 + x 2 + x + 1 of the first C 1 ( x ) and the second C 2 ( x ) informational residues, last of which is multiplied by x. In other words, the control residues are calculated according to the following rule:
C 3 ( x ) = C 1 ( x ) + C 2 ( x ) , C 4 ( x ) = C 1 ( x ) + x C 2 ( x ) mod p 3 ( x ) .
The residues obtained using expression (22) are calculated in advance. These correct residues are written to the LUTs of the Error Detection and Correction Unit (EDCU). In this case, the calculation of C 3 ( x ) and C 4 ( x ) will require two clock cycles of EDCU (one to access the LUT and one to perform the modulo two operation).
In order to correct an erroneous residue, it is necessary to perform the operation of calculating control residues using informational residues C 1 ( x ) and C 2 ( x ) according to
C 3 * ( x ) = C 1 ( x ) + C 2 ( x ) , C 4 * ( x ) = ( C 1 ( x ) + x C 2 ( x ) ) mod p 3 ( x ) .
These are then compared with the residues that are recorded in the LUTs. For this purpose, the error syndrome is calculated:
δ 1 ( x ) = C 3 ( x ) + C 3 * ( x ) , δ 2 ( x ) = C 4 ( x ) + C 4 * ( x ) .
If the error syndrome is zero, then CC does not contain an erroneous residue. If the error syndrome is different from zero, then CC contains an erroneous residue. In this case, the following options are possible.
The first option. As a result of calculating the error syndrome according to (24), we obtained δ 1 ( x ) = δ 2 ( x ) . This corresponds to the situation when the error occurred in the first residue. Let us check it. Let the error depth of the first residue be equal to Δ C 1 ( x ) . Then the distorted residue will take the following form:
C 1 ( x ) = C 1 ( x ) + Δ C 1 ( x ) ,
where deg Δ C 1 ( x ) < deg p 1 ( x ) .
Then, according to (23), the first control residue is equal to the following:
C 3 * ( x ) = C 1 ( x ) + C 2 ( x ) = ( C 1 ( x ) + C 2 ( x ) ) + Δ C 1 ( x )
and the second residue is determined from the following equality
C 4 * ( x ) = | ( C 1 ( x ) + x C 2 ( x ) + Δ C 1 ( x ) | p 3 ( x ) .
Let us substitute these values into (24). We obtain the following:
δ 1 ( x ) = ( C 1 ( x ) + C 2 ( x ) ) + ( C 1 ( x ) + Δ C 1 ( x ) + C 2 ( x ) ) = Δ C 1 ( x ) , δ 2 ( x ) = | C 1 ( x ) + x C 2 ( x ) | p 3 ( x ) + | C 1 ( x ) + x C 2 ( x ) + Δ C 1 ( x ) | p 3 ( x ) = Δ C 1 ( x ) .
Then the correction of the error in the first residue is performed according to the following:
C 1 ( x ) = C 1 ( x ) + Δ δ 1 ( x ) .
The second option. As a result of calculating the error syndrome according to (24), we obtained δ 1 ( x ) 0 ,     δ 2 ( x ) = 0 or δ 1 ( x ) = 0 ,     δ 2 ( x ) 0 . This corresponds to the situation when the error occurred in the first or the second control residue, respectively. If the error occurred in the first control residue, the following correction is performed:
C 3 ( x ) = C 3 ( x ) + Δ δ 1 ( x ) .
If the error occurred in the second control residue, the following correction is performed:
C 4 ( x ) = C 4 ( x ) + Δ δ 2 ( x ) .
The third option. As a result of calculating the error syndrome according to (24), we obtained δ 1 ( x ) δ 2 ( x ) . This corresponds to the situation when the error occurred in the second residue. Let us check it. Let the error depth of the second residue be equal to Δ C 2 ( x ) . Then the distorted residue will take the following form:
C 2 ( x ) = C 2 ( x ) + Δ C 2 ( x ) ,
where deg Δ C 2 ( x ) < deg p 2 ( x ) .
Then, according to (23), we obtain the following:
C 3 * ( x ) = C 1 ( x ) + C 2 ( x ) = ( C 1 ( x ) + C 2 ( x ) ) + Δ C 2 ( x ) , C 4 * ( x ) = ( C 1 ( x ) + x ( C 2 ( x ) + Δ C 2 ( x ) ) p 3 ( x ) .
Let us substitute these values into (24). We obtain the following:
δ 1 ( x ) = ( C 1 ( x ) + C 2 ( x ) ) + ( C 1 ( x ) + C 2 ( x ) + Δ C 1 ( x ) ) = Δ C 2 ( x ) , δ 2 ( x ) = C 1 ( x ) + x C 2 ( x ) p 3 ( x ) + C 1 ( x ) + x ( C 2 ( x ) + Δ C 2 ( x ) ) p 3 ( x ) = x C 2 ( x ) p 3 ( x ) .
Then the correction of the error in the second residue is performed according to the following:
C 2 ( x ) = C 2 ( x ) + Δ δ 1 ( x ) .
Let us consider the application of the developed error correction algorithm when performing linear and nonlinear transformations in AES encryption system.

4. Implementation of Linear and Nonlinear Transformations of AES Encryption Algorithm in RCPR

This section describes the implementation of nonlinear and linear transformations in AES encryption algorithm based on the developed error correction method for RCPR.

4.1. Implementation of Nonlinear Transformations in Redundant RCPR

According to [85,86], one round of AES includes the following transformations:
  • Byte replacement using nonlinear SubBytes transformation;
  • Byte cyclic shift (ShiftRows);
  • Linear transformation (MixColumns);
  • Round-robin addition (AddRoundKey).
The analysis of [84,87] has shown that the greatest hardware costs are required for implementation of nonlinear and linear transformations. Therefore, the detection and correction of errors with the developed algorithm will be performed exactly in these transformations.
When implementing the nonlinear SubBytes transformation in residue codes, the input bytes are represented as a tuple of two residues, which are obtained on informational bases p 1 ( x ) = x 4 + x + 1 and p 2 ( x ) = x 4 + x 3 + 1 :
S ( x ) = ( S 1 ( x ) ,   S 2 ( x ) ) ,
where S ( x ) = S i ( x ) mod p i ( x ) ; i = 1 ,   2 .
The output byte of the S-table is represented as four residues:
S ( x ) = ( S 1 ( x ) ,   S 2 ( x ) ,   S 3 ( x ) ,   S 4 ( x ) ) .
The first two residues of the CC for the output byte are informational and are calculated according to S ( x ) = S i ( x ) mod p i ( x ) , where i = 1 ,   2 . The obtained values are entered into the first two S-tables, i.e., S T a b l e 1 and S T a b l e 2 . The two remaining residues are the control ones, which are computed using the developed error correction algorithm:
S 3 ( x ) = S 1 ( x ) + S 2 ( x ) , S 4 ( x ) = ( S 1 ( x ) + x S 2 ( x ) ) mod p 3 ( x ) .
The control residues are calculated in advance and entered into the third and fourth S-tables, i.e., S T a b l e 3 and S T a b l e 4 . In these two tables, the corresponding residues of the output byte are located at the intersection of the row, which is defined by the first residue S 1 ( x ) of the input byte, and the column by the second residue S 2 ( x ) . Table A1, Table A2, Table A3 and Table A4 show the locations of the output byte residues. The tables are shown in the Appendix A.
Thus, the nonlinear transformation of SubBytes with the redundant RCPR is implemented as follows.
  • Forward converters perform a conversion from positional code (PC) to RCPR S ( x ) ) = ( S 1 ( x ) ,   S 2 ( x ) ) .
  • Based on the tables T a b l e 1 ( S 1 ( x ) ,   S 2 ( x ) ) = S 1 ( x ) , T a b l e 2 ( S 1 ( x ) ,   S 2 ( x ) ) = S 2 ( x ) , T a b l e 3 ( S 1 ( x ) ,   S 2 ( x ) ) = S 3 ( x )   T a b l e 4 ( S 1 ( x ) ,   S 2 ( x ) ) = S 4 ( x ) , a transformation is performed:
    S ( x ) = S u b B y t e s ( S ( x ) ) = ( S 1 ( x ) ,   S 2 ( x ) ,   S 3 ( x ) ,   S 4 ( x ) ) .
  • Using the informational residues of the output byte, new control residues are calculated:
    S 3 * ( x ) = S 1 ( x ) + S 2 ( x ) , S 4 * ( x ) = ( S 1 ( x ) + x S 2 ( x ) ) mod p 3 ( x ) .
  • Using two adders modulo two, the error syndrome is calculated:
    δ 1 ( x ) = S 3 ( x ) + S 3 * ( x ) , δ 2 ( x ) = S 4 ( x ) + S 4 * ( x ) .
  • The residues of the output byte are fed to the correcting adders modulo two, where they are added to the error vector e ( x ) = ( e 1 ( x ) ,   e 2 ( x ) ,   e 3 ( x ) , e 4 ( x ) ) :
    S i ( x ) = S i ( x ) + e i ( x ) ,
    where i = 1 ,   ,   4 .
If the error syndrome is zero ( δ 1 ( x ) = δ 2 ( x ) = 0 ), the error vector is e ( x ) = ( e 1 ( x ) ,   e 2 ( x ) ) = ( 0 ,   0 ) .
Similarly, substitution is performed in the decryptor using the InvSubBytes procedure.

4.2. Implementation of Linear Transformations in Redundant RCPR

The MixColumns linear transformation of AES encryption algorithm is based on the mixing procedures of the state columns S. In this case, all bytes are converted into polynomial form and then calculations are performed over them:
S ( 0 c ) S ( 1 c ) S ( 2 c ) S ( 3 c ) = 02 03 01 01 01 02 03 01 01 01 02 03 03 01 01 02 S ( 0 c ) S ( 1 c ) S ( 2 c ) S ( 3 c ) ,
where C is the column number; C = 0, 1, 2, 3.
Since the operations of modular multiplication and addition are used in (43), the MixColumns transformation can be implemented with RCPR according to the following:
S i ( 0 c ) S i ( 1 c ) S i ( 2 c ) S i ( 3 c ) = 02 03 01 01 01 02 03 01 01 01 02 03 03 01 01 02 S i ( 0 c ) S i ( 1 c ) S i ( 2 c ) S i ( 3 c ) ,
where S ( n c ) = S i ( n c ) mod p i ( x ) ; S ( n c ) = S i ( n c ) mod p i ( x ) ; n = 1 ,   2 ; c = 1 ,   2 .
As a result of execution (44), the informational residues of output bytes will be determined by the following:
S i ( 0 c ) = ( 02 S i ( 0 c ) ) + ( 03 S i ( 1 c ) ) + S i ( 2 c ) + S i ( 3 c ) , S i ( 1 c ) = ( 02 S i ( 1 c ) ) + ( 03 S i ( 2 c ) ) + S i ( 3 c ) + S i ( 0 c ) , S i ( 2 c ) = ( 02 S i ( 2 c ) ) + ( 03 S i ( 3 c ) ) + S i ( 0 c ) + S i ( 1 c ) , S i ( 3 c ) = ( 02 S i ( 3 c ) ) + ( 03 S i ( 0 c ) ) + S i ( 1 c ) + S i ( 3 c ) .
Since the mixing operation (45) will be performed using LUTs, a total of eight tables will be required for each multiplication by the constants {02} and {03}. However, the number of LUTs can be reduced if the transformation (45) is cast to the following form:
S i ( 0 c ) = ( 02 S i ( 0 c ) ) + ( 02 S i ( 1 c ) + S i ( 1 c ) ) + S i ( 2 c ) + S i ( 3 c ) , S i ( 1 c ) = ( 02 S i ( 1 c ) ) + ( 02 S i ( 2 c ) + S i ( 2 c ) ) + S i ( 3 c ) + S i ( 0 c ) , S i ( 2 c ) = ( 02 S i ( 2 c ) ) + ( 02 S i ( 3 c ) + S i ( 3 c ) ) + S i ( 0 c ) + S i ( 1 c ) , S i ( 3 c ) = 02 S i ( 3 c ) + 02 S i ( 0 c ) + S i ( 4 c ) + S i ( 1 c ) + S i ( 3 c ) .
In this case, when performing the MixColumns transformation with redundant RCPR, redundant RCPR CCs that contain two control residues can be used. To perform the multiplication operation by {02}, the informational residues of the corresponding byte are input to the four LUTs. The parameters of these tables are presented in the Appendix B. Table A5 and Table A6 show the results of the operations S 1 ( n c ) = 02 S ( n c ) p 1 ( x ) and S 2 ( n c ) = 02 S ( n c ) p 2 ( x ) , which are at the intersection of the row that is given by the residue S 1 ( x ) , and the column that is given by the residue S 2 ( x ) . Table A7 and Table A8 present the values of the control residues S 3 ( n c ) and S 4 ( n c ) . The informational residues of the product are taken from the outputs of the first two tables. The control residues are taken from the outputs of the third and fourth tables. After that, a parallel summation of all residues of the redundant RCPR CCs is performed.
Thus, the linear MixColumns transformation with redundant RCPR is implemented as follows.
  • Forward converters perform a conversion from PC to RCPR S ( n c ) ) = ( S 1 ( n c ) ,   S 2 ( n c ) ,   S 3 ( n c ) ,   S 4 ( n c ) ) .
  • Let n = 0, c = 0. Then the tables are used to determine the results of multiplication of two bytes by the constant {02}.
    The first byte:
    T a b l e 1 S 1 n , c ,   S 2 n , c = S 1 n , c ,
    T a b l e 2 S 1 n , c ,   S 2 n , c = S 2 n , c ,
    T a b l e 3 S 1 n , c ,   S 2 n , c = S 3 n , c ,
    T a b l e 4 S 1 n , c ,   S 2 n , c = S 4 n , c .
    The second byte:
    T a b l e 1 S 1 n + 1 4 , c ,   S 2 n + 1 4 , c = S 1 n + 1 4 , c ,
    T a b l e 2 S 1 n + 1 4 , c ,   S 2 n + 1 4 , c = S 2 n + 1 4 , c ,
    T a b l e 3 S 1 n + 1 4 , c ,   S 2 n + 1 4 , c = S 3 n + 1 4 , c ,
    T a b l e 4 S 1 n + 1 4 , c ,   S 2 n + 1 4 , c = S 4 n + 1 4 , c .
  • For a given value of n, the variable c changes from 0 to 3. As a result, a linear transformation is performed:
    S ( n c ) = M i x C o l u m n s ( S ( n c ) ) = ( S 1 ( x ) ,   S 2 ( x ) ,   S 3 ( x ) ,   S 4 ( x ) ) .
  • Using the informational residues of the output byte, new control residues are calculated according to (40).
  • Using two adders modulo two, the error syndrome is calculated according to (41).
  • The residues of the output byte are fed to the corrective adders modulo two, where they are added to the error vector e ( x ) = ( e 1 ( x ) ,   e 2 ( x ) ,   e 3 ( x ) , e 4 ( x ) ) according to (42).
Similarly, a linear transformation is performed in the decryptor using the InvMixColumns procedure. The peculiarity is that the bytes are multiplied by the constants {0B}, {0D}, {09} and {0E} in this transformation. In this case, four LUTs are used for each multiplication.

5. Results

Let us consider the execution of one round of encryption in AES algorithm as bytes in the first case and as RCPR in the second case. Let the encryptor input be a set of 16 bytes:
a 0 = 90 ,   a 1 = 01 ,   a 2 = 30 ,   a 3 = 28 ,   a 4 = 00 ,   a 5 = 54 ,   a 6 = 5 B ,   a 7 = D 0 ,   a 8 = 87 ,   a 9 = 08 ,   a A = 7 B ,   a B = 87 ,   a C = 09 ,   a D = 1 E ,   a E = 86 ,   a F = 0 A .
Figure 1a shows the data that is input to the SubBytes transformer. The output of the SubBytes transformer produces the result shown in Figure 1b. Figure 1c shows the state at the output of the ShiftRows transformer.
Figure 2 shows the state at the output of the MixColumns linear transformer and the execution of the AddRoundKey transformation with the following key:
k 0 = 10 ,   k 1 = 11 ,   k 2 = 12 ,   k 3 = 13 ,   k 4 = 14 ,   k 5 = 15 ,   k 6 = 16 ,   k 7 = 17 ,   k 8 = 18 ,   k 9 = 19 ,   k A = 1 A ,   k B = 1 B ,   k C = 1 C ,   k D = 1 D ,   k E = 1 E ,   k F = 1 F .
The result of performing an AddRoundKey transformation is 16 bytes of cipher text:
C 0 = F 6 ,   C 1 = B 4 ,   C 2 = E F ,   C 3 = A A ,   C 4 = 30 ,   C 5 = 23 ,   C 6 = 89 ,   C 7 = F 1 ,   C 8 = B 3 ,   C 9 = 71 ,   C A = D 6 ,   C B = E 0 ,   C C = 73 ,   C D = B 5 ,   C E = 91 ,   C F = 98 .
Let us consider the decryption process in AES. The decryptor input is a cipher text containing 16 bytes, which is summed modulo two with the key. The process of InvAddRoundKey conversion is shown in Figure 3. The obtained result is fed to the input of the InvMixColumns transformer.
The byte values obtained after executing the InvMixColumns transformation are shown in Figure 4a. The results of the InvShiftRows transformation are shown in Figure 4b. The result of executing InvSubBytes transformation is the text shown in Figure 4c.
Let us consider the performance of AES encryption procedure with the RCPR. For this purpose, the input data are represented as RCPR CCs. The first byte a 0 = 90 is passed to the input of the AES encryptor. Then it is passed to the forward converter from positional code to RCPR. Let us present this byte in binary and polynomial forms:
a ( 0 ) = 90 = 10010000 = x 7 + x 4 .
Then, the following RCPR CC consisting of two residues is obtained at the output of the converter:
a 1 ( 0 ) = x 7 + x 4 x 4 + x + 1 = x 3 = 1000 = 8 , a 2 ( 0 ) = x 7 + x 4 x 4 + x 3 + 1 = x 3 + x 2 + x = 1110 = E .
In other words, we have a ( 0 ) = x 7 + x 4 = ( 8 ,   E ) . Similarly, the rest of the 15 input bytes are converted, so we obtain the following:
a ( 0 ) = 90 = ( 8 ,   E ) ,   a ( 1 ) = 01 = ( 1 ,   1 ) ,   a ( 2 ) = 30 = ( 5 ,   2 ) ,   a ( 3 ) = 28 = ( E ,   3 ) ,   a ( 4 ) = 00 = ( 0 ,   0 ) ,   a ( 5 ) = 54 = ( B ,   2 ) ,   a ( 6 ) = 5 B = ( 4 ,   D ) ,   a ( 7 ) = D 0 = ( 4 ,   1 ) , a ( 8 ) = 87 = ( C ,   0 ) ,   a ( 9 ) = 08 = ( 8 ,   8 ) ,   a ( A ) = 7 B = ( 2 ,   6 ) ,   a ( B ) = 87 = ( C ,   0 ) , a ( C ) = 09 = ( 9 ,   9 ) ,   a ( D ) = 1 E = ( D ,   7 ) ,   a ( E ) = 86 = ( D ,   1 ) ,   a ( F ) = 0 A = ( A ,   A ) .
Let us present the key consisting of 16 bytes in RCPR. As a result, we obtain the following:
k ( 0 ) = 10 = ( 3 ,   9 ) ,   k ( 1 ) = 11 = ( 2 ,   8 ) ,   k ( 2 ) = 12 = ( 1 ,   B ) ,   k ( 3 ) = 13 = ( 0 ,   A ) , k ( 4 ) = 14 = ( 7 ,   D ) ,   k ( 5 ) = 15 = ( 6 ,   C ) ,   k ( 6 ) = 16 = ( 5 ,   F ) ,   k ( 7 ) = 17 = ( 4 ,   E ) ,   k ( 8 ) = 18 = ( B ,   1 ) ,   k ( 9 ) = 19 = ( A ,   0 ) ,   k ( A ) = 1 A , = ( 9 ,   3 )   , k ( B ) = 1 B = ( 8 ,   2 ) , k ( C ) = 1 C = ( F ,   5 ) ,   k ( D ) = 1 D = ( E ,   4 ) ,   k ( E ) = 1 E = ( D ,   7 ) ,   k ( F ) = 1 F = ( C ,   6 ) .
Let us consider a nonlinear SubBytes transformation using a byte. The byte S 00 = 90 = 10010000 is input to the transformer. At the intersection of row “9” and column “0” of Table A9 in the Appendix C, there is a number S 00 = 60 = 01100000 , which is passed to the output of the SubBytes transformer.
Let us consider the operation of the fault-tolerant SubBytes transformer with RCPR. According to Section 4.1, the nonlinear transformation is implemented as follows:
  • The first byte, in the form of two residues S 00 = 90 = 10010000 = x 7 + x 5 = ( 8 ,   E ) , arrives at the input of the fault-tolerant SubBytes transformer, which contains four tables of 256 × 4 bits.
  • In the Appendix A, Table A1 and Table A2 show the informational residues of the output byte S 00 = 60 . Table A3 and Table A4 show the control residues of the output byte S 00 = 60 . There are informational residues S 1 ( x ) = A = x 3 + x and S 2 ( x ) = 4 = x 2 at the intersection of row «8» and column «E» in Table A1 and Table A2. There are control residues S 3 ( x ) = E = x 3 + x 2 + x and S 4 ( x ) = 2 = x at the intersection of row «8» and column «E» in Table A3 and Table A4. As a result of transformation (39), we obtain the following:
    S ( x ) = ( A ,   4 ,   E ,   2 ) = ( x 3 + x ,   x 2 ,   x 3 + x 2 + x ,   x ) .
  • Using the informational residues of the output byte, let us calculate new control residues according to (40). We obtain the following:
    S 3 * ( x ) = S 1 ( x ) + S ( x ) = ( x 3 + x ) + x 2 = x 3 + x 2 + x = E , S 4 * ( x ) = | S 1 ( x ) + x S 2 ( x ) | p 3 ( x ) = ( x 3 + x ) + x x 2 x 4 + x 3 + x 2 + x + 1 = x = 2 .
  • We calculate the error syndrome according to (41) using two adders modulo two. We obtain the following:
    δ 1 ( x ) = S 3 ( x ) + S 3 * ( x ) = ( x 3 + x 2 + x ) + ( x 3 + x 2 + x ) = 0 , δ 2 ( x ) = S 4 ( x ) + S 4 * ( x ) = x + x = 0 .
  • The residues of the output byte are fed to the corrective adders modulo two. Since the error syndrome is δ 1 ( x ) = δ 2 ( x ) = 0 , the combination S ( x ) = ( A ,   4 ,   E ,   2 ) does not contain errors.
Let us suppose an error occurs in the first residue when reading the data and its depth is equal to Δ S 1 ( x ) = 1 . Then the distorted residue, according to (25), will take the following form:
S 1 ( x ) = S 1 ( x ) + Δ S 1 ( x ) = ( x 3 + x ) + 1 = x 3 + x + 1 = B .
Then, the distorted CC has the following form:
S ( x ) = ( B ,   4 ,   E ,   2 ) = ( x 3 + x + 1 ,   x 2 ,   x 3 + x 2 + x ,   x ) .
Using the informational residues of the output byte, let us calculate new control residues according to (40). We obtain the following:
S 3 * ( x ) = S 1 ( x ) + S 2 ( x ) = ( x 3 + x + 1 ) + x 2 = x 3 + x 2 + x + 1 = F , S 4 * ( x ) = S 1 ( x ) + x S 2 ( x ) p 3 ( x ) = ( x 3 + x + 1 ) + x x 2 x 4 + x 3 + x 2 + x + 1 = x + 1 = 3 .
Using two adders modulo two we calculate the error syndrome according to (41). We obtain the following:
δ 1 ( x ) = S 3 ( x ) + S 3 * ( x ) = ( x 3 + x 2 + x ) + ( x 3 + x 2 + x + 1 ) = 1 , δ 2 ( x ) = S 4 ( x ) + S 4 * ( x ) = x + ( x + 1 ) = 1 .
Since δ 1 ( x ) = δ 2 ( x ) = 1 , the error vector e ( x ) = ( 1 ,   0 ,   0 , 0 ) is used in error correction. According to (42), we have the following:
S ( x ) = ( x 3 + x + 1 ,   x 2 ,   x 3 + x 2 + x ,   x ) + ( 1 ,   0 ,   0 ,   0 ) = ( x 3 + x ,   x 2 ,   x 3 + x 2 + x ,   x ) .
The error is corrected.
Let us consider the operation of the fault-tolerant MixColumns transformer with RCPR. First, let us perform this operation using bytes. Let MixColumns transformer has four bytes as the input: S ( 00 ) = 60 = 01100000 = x 6 + x 5 , S ( 10 ) = 20 = 00100000 = x 5 , S ( 20 ) = 21 = 00100001 = x 5 + 1 , S ( 30 ) = 67 = 01100111 = x 6 + x 5 + x 2 + x + 1 . Then, according to (45), we have the following:
S ( 00 ) = 02 S ( 00 ) + 03 S ( 10 ) + S ( 20 ) + S ( 30 ) = x ( x 6 + x 5 ) + ( x + 1 ) x 5 + ( x 5 + 1 ) + ( x 6 + x 5 + x 2 + x + 1 ) = x 7 + x 6 + x 5 + x 2 + x = 11100110 = E 6 .
According to Section 4.2, the linear transformation is implemented as follows:
  • The input of the fault-tolerant transformer receives four bytes, represented in RCPR as S ( 00 ) = 60 = ( A ,   4 ,   E ,   2 ) , S ( 10 ) = 20 = ( 6 ,   B ,   D ,   9 ) , S ( 20 ) = 21 = ( 7 ,   A ,   D ,   A ) , S ( 30 ) = 67 = ( D ,   3 ,   E ,   B ) .
  • Then, using the four tables, we obtain the CC for the product of a byte and a constant {02}. In the Appendix B, Table A5 and Table A6 show the informational residues after the multiplication operation. Table A7 and Table A8 show the control residues. In the considered example, the computation of the zero byte represented in RCPR is implemented according to (46). Then
    S i ( 00 ) = 02 S i ( 00 ) + 02 S i ( 10 ) + S i ( 10 ) + S i ( 20 ) + S i ( 30 )
    where i = 1 ,   ,   4 .
From (50), we can see that S(00) and S(10) are subjected to multiplication by a constant. In this case, the inputs of Table A5, Table A6, Table A7 and Table A8 first receive two informational residues S ( 00 ) = 60 = ( A ,   4 ) . The residues of the resulting product 02 S ( 00 ) = ( 7 ,   8 ,   F ,   8 ) are at the intersection of row «A» and column «4». Then the inputs of Table A5, Table A6, Table A7 and Table A8 receives two informational residues S ( 10 ) = 20 = ( 6 ,   B ) . The residues of the resulting product 02 S ( 10 ) = ( C ,   F ,   3 ,   D ) are at the intersection of row «6» and column «B». Table 2 shows the application of (50).
The result is S ( 00 ) = E 6 = ( 7 ,   5 ,   2 ,   D ) , which is subjected to error correction.
3.
Using the informational residues of the output byte, let us calculate new control residues according to (40). We obtain
S 3 * ( x ) = S 1 ( x ) + S 2 ( x ) = ( x 2 + x + 1 ) + ( x 2 + 1 ) = x = 2 , S 4 * ( x ) = S 1 ( x ) + x S 2 ( x ) p 3 ( x ) = ( x 2 + x + 1 ) + x ( x 2 + 1 ) p 3 ( x ) = x 3 + x 2 + 1 = D .
4.
Using two adders modulo two, we calculate the error syndrome according to (41). We obtain
δ 1 ( x ) = S 3 ( x ) + S 3 * ( x ) = x + x = 0 , δ 2 ( x ) = S 4 ( x ) + S 4 * ( x ) = ( x 3 + x 2 + 1 ) + ( x 3 + x 2 + 1 ) = 0 .
5.
The residues of the output byte are fed to the corrective adders modulo two. Since the error syndrome is δ 1 ( x ) = δ 2 ( x ) = 0 , the CC S ( 00 ) = E 6 = ( 7 ,   5 ,   2 ,   D ) does not contain errors.
Let us suppose there was an error while reading data in the second residue, and its depth is equal to Δ S 2 ( x ) = 1 . Then the distorted residue, according to (25), will take the following form:
S 2 ( x ) = S 2 ( x ) + Δ S 2 ( x ) = ( x 2 + 1 ) + 1 = x 2 = 4 .
Then, the distorted CC has the following form:
S ( 00 ) = ( 7 ,   4 ,   2 ,   D ) = ( x 2 + x + 1 ,   x 2 ,   x ,   x 3 + x 2 + 1 ) .
Using the informational residues of the output byte, let us calculate the new control residues according to (40). We obtain
S 3 * ( x ) = S 1 ( x ) + S 2 ( x ) = ( x 2 + x + 1 ) + x 2 = x + 1 = 3 , S 4 * ( x ) = S 1 ( x ) + x S 2 ( x ) p 3 ( x ) = ( x 2 + x + 1 ) + x x 2 p 3 ( x ) = x 3 + x 2 + x + 1 = F .
Using two adders modulo two, we calculate the error syndrome according to (41). We obtain
δ 1 ( x ) = S 3 ( x ) + S 3 * ( x ) = ( x ) + ( x + 1 ) = 1 , δ 2 ( x ) = S 4 ( x ) + S 4 * ( x ) = ( x 3 + x 2 + 1 ) + ( x 3 + x 2 + x + 1 ) = x .
Since δ 1 ( x ) = 1 and δ 2 ( x ) = x , the error occurred in the second residue. Then the error vector is equal to e ( x ) = ( 0 ,   1 ,   0 , 0 ) . According to (42), we have the following:
S ( 00 ) = ( x 2 + x + 1 ,   x 2 ,   x ,   x 3 + x 2 + 1 ) + ( 1 ,   0 ,   0 ,   0 ) = = ( x 2 + x + 1 ,   x 2 + 1 ,   x ,   x 3 + x 2 + 1 ) = ( 7 ,   5 ,   2 ,   D ) .
The error is corrected.
Figure 5a shows CCs at the output of the forward converter from positional code to RCPR. These CCs are passed to the input of the nonlinear SubBytes transformer. The output of the SubBytes transformer produces the result shown in Figure 5b. At the same time, the redundant RCPR CCs are obtained from the output of this transformer. Figure 5c shows the state at the output of the ShiftRows transformer.
Figure 6 shows the state at the output of the MixColumns linear transformer and the execution of the AddRoundKey transformation with the key represented in RCPR according to (49).
In this case, only the informational residues are added. The result of performing the AddRoundKey transformation is 16 bytes of the cipher text represented in RCPR. CCs are then subjected to the inverse conversion from RCPR to positional code. This operation is performed based on the Chinese Remainder Theorem (CRT) according to (21). B 1 ( x ) = x 7 + x 5 + x 3 + x 2 + 1 and B 2 ( x ) = x 7 + x 5 + x 3 + x 2 + 1 are orthogonal bases for RCPR with two informational modules p 1 ( x ) = x 4 + x + 1 and p 2 ( x ) = x 4 + x 3 + 1 . In this case, the range of allowed combinations is P 2 ( x ) = x 8 + x 7 + x 5 + x 4 + x 3 + x + 1 . Let us perform the inverse conversion for the zero byte C 00 ( x ) = ( 4 ,   B ) = ( x 2 ,     x 3 + x + 1 ) . Then, according to (21), we have
C 00 ( x ) = C 1 ( x ) B 1 ( x ) + C 2 ( x ) B 2 ( x ) mod P 2 ( x ) = x 2 ( x 7 + x 5 + x 3 + x 2 ) + ( x 3 + x + 1 ) ( x 7 + x 5 + x 3 + x 2 + 1 ) x 8 + x 7 + x 5 + x 4 + x 3 + x + 1 = x 7 + x 6 + x 5 + x 4 + x 2 + x = 11110110 = F 6 .
The decryption process in AES with RCPR is shown in Figure 7 and Figure 8. The cipher text is first converted from positional code to RCPR. Then the InvAddRoundKey transformation is performed with RCPR, which is shown in Figure 7. The obtained result is passed to the input of InvMixColumns transformer.
The byte residues obtained after executing the InvMixColumns transformation with RCPR are shown in Figure 8a. The results of InvShiftRows transformation with RCPR are shown in Figure 8b. The result of the InvSubBytes transformation is the plaintext that is obtained using the CRT-based conversion. The result is shown in Figure 8c.
Let us conduct a comparative analysis of the cybersecurity of VANET using various methods to increase the reliability of AES encryption systems. In this analysis, only the method presented in [84] and the duplication method are considered. ECCs are not considered in the comparative analysis, since most of these codes are not arithmetic and cannot be used for calculations performed in AES encryption algorithm. These codes are widely used to improve noise immunity of the data transmission system (cyclic codes, BCH codes, Reed-Solomon codes). Also, TMR method was not considered in the comparative analysis. It is known that TMR method makes it possible to effectively correct single calculation errors that are caused by a failure or malfunction. However, this method has a disadvantage. In order to implement it, it is necessary to use three encryptors/decryptors that work in parallel. At the same time, in order to implement the developed method, it is necessary to double the number of tables for SubBytes and MixColumns, as well as introduce 2 additional shift registers modulo the control module and 8 adders modulo two.
The results of the evaluation of the redundant RCPR were obtained by iterating over all possible code combinations containing single, double and triple errors. The error syndrome was calculated according to (24) for each such combination. Then equal syndromes were selected. Obtaining such syndromes, EDCU will not be able to correct the distorted residues.
Figure 9a shows the capabilities of the developed method using the correction algorithm (22)–(24) and the method [84] for detecting errors caused by failures that occur during the operation of AES encryption system. The analysis of Figure 9a shows that the method [84] makes it possible to detect 100% of single and 75% of double errors. A single error is a distortion of one digit of the code combination caused by the first failure of the equipment. If a second failure or failure occurs, a double error occurs. The developed method provides detection of 100% of single and double errors, as well as 75% of triple errors.
Since the method [84] does not allow for error correction, a comparative analysis of the developed method will be carried out by AES encryption system using the duplication method. An analysis of Figure 9b shows that the duplication method makes it possible to fend off 100% of single errors. If a second failure occurs, AES encryption system, which uses the duplication method, fails and cannot ensure cybersecurity during data exchange. The developed method makes it possible to effectively deal with the flow of failures that occur during the operation of AES encryption system. It fends off 100% of single errors caused by the first failure, as well as 100% of errors when the second failure occurs, as well as 75% of errors when the third failure occurs.
To assess the impact of the developed method on the overall delay of AES encryption, a prototyped model of a fault-tolerant encryptor based on Artix-7 FPGA (xc7a12ticsg325-1L) was implemented. Comparisons were made with a prototyped encryptor model using the classical AES encryption algorithm. Computer-aided design Xilinx Vivado-HLS 2018 was used in order to study the built models. The hardware costs for the implementation of these models are presented in Table 3.
A comparative analysis was conducted on a single round of encryption. The following were selected as the initial data:
  • The plaintext that consists of 128 bits.
  • The plaintext in the form of bytes represented in a hexadecimal system: 30 28 00 54 5B D0 87, 08, 7B 87 09 1E 86 0A.
  • The key that consists of 128 bits.
  • The key in the form of bytes represented in a hexadecimal system: 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F.
As a result of the conducted research, the following data were obtained. When implementing the classical encryptor, the time spent on one round of encryption was 330 ns. When using the developed error correction method for RCPR, it took 426 ns to perform one round of encryption. Thus, the time spent on encryption was increased by 96 ns. It means that the delay in performing one round of encryption due to the application of the developed error correction method for RCPR was increased by 1.29 times.
Summarizing the results obtained, the following conclusion can be drawn. The novelty of the developed method lies in the fact that it allows us to correct errors using only one control module of the fourth degree. In [84], the authors only managed to detect an error in operation of AES encryptor, but not to correct it. In addition, the developed method provides lower hardware costs compared to the projection method [67] and its modification [68], the interval-index characteristic calculation method [69] and MRS method [70,71]. Thus, it is obvious that the application of the developed method using the correction algorithm (22)–(24) makes it possible to ensure a constant level of cybersecurity even with two consecutive failures in AES encryption system.

6. Conclusions

One of the effective ways to counteract cyberattacks implemented on the VANET is to use AES encryption algorithm. However, during the operation of AES encryption systems, failures and malfunctions can occur sequentially, which negatively affects the cybersecurity of vehicles. The article describes a method for ensuring the fault tolerance of AES encryption systems based on RCPR. When the first failure occurs, the method [84] is only able to detect 100% of the errors caused by this failure, and the duplication method and the developed method using the error detection and correction algorithm (22)–(24) make it possible to correct these errors. In the event of a second failure, the developed method ensures that AES encryption system remains operational, correcting 100% of the errors caused by this failure. Only if a third failure occurs during the operation of AES encryption system is the developed method able to correct 75% of errors in code combinations. Thus, the developed method makes it possible to fend off cyberattacks on vehicles and ensure a higher level of cybersecurity of the VANET by correcting errors in AES encryption system.

Author Contributions

Conceptualization, I.A.K. and A.A.O.; methodology, I.A.K.; validation, D.V.D. and I.A.P.; formal analysis, A.A.O.; investigation, A.A.O.; data curation, D.V.D.; writing—original draft preparation, I.A.K.; writing—review and editing, A.A.O.; visualization, V.S.S.; supervision, I.A.K.; project administration, I.A.K.; funding acquisition, I.A.K. All authors have read and agreed to the published version of the manuscript.

Funding

The research was supported by the Russian Science Foundation Grant No 25-71-30007, https://rscf.ru/project/25-71-30007/ (accessed on 7 August 2025).

Data Availability Statement

The original contributions presented in this study are included in the article. Further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

Appendix A

Table A1. The table of formation of the first informational residue for SubBytes transformation. We used bold on the top and left sides of the table due to the meaning of the table. Its purpose is to find a correct output by the two inputs. Such output is placed at the intersection of the column and the row that are determined by two inputs.
Table A1. The table of formation of the first informational residue for SubBytes transformation. We used bold on the top and left sides of the table due to the meaning of the table. Its purpose is to find a correct output by the two inputs. Such output is placed at the intersection of the column and the row that are determined by two inputs.
0123456789ABCDEF
09DAF84AE28438521
1952032BF7D8EB7A6
229E062749F709BA3
3F05257EE3D6CFBA3
4D9A007DDAB78EC26
5B34151E30A3502BB
6B46BC258F129661C
75FC1D51249FE9807
8B422D47156D8EDA1
9FF4F600951436EAA
A06DE43C885D33C4E
B10617ECADC2DC86C
C446C5C725B41C7A9
D38DE057B0A7C1389
EF9F196E58378BA6A
F9180F4CBB37D9EFF
Table A2. The table of formation of the second informational residue for SubBytes transformation.
Table A2. The table of formation of the second informational residue for SubBytes transformation.
0123456789ABCDEF
07B223798E702FD2E
1F102391DED814312
284A4D4AC51B3AAB4
336765DEB725D53DC
45DFF8284ED15DBAE
5C948AF9DD0E4BC98
6BB30A7B665B2F8A3
78A29690DFE7000E5
86D31F36D2672F14C
94F5ECAC161A59786
A5AE618CCAC3A0884
B41B74C95C0F07D0F
CE616EE85359B4039
DBB920F9F7C713646
ECC968450E1F1E77A
FB29902527FCA338B
Table A3. The table of formation of the first control residue for SubBytes transformation.
Table A3. The table of formation of the first control residue for SubBytes transformation.
0123456789ABCDEF
0E68DB336CF41780F
164220BA2900FF4B4
2AD44B6D8CEC33117
3C6240A054F31A87F
4845F8559466D3788
57A09FE7EDAD1BE23
60F5B65EE949B9EBF
7D5E8BC1FB78E98E2
8D913271C70AA1CED
9B011AAC830E6F92C
A5C385B0429E934CA
B51D6325F1CDDB563
CA27AB2F76EDA8790
D834C0AE47C0D25CF
E356712B562895D10
F2319F699CCB7AD74
Table A4. The table of formation of the second control residue for SubBytes transformation.
Table A4. The table of formation of the second control residue for SubBytes transformation.
0123456789ABCDEF
078EBEABDD6475C6E
14724539684BC3182
21198FA0F3D26EEFB
39CBEFE1BD9C55D38
4707D33E552527959
502C22CFA9ACD59A8
6E10DDC043B7DB56A
76880141B961E98FD
87B4002B81A3C3F2A
972E0D7BB93397096
AA1226073FEB43F76
B923FF5D06CFD2161
CB840A348315447C8
D6DCA0866E19E7F05
E42EDAE4571AA448D
FC591F06F5ECAF8CA

Appendix B

Table A5. The table of formation of the first informational residue of the result of multiplication by the constant 216.
Table A5. The table of formation of the first informational residue of the result of multiplication by the constant 216.
0123456789ABCDEF
00DD00DD0D00DD00D
1F22FF22F2FF22FF2
29449944949944994
36BB66BB6B66BB66B
48558855858855885
57AA77AA7A77AA77A
61CC11CC1C11CC11C
7E33EE33E3EE33EE3
8E33EE33E3EE33EE3
91CC11CC1C11CC11C
A7AA77AA7A77AA77A
B8558855858855885
C6BB66BB6B66BB66B
D9449944949944994
EF22FF22F2FF22FF2
F0DD00DD0D00DD00D
Table A6. The table of formation of the second informational residue of the result of multiplication by the constant 216.
Table A6. The table of formation of the second informational residue of the result of multiplication by the constant 216.
0123456789ABCDEF
00E86860E5BD3D35B
1C24A4AC2971F1F97
2C24A4AC2971F1F97
30E86860E5BD3D35B
40E86860E5BD3D35B
5C24A4AC2971F1F97
6C24A4AC2971F1F97
70E86860E5BD3D35B
8C24A4AC2971F1F97
90E86860E5BD3D35B
A0E86860E5BD3D35B
BC24A4AC2971F1F97
CC24A4AC2971F1F97
D0E86860E5BD3D35B
E0E86860E5BD3D35B
FC24A4AC2971F1F97
Table A7. The table of formation of the first control residue of the result of multiplication by the constant 216.
Table A7. The table of formation of the first control residue of the result of multiplication by the constant 216.
0123456789ABCDEF
003568BDE8BDE0356
13065B8EDB8ED3065
25603DE8BDE8B5603
36530EDB8EDB86530
48BDE035603568BDE
5B8ED30653065B8ED
6DE8B56035603DE8B
7EDB865306630EDB8
82174A9FCA9FC2174
912479ACF9ACF1247
A7421FCA9FCA97421
B4712CF9ACF9A4712
CA9FC21742174A9FC
D9ACF124712449ACF
EFCA974217421FCA9
FCF9A47124712CF9A
Table A8. The table of formation of the second control residue of the result of multiplication by the constant 216.
Table A8. The table of formation of the second control residue of the result of multiplication by the constant 216.
0123456789ABCDEF
00E2CF1D3795B86A4
186A4795BF1D30E2C
2E0C21F3D97B5684A
3684A97B51F3DE0C2
486A4795BF1D30E2C
50E2CF1D3795B86A4
6684A97B51F3DE0C2
7E0C21F3D97B5684A
897B5684AE0C21F3D
91F3DE0C2684A97B5
A795B86A40E2CF1D3
BF1D30E2C86A4795B
C1F3DE0C2684A97B5
D97B5684AE0C21F3D
EF1D30E2C86A4795B
F795B86A40E2CF1D3

Appendix C

Table A9. The table of formation of the result of SubBytes transformation.
Table A9. The table of formation of the result of SubBytes transformation.
0123456789ABCDEF
0637C777BF26B6FC53001672BFED7AB76
1CA82C97DFA5947F0ADD4A2AF9CA472C0
2B7FD9326363FF7CC34A5E5F171D83115
304C723C31896059A071280E2EB27B275
409832C1A1B6E5AA0523BD6B329E32F84
553D100ED20FCB15B6ACBBE394A4C58CF
6D0EFAAFB434D338545F9027F503C9FA8
751A3408F929D38F5BCB6DA2110FFF3D2
8CD0C13EC5F974417C4A77E3D645D1973
960814FDC222A908846EEB814DE5E0BDB
AE0323A0A4906245CC2D3AC629195E479
BE7C8376D8DD54EA96C56F4EA657AAE08
CBA78252E1CA6B4C6E8DD741F4BBD8B8A
D703EB5664803F60E613557B986C11D9E
EE1F8981169D98E949B1E87E9CE5528DF
F8CA1890DBFE6426841992D0FB054BB16

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Figure 1. AES encryption: (a) the input to the SubBytes transformer; (b) the output of the SubBytes transformer; (c) the output of the ShiftRows transformer.
Figure 1. AES encryption: (a) the input to the SubBytes transformer; (b) the output of the SubBytes transformer; (c) the output of the ShiftRows transformer.
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Figure 2. AES encryption: MixColumns output + Key = Cipher text.
Figure 2. AES encryption: MixColumns output + Key = Cipher text.
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Figure 3. AES decryption: Cipher text + Key = InvMixColumns input.
Figure 3. AES decryption: Cipher text + Key = InvMixColumns input.
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Figure 4. AES decryption: (a) the results of the InvMixColumns transformation; (b) the results of the InvShiftRows transformation; (c) the results of the InvSubBytes transformation.
Figure 4. AES decryption: (a) the results of the InvMixColumns transformation; (b) the results of the InvShiftRows transformation; (c) the results of the InvSubBytes transformation.
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Figure 5. AES encryption with RCPR: (a) the output of the forward converter; (b) the output of the SubBytes transformer; (c) the output of the ShiftRows transformer.
Figure 5. AES encryption with RCPR: (a) the output of the forward converter; (b) the output of the SubBytes transformer; (c) the output of the ShiftRows transformer.
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Figure 6. AES encryption with RCPR: MixColumns output + Key = Cipher text.
Figure 6. AES encryption with RCPR: MixColumns output + Key = Cipher text.
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Figure 7. AES decryption with RCPR: Cipher text + Key = InvMixColumns input.
Figure 7. AES decryption with RCPR: Cipher text + Key = InvMixColumns input.
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Figure 8. AES decryption with RCPR: (a) the results of the InvMixColumns transformation; (b) the results of InvShiftRows transformation; (c) the result of the InvSubBytes transformation.
Figure 8. AES decryption with RCPR: (a) the results of the InvMixColumns transformation; (b) the results of InvShiftRows transformation; (c) the result of the InvSubBytes transformation.
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Figure 9. Comparative analysis of error correction capabilities of methods for improving fault tolerance of AES encryption system; (a) comparison of the developed method with the method [84] in terms of error detection rate; (b) comparison of the developed method with duplication method in terms of error correction rate.
Figure 9. Comparative analysis of error correction capabilities of methods for improving fault tolerance of AES encryption system; (a) comparison of the developed method with the method [84] in terms of error detection rate; (b) comparison of the developed method with duplication method in terms of error correction rate.
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Table 1. Main symbols used in Section 3.
Table 1. Main symbols used in Section 3.
SymbolDescription
C j The   residue   of   the   number   C   modulo   m j
C i ( x ) The   residue   of   the   polynomial   C ( x )   modulo   p i ( x )
deg p i ( x ) The   degree   of   the   polynomial   p i ( x )
P k ( x ) The range of allowed RCPR code combinations
P k + 2 ( x ) The range of all possible RCPR code combinations
C ˜ j ( x ) The projection of the code combination by the j-th RCPR module
L ( x ) The interval-index positional characteristic
B i ( x ) The orthogonal basis for the i-th RCPR module
K i ( x ) The   constant   that   is   the   quotient   obtained   by   dividing   the   orthogonal   basis   B i ( x )   by   P k ( x )
r ¨ ( x ) The rank of the polynomial in case when only RCPR informational modules are considered
D i ( x ) Mixed radix system coefficients
C 3 * ( x ) ,   C 4 * ( x ) The   correct   value   of   control   residues   calculated   based   on   informational   residues   C 1 ( x )   and   C 2 ( x )
δ 1 ( x ) ,   δ 2 ( x ) The error syndrome
C i ( x ) The residue for i-th RCPR module that is distorted
Δ C i ( x ) The error depth for the i-th RCPR
Table 2. Execution of MixColumns transformation with RCPR.
Table 2. Execution of MixColumns transformation with RCPR.
The Summands of Expression (50)MixColumns Transformation Output
s 1 ( x ) s 2 ( x ) s 3 ( x ) s 4 ( x )
02 S ( 00 ) = ( 7 ,   8 ,   F ,   8 ) 0111100011111000
02 S ( 10 ) = ( C ,   F ,   3 ,   D ) 1100111100111101
S ( 10 ) = 20 = ( 6 ,   B ,   D ,   9 ) 0110101111011001
S ( 20 ) = 21 = ( 7 ,   A ,   D ,   A ) 0111101011011010
S ( 30 ) = 67 = ( D ,   3 ,   E ,   B ) 1101001111101011
S ( 00 ) = E 6 = ( 7 ,   5 ,   2 ,   D ) 0111010100101101
Table 3. Hardware costs for the implementation of a fault-tolerant encryptor.
Table 3. Hardware costs for the implementation of a fault-tolerant encryptor.
ModelSlicesDSPFFLUT
AES2380763264
The developed method3690811398
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Kalmykov, I.A.; Olenev, A.A.; Dukhovnyj, D.V.; Provornov, I.A.; Slyadnev, V.S. A Method for Fault Tolerance of AES Encryption Systems Focused on Improving the Cybersecurity of VANET Through the Use of Residue Codes. World Electr. Veh. J. 2025, 16, 462. https://doi.org/10.3390/wevj16080462

AMA Style

Kalmykov IA, Olenev AA, Dukhovnyj DV, Provornov IA, Slyadnev VS. A Method for Fault Tolerance of AES Encryption Systems Focused on Improving the Cybersecurity of VANET Through the Use of Residue Codes. World Electric Vehicle Journal. 2025; 16(8):462. https://doi.org/10.3390/wevj16080462

Chicago/Turabian Style

Kalmykov, Igor Anatolyevich, Alexandr Anatolyevich Olenev, Daniil Vyacheslavovich Dukhovnyj, Igor Alexandrovich Provornov, and Vladimir Sergeyevich Slyadnev. 2025. "A Method for Fault Tolerance of AES Encryption Systems Focused on Improving the Cybersecurity of VANET Through the Use of Residue Codes" World Electric Vehicle Journal 16, no. 8: 462. https://doi.org/10.3390/wevj16080462

APA Style

Kalmykov, I. A., Olenev, A. A., Dukhovnyj, D. V., Provornov, I. A., & Slyadnev, V. S. (2025). A Method for Fault Tolerance of AES Encryption Systems Focused on Improving the Cybersecurity of VANET Through the Use of Residue Codes. World Electric Vehicle Journal, 16(8), 462. https://doi.org/10.3390/wevj16080462

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