# Bandstructure and Size-Scaling Effects in the Performance of Monolayer Black Phosphorus Nanodevices

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Methods

#### 2.1. DFT-Based Tight-Binding Hamiltonian

_{x}, p

_{y}and p

_{z}), and all relevant SK overlap integrals are accounted for (ssσ, spσ, ppσ, ppπ). We showed in [24,25] that our new DFT-TB model achieves excellent agreement with DFT bandstructure in the energy range of interest, i.e., within ~1 eV from the conduction band minimum (CBM) and valence band maximum (VBM). The model data needed for the construction of PNR Hamiltonians can be found in Supplementary Materials. Electronic properties, transport properties, and PNR FET performance obtained using the new DFT-TB model are compared to those obtained with a simpler widely-used TBL model [19], in order to demonstrate the strong impact of bandstructure effects. These two TB Hamiltonians are used to study width-dependent dispersion of ultra-scaled PNRs and as inputs in the NEGF equations, which enables the investigation of the transport properties of PNRs and the performance of PNR FETs.

#### 2.2. Quantum Transport with NEGF

^{R}matrices are the retarded contact self-energies that consider the OBCs to the two contacts (source, S, and drain, D). These self-energy matrices are found by the iterative and numerically efficient Sancho–Rubio method [32]. The NEGF calculations in this work assume ideal contacts, meaning that the S/D extensions or reservoirs are semi-infinite semiconducting PNRs. This choice is common in the literature as it eliminates noncoherent effects at the channel-contact interfaces, and introduces no additional contact resistance into the nanostructure [33]. The retarded (G

^{R}) and advanced Green’s function (G

^{A}) of the device, where G

^{A}= G

^{R}

^{†}, are then used to find the transmission function, T(E), and density of states, DOS(E), according to expressions given in e.g., [9,34,35].

**Figure 1.**Illustration of a phosphorene nanoribbon with (

**a**) side and (

**b**) top view, as well as of (

**c**) PNR FET cross-sectional view. ToB model description with (

**d**) capacitive model, (

**e**) bandstructure along the channel length, and (

**f**) example of a PNR bandstructure calculated by the DFT-TB model.

#### 2.3. Top-of-the-Barrier Device Model

_{sc}), located at the maximum of the source-drain barrier. Assuming a grounded source, the capacitive model defined in Figure 1d results in the following potential:

_{G}= C

_{G}/(C

_{S}+ C

_{D}+ C

_{G}). We set α

_{G}= 1 and α

_{D}= 0, assuming that the gate electrode exhibits ideal control over the atomically-thin nanoribbon channel. In (2), C

_{ox}is the gate oxide capacitance, and Q

_{s}is the inversion charge density in the channel at top-of-the-barrier. The Q

_{s}depends on the positions of U

_{sc}and Fermi levels in source and drain regions (E

_{F}

_{,S}and E

_{F}

_{,D}, respectively), which are shown in Figure 1e, and is found as follows:

_{F}

_{,D}= E

_{F}

_{,S}− qV

_{DS}. After convergence is achieved for U

_{sc}and Q

_{s}, the drain current is calculated using the Landauer formula [34]. In all calculations, we assume that devices operate at room temperature, i.e., T = 300 K; studying temperature-related effects, including self-heating, is beyond the scope of this work.

## 3. Results and Discussions

#### 3.1. Electronic and Transport Properties of Ultra-Narrow PNRs

_{G}) increases considerably for both TB models, i.e., from 1.57 eV to 2.61 eV (TBL) and from 0.71 eV to 1.61 eV (DFT-TB). The TBL model provides wider bandgaps due to different XC functionals used for the development of the two Hamiltonian models. Namely, PBE was used for our DFT-TB model [24,25], which results in a lower E

_{G}in comparison to the HSE functional used for the development of the TBL model [19]. The PBE functionals are known to underestimate the bandgap, so the realistic E

_{G}value is expected to be between those obtained by PBE and HSE DFT simulations. Nevertheless, our DFT-TB model provides more accurate dispersion properties for both electrons and holes. Since the ToB device model relies on the bandstructure properties not far away from CBM and VBM, we avoid artificial E

_{G}adjustment in the DFT-TB model.

_{0}(TBL) and ~0.21m

_{0}(DFT-TB). For W = 0.49 nm, the DFT-TB model results in much heavier electrons in comparison to the TBL model. Namely, the DFT-TB model gives m*~1.9m

_{0}in the first subband and m*~0.5m

_{0}in the second subband, while the TBL model results in m*~0.5m

_{0}in the first subband. The lower dispersion curvature, i.e., heavier carriers, in either the conduction or valence band generally leads to increased DOS that benefits inversion charge density in the channel. At the same time, heavier carriers exhibit diminished carrier velocities, which negatively impacts the current drivability of PNR FETs. Due to interplay of different phenomena, from subband number to effective mass change, it is difficult to qualitatively estimate how the PNR width downscaling will impact device performance purely from analyzing the dispersions.

_{0}) points toward a lower carrier velocity and overall poorer current-driving capabilities of 0.49 nm-wide PNR FETs.

#### 3.2. Performance of Ultra-Scaled PNR FETs

_{2}as gate dielectric with a thickness of 1 nm and S/D doping of m = 0.001, where m is the molar fraction of the areal density of P atoms in PNRs, resulting in a doping density of ~4 × 10

^{12}cm

^{−2}. A common threshold voltage (V

_{TH}) of 0.24 V, as projected in the International Roadmap for Devices and Systems (IRDS) at the “3 nm” CMOS node [39], is set for all devices by automatically adjusting the gate work function. Setting the same V

_{TH}, and consequently the same OFF-state current (I

_{OFF}), allows a meaningful and fair comparison of PNR FETs with different nanoribbon widths. The resulting I

_{OFF}is ~1 nA/µm, defined for V

_{DS}= 0.7 V and V

_{GS}= 0 V. The supply voltage is 0.7 V, so the ON-state current (I

_{ON}) is extracted from I-V characteristics for V

_{DS}= V

_{GS}= 0.7 V. Average charge velocity (v

_{avg}) at ToB is calculated from the drain current and the obtained ToB charge density. The ON-state ToB charge density (Q

_{s}

_{,ON}) and ON-state velocity (v

_{ON}) are also extracted at the same bias point as I

_{ON}, i.e., with gate and drain biased at the supply voltage.

_{ON}on PNR width for both the absolute magnitude of the current (Figure 5a) and for the width-normalized current (Figure 5b). The absolute I

_{ON}monotonically decreases with the downscaling of PNR width, from 8.7 µA in the 4.41 nm-wide PNR FET down to 0.25 µA for W = 0.49 nm. In comparison to the TBL model, DFT-TB Hamiltonians with a more accurate PNR bandstructure provide higher driving currents, except for the narrowest device. These I

_{ON}values in single PNRs are too low to be practically relevant, so several PNRs must be connected in parallel to provide sufficiently high I

_{ON}. The plausibility of utilizing PNRs in extremely scaled FETs is quantified by the width-normalized I

_{ON}reported in Figure 5b, which allows an assessment of PNR FET performance against IRDS requirements. As shown previously [22], I

_{ON}obtained by the TBL model exhibits a generally decreasing trend with a weak modulation by W downscaling. Moreover, none of the examined PNR FETs using the TBL model fulfills the IRDS requirement for I

_{ON}at the “3 nm” node, i.e., I

_{ON}> 1.9 mA/µm [39]. In contrast, device simulations using DFT-TB Hamiltonians provide significant qualitative and quantitative changes. First, the I

_{ON}vs. W characteristic is non-monotonic and the width-normalized I

_{ON}exhibits a local maximum of 2.17 mA/µm for W = 2.45 nm, which means that 2.45 nm-wide PNR FETs are the most area-efficient devices in terms of current drivability. Regarding IRDS requirements, DFT-TB model reveals that PNR FETs with W > 1.4 nm can surpass the I

_{ON}target set by the IRDS. The DFT-TB model reveals the severity of bandstructure effects in the narrowest devices because I

_{ON}for W = 0.49 nm is only 0.51 mA/µm, which is ~2.7× lower than obtained by the TBL model. Going towards the widest examined nanoribbons, both Hamiltonian models converge to the same I

_{ON}, which is expected as both approaches describe large-area phosphorene equally well.

_{s}increases with increasing V

_{GS}up to ~7 × 10

^{12}cm

^{−2}, and generally increases with the downscaling of PNR width, although Q

_{s}-V

_{GS}curves are closely spaced for W > 1.5 nm. This Q

_{s}behavior is attributed to the increasing DOS near the CBM when W decreases (see Figure 3). Figure 6b compares the bias-dependence of Q

_{s}for the two TB models for 0.49 nm and 2.45 nm-wide phosphorene nanodevices. Clearly, the TBL model overestimates the channel charge density for W = 2.45 nm and underestimates it for W = 0.49 nm. The impact of width downscaling on Q

_{s}in the ON-state (Q

_{s}

_{,ON}) is reported in Figure 6c, and we observe that both models result in monotonic increase of Q

_{s}

_{,ON}when W decreases. The DFT-TB model provides a somewhat stronger modification of charge density with W, and the Q

_{s}

_{,ON}from DFT-TB simulations surpasses the TBL model results only for W < 1.26 nm. This result for W = 0.49 nm is expected because, from Figure 2a, it is clear that DFT-TB bandstructure exhibits heavier electrons in the lowest subbands and a generally higher number of subbands near the CBM when compared to the simpler TBL model. On the other hand, wider PNRs defined by DFT-TB Hamiltonians have slightly lighter carriers, which results in Q

_{s}

_{,ON}being somewhat lower in the 1.5 nm to 3.5 nm width range. Since the Q

_{s}behavior is in disagreement with I

_{ON}trends, the reasons for improvement introduced by the DFT-TB model reported in Figure 5 must come from the gate capacitance (C

_{G}) or the average charge velocity.

_{G}, it can be assessed as a series of C

_{ox}and quantum capacitance of the channel (C

_{q}) defined as C

_{q}= d(qQ

_{s})/dV

_{GS}. Since gate oxide (SiO

_{2}) thickness is 1 nm for all devices, C

_{ox}= 34.5 fF/µm

^{2}and is independent of PNR width. On the other hand, C

_{q}increases from ~102 fF/µm

^{2}for W = 4.41 nm up to ~248 fF/µm

^{2}(TBL) and ~298 fF/µm

^{2}(DFT-TB) for the 0.49 nm-wide device. Therefore, the dependence of C

_{q}is qualitatively the same as Q

_{s}in Figure 6c. In addition, C

_{q}is much larger than C

_{ox}, so the total C

_{G}only slightly increases with the downscaling of PNR width, and the absolute values of C

_{G}are 26–31 fF/µm

^{2}. If the oxide thickness were to decrease, C

_{ox}would rise, which in turn would enhance the relative impact of C

_{q}in the total C

_{G}of PNR FETs. Consequently, bandstructure effects reported using the DFT-TB model would be more pronounced, but a more detailed investigation is beyond the scope of the current paper.

_{GS}-dependence of v

_{avg}for V

_{DS}= 0.7 V obtained using the DFT-TB model for various PNR widths. Generally, v

_{avg}increases with increasing V

_{GS}, while for W = 0.49 nm the velocity is independent of gate bias. The minimum v

_{avg}of 0.44 × 10

^{7}cm/s is reported for the 0.49 nm-wide PNR FET, while the highest velocity is reached for W = 2.45 nm irrespective of V

_{GS}. For W = 2.45 nm, v

_{avg}equals 1.79 × 10

^{7}cm/s at threshold and grows to 2.43 × 10

^{7}cm/s in the ON-state. The changes introduced by the improved Hamiltonian model are illustrated in Figure 7b that compares v

_{avg}in 0.49 nm and 2.45 nm-wide nanoribbons calculated using the two TB models. While both models give identical qualitative v

_{avg}behavior with respect to V

_{GS}, the TBL model underestimates the velocity for W = 2.45 nm and overestimates it for the 0.49 nm-wide PNR FET. In turn, these characteristics lead to weak W-dependence of I

_{ON}for the TBL model reported in Figure 5b. Finally, the influence of PNR width downscaling on v

_{ON}is illustrated in Figure 7c, and the curve exhibits a monotonic v

_{ON}decrease in case of the TBL model. In contrast, a non-monotonic v

_{ON}behavior is observed in case of the DFT-TB model with a maximum v

_{ON}of 2.43 × 10

^{7}cm/s recorded in the 2.45 nm-wide PNR FET. This local v

_{ON}maximum for W = 2.45 nm is a consequence of two competing mechanisms. As shown in Figure 2 and discussed in the related text, the first-subband effective mass monotonically increases in narrower PNRs, so a monotonic velocity decrease should occur with W downscaling. On the other hand, the average charge velocity considers all populated subbands, including higher subbands that exhibit larger effective masses. Therefore, the characteristics of the first subband are important, but not the only one responsible for the overall v

_{ON}behavior. When the PNR width decreases, the separation between subbands increases, which in turn decreases their population and their relative impact on v

_{ON}. Hence, 2.45 nm presents an optimum width where these two mechanisms jointly result in maximum average charge velocity in the ON-state. Finally, by comparing the results in Figure 5b and Figure 7c, we conclude that the I

_{ON}characteristics reported in Figure 5b are dominantly caused by the bias- and width-dependence of carrier velocity in the channel.

## 4. Conclusions

_{ON}target at the “3 nm” technology node. The ballisticity level of 87% seems attainable because in a large-area phosphorene FET with a 15 nm-long channel, the ballisticity of ~90% was reported after including phonon scattering [48]. We note that the impact of electron-phonon scattering on the transport properties and performance of phosphorene nanodevices is under investigation, and the ballisticity level reported in [48] might be lower [18].

^{12}cm

^{−2}, and that the average charge velocity decreases considerably (from ~2.2 × 10

^{7}cm/s to ~0.4 × 10

^{7}cm/s) with the downscaling of PNR width. Velocity decrease was found to be the dominant factor in current-driving properties, so the ON-state current in PNR FETs also declines in narrower nanoribbons, from ~2 mA/µm (W = 4.41 nm) to ~0.5 mA/µm (W = 0.49 nm). Nevertheless, using an improved bandstructure description with the DFT-TB model revealed that ballistic PNR FETs with W > 1.4 nm can meet the IRDS requirement for I

_{ON}at the “3 nm” CMOS technology node. Moreover, an optimum PNR FET with W = 2.45 nm was found, which exhibits I

_{ON}~ 2.2 mA/µm and which can operate at 87% of the ballistic limit and still meet the IRDS target for the ON-state current.

## Supplementary Materials

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

## References

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**Figure 2.**Comparison of dispersions obtained by the DFT-TB (panels on the right) and TBL (panels on the left) models for PNR widths of (

**a**) 0.49 nm, (

**b**) 1.47 nm, (

**c**) 2.45 nm, and (

**d**) 4.41 nm.

**Figure 3.**Density of states in PNRs obtained using the DFT-TB and TBL models for PNR widths of (

**a**) 0.49 nm, (

**b**) 1.47 nm, (

**c**) 2.45 nm, and (

**d**) 4.41 nm.

**Figure 4.**Dispersion obtained by (

**a**) TBL and (

**b**) DFT-TB model, and (

**c**) transmission for the 1.47 nm-wide PNR. Comparison of transmission functions obtained with the two TB Hamiltonian models for W of (

**d**) 0.49 nm, (

**e**) 2.45 nm, and (

**f**) 4.41 nm.

**Figure 5.**Impact of PNR width downscaling on (

**a**) absolute I

_{ON}and (

**b**) width-normalized I

_{ON}in PNR FETs. The plots compare the results obtained by DFT-TB and TBL models.

**Figure 6.**(

**a**) Charge density vs. gate bias characteristics in PNR FETs. Comparison of (

**b**) Q

_{s}-V

_{GS}curves for 0.49 nm and 2.45 nm-wide devices, and (

**c**) Q

_{s}-W characteristics in the ON-state obtained by the two TB models.

**Figure 7.**(

**a**) Average charge velocity vs. V

_{GS}in PNR FETs for the DFT-TB model. Comparison of (

**b**) v

_{avg}-V

_{GS}curves for 0.49 nm and 2.45 nm-wide PNR FETs, and (

**c**) ON-state v

_{avg}-W characteristics obtained by the DFT-TB and TBL models.

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**MDPI and ACS Style**

Poljak, M.; Matić, M.
Bandstructure and Size-Scaling Effects in the Performance of Monolayer Black Phosphorus Nanodevices. *Materials* **2022**, *15*, 243.
https://doi.org/10.3390/ma15010243

**AMA Style**

Poljak M, Matić M.
Bandstructure and Size-Scaling Effects in the Performance of Monolayer Black Phosphorus Nanodevices. *Materials*. 2022; 15(1):243.
https://doi.org/10.3390/ma15010243

**Chicago/Turabian Style**

Poljak, Mirko, and Mislav Matić.
2022. "Bandstructure and Size-Scaling Effects in the Performance of Monolayer Black Phosphorus Nanodevices" *Materials* 15, no. 1: 243.
https://doi.org/10.3390/ma15010243