# Gate Control of Superconductivity in Mesoscopic All-Metallic Devices

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## Abstract

**:**

## 1. Introduction

## 2. Gate-Driven Supercurrent Suppression in Nb and V Nanojunctions

#### 2.1. Niobium Gate-Controlled Transistor

#### 2.1.1. Rectification Properties

#### 2.2. Vanadium Gate-Controlled Transistor

#### 2.2.1. Half-Wave Rectifier

#### 2.2.2. Amplification Properties

## 3. Nonthermal Origin of Supercurrent Suppression in Gated All-Metallic Superconducting Devices

#### 3.1. SCPDs in a Titanium Gate-Controlled Transistor

#### 3.2. Suspended Titanium Gate-Controlled Transistor

#### 3.3. Leakage Current Finite Element Method Simulations

#### 3.4. Heating through Single Cold-Electron Field Emission or Absorption

#### 3.5. Continuous Power Injection

#### 3.6. Unconventional Sum Rule

## 4. Summary and Further Research

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

## References

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**Figure 1.**(

**a**) Pseudo-color scanning electron micrograph (SEM) of a typical niobium gated transistor with the bias scheme. The weak-link and the wire are in false-colored orange, and the gate is in blue. (

**b**) I vs. V curves for select gate voltages ${V}_{G}$ at a bath temperature of 20 mK. The curves are horizontally offset for clarity. Bipolar suppression of the ${I}_{S}$ is visible as $\left(\right)$ increases. (

**c**) ${I}_{S}$ vs. ${V}_{G}$ for several bath temperatures T ranging between 20 mK and 3 K. ${I}_{S}$ values were collected by measuring 50 repetitions of the I vs. V characteristics.

**Figure 2.**(

**a**) Operation scheme of the niobium-based half-wave rectifier. The current bias is represented by the horizontal red dashed line in the ${I}_{S}\left({V}_{G}\right)$ graph. The time-dependent gate voltage (green to blues curve) is composed of an AC component ${V}_{AC}$ added to a DC bias ${V}_{DC}$. The effect of the gating provides a time-dependent switching current ${I}_{S}\left(t\right)$ (purple to yellow line) able to rectify the gate voltage signal. (

**b**) V vs. ${V}_{G}$ characteristic of the Josephson junction (JJ) measured with a four-probe technique with a lock-in amplifier. The reference signal of the lock-in is ${V}_{AC}$, and the bias current ${I}_{B}$ was set to $2.5\phantom{\rule{4pt}{0ex}}$μA. V. The signal is almost zero until ${I}_{S}\left({V}_{G}\right)<{I}_{B}$; then, a peak arises due to rectification of the ${V}_{G}$ signal.

**Figure 3.**(

**a**) Pseudo-color SEM of a representative vanadium-gated device. The weak-link and the wire are colored in orange, and the gate is in blue. (

**b**) ${I}_{S}$ vs. ${V}_{G}$ curves for different bath temperatures ranging from $2.0$ to $3.3$ K. The data were computed by averaging 25 acquisitions of ${I}_{S}$.

**Figure 4.**(

**a**) Bias scheme for AC measurements. The gate voltage is generated by adding DC ${V}_{DC}$ and AC ${V}_{AC}$ arbitrary waveform voltages. The ADC/DAC board that provides the AC signal performs real-time measurements of V. (

**b**) Voltage V vs. current I characteristics for different values of ${V}_{G}$ (yellow and purple curves). The dot couples show the operation points of the system for two different bias currents ${I}_{B}=18$, $71\phantom{\rule{4pt}{0ex}}$μA. ${V}_{G}$ vs. time t is the excitation signal (blue curve) that was realized by adding a DC voltage ${V}_{DC}=10$ V and an AC square-wave voltage with amplitude ${V}_{AC}=5$ V. Time-dependent V for different current biases are drawn in correspondence with the operation points. The measurements were performed at $T=3$ K.

**Figure 5.**(

**a**) Color-plot of V vs. ${V}_{G}$ (x-axis) and I (y-axis). From left to right, the three round symbols show the zero-resistance gate voltage value (light green), the super-to-normal transition (red), and the maxima of both ${V}_{G}$ and V (dark green). The dashed red curve represents the ${I}_{S}$ vs. ${V}_{G}$ characteristic. (

**b**) Time-dependent ${V}_{G}\left(t\right)$ obtained by adding a DC voltage ${V}_{DC}=11$ V and an AC sine wave voltage ${V}_{AC}$. (

**c**,

**d**) Time-dependent $V\left(t\right)$ for ${V}_{AC}=\phantom{\rule{4pt}{0ex}}3.5$ V (

**c**) and ${V}_{AC}=1.0$ V (

**d**). The color-map is the same as in panel (

**a**). All these measurements were performed at $T=3$ K.

**Figure 6.**(

**a**) Pseudo-color (SEM) and bias scheme of a representative Ti gate-controlled transistor. The superconducting wire and the Dayem bridge constriction are colored in orange, and the gate electrode is in blue. (

**b**) ${I}_{S}$ vs. ${V}_{G}$ characteristics at select bath temperatures ranging from 20 to 300 mK. Data are the result of the average of 50 acquisitions of ${I}_{S}$.

**Figure 7.**(

**a**) Switching current probability distributions (SCPDs) vs. I acquired at select bath temperatures from 20 to 90 mK in the Quantum Phase Slip (QPS) regime. The best fit curves are represented with dotted line. The inset shows $\sigma $ vs. T of the regime. (

**b**) SCPDs vs. I obtained at different temperatures from 120 to 150 mK in the Thermal Activated Phase Slip (TAPS) regime. The best fit curves are represented with a dotted line. The inset shows $\sigma $ vs. T of the regime. (

**c**) SCPDs vs. I obtained at different temperatures from 160 to 300 mK in the Multiple Phase Slip (MPS) regime. The inset shows $\sigma $ vs. T of the regime. For each SCPD, the total sampling number of ${I}_{S}$ is ${10}^{5}$. The crossover temperatures ${T}_{Q}\simeq 110$ mK and ${T}_{M}\simeq 160$ mK separate the QPS/TAPS and TAPS/MPS regimes, respectively. In all the panels, the temperature increases from right to left.

**Figure 8.**(

**a**) SCPDs vs. I at select gate voltages from 0 V to 21 V in the Electric Activated Phase Slip (EAPS) regime. The inset shows standard deviation $\sigma $ of SCPDs vs. gate voltage ${V}_{G}$ in the EAPS regime. (

**b**) SCPD vs. I at different gate voltage values from 24 V to 30 V in the MPS regime. The inset shows standard deviation $\sigma $ of SCPDs vs. gate voltage ${V}_{G}$ in the MPS regime. For each distribution, the total number of ${I}_{S}$ acquisitions is ${10}^{5}$. The curves are vertically offset for clarity. The crossover voltages are ${V}_{Q}\simeq 8$ V and ${V}_{E}\simeq 14$ V.

**Figure 9.**(

**a**) ${I}_{S}$-matched distributions. Red and orange distributions were acquired for a negligible electric field at ${V}_{G}=0$ V at select bath temperatures, whereas blue and green distributions were measured at $T=20$ mK for different gate voltage values. The values of ${I}_{S}$ are, respectively, from left to right $2.2,\phantom{\rule{4pt}{0ex}}2.8,$ and $4.0\phantom{\rule{4pt}{0ex}}$μA. (

**b**) Comparison between the $\sigma $ vs. ${I}_{S}$ characteristic obtained for thermal- and electric-driven distributions at ${V}_{G}=0$ V (lower curve) and $T=20$ mK (upper curve) respectively.

**Figure 10.**(

**a**,

**b**) SEMs of the suspended titanium transistor (original picture and pseudo-color). (

**c**) Back and forth current I vs. V characteristics for select values of ${V}_{G}$ measured at a bath temperature of $T=20$ mK. The characteristics are horizontally shifted for clarity. Grey colored regions highlight the gate-induced evolution of ${I}_{{S}_{1}}$, ${I}_{{S}_{2}}$, and ${I}_{{S}_{3}}$. (

**d**–

**f**) The ${V}_{G}$ dependence of the switching currents of ${I}_{{S}_{1}}$, ${I}_{{S}_{2}}$, and ${I}_{{S}_{3}}$, respectively.

**Figure 11.**$\left(\right)$ and streamlines on the XY (

**a**) and YZ (

**b**) planes. The simulations were performed with a gate voltage value of ${V}_{G}=-15$ V. The distribution of the electrostatic field shows that the field effect is confined upon constriction.

**Figure 12.**Current density module $\left(\right)$ evaluated on XY (

**a**) and YZ (

**b**) planes. Data were obtained by analyzing the ballistic transport of the electrons through the vacuum from the gate electrode surfaces toward the titanium constriction (and vice versa for opposite values of gate voltage). Here, we set the gate voltage to ${V}_{G}=-15$ V and the work function equal to the literature value for titanium ${\varphi}_{0}=4.3$ eV. The spatial distribution of the electronic current highlights that the field emitted electrons influence a 500 nm section of the constriction.

**Figure 13.**Natural logarithm of ${I}_{L}$ between the gate electrodes and the constriction at a bath temperature of $T=20$ mK vs. the gate voltage ${V}_{G}$ measured on a titanium suspended device (Orange dots). Natural logarithm of ${I}_{FE}$ between the gate electrodes and the constriction vs. the gate voltage ${V}_{G}$ computed by integrating the Fowler–Nordheim (FN) current density (${\mathit{J}}_{FE}$) with ${\varphi}_{0}=4.3$ eV (blue dots).

**Figure 14.**Electronic temperature ${T}_{e}$ vs. time t of a mesoscopic superconducting weak-link that periodically absorbs electrons with an energy of the order of 10 eV. The red horizontal line represents the critical temperature of the superconductor. Each electron starkly increases the electronic temperature of the system, driving it in the normal state. $\tau $ is the measurement time.

**Figure 15.**(

**a**,

**b**) Combined effect of two electric fields on titanium Dayem bridges. Color plot of the normalized switching current as a function of ${V}_{{G}_{1}}$ (x-axis) and ${V}_{{G}_{2}}$ (y-axis) for two different devices (A and B).

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**MDPI and ACS Style**

Puglia, C.; De Simoni, G.; Giazotto, F.
Gate Control of Superconductivity in Mesoscopic All-Metallic Devices. *Materials* **2021**, *14*, 1243.
https://doi.org/10.3390/ma14051243

**AMA Style**

Puglia C, De Simoni G, Giazotto F.
Gate Control of Superconductivity in Mesoscopic All-Metallic Devices. *Materials*. 2021; 14(5):1243.
https://doi.org/10.3390/ma14051243

**Chicago/Turabian Style**

Puglia, Claudio, Giorgio De Simoni, and Francesco Giazotto.
2021. "Gate Control of Superconductivity in Mesoscopic All-Metallic Devices" *Materials* 14, no. 5: 1243.
https://doi.org/10.3390/ma14051243