# A Switched Capacitor Based AC/DC Resonant Converter for High Frequency AC Power Generation

^{*}

## Abstract

**:**

## 1. Introduction

**Figure 2.**The source voltage, driving signal and cascade module: (

**a**) the general circuit of the proposed step up/down circuit; and (

**b**) the source voltage and the driving signal.

## 2. Principle of the Proposed Step Up/Down Resonant Converters

_{1}′ is charged up in the step up resonant power converter. Then, it acts as the power source of the step down switched capacitor power converter to release the energy to the load. The capacitors in the step down converter are charged up in series then release the energy to the load in parallel. Hence, the output voltage is shared by the switching capacitor cells. The voltage is stepped up by introducing cascaded step up switching capacitor cells, as shown in Figure 1c, and stepped down by step down switching capacitor cells, as shown in Figure 1d. The 2n stepping up switched capacitor cells and m stepping down cells are connected in a series by using two Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs), as shown in Figure 2a. By alternatively turning on and off the two switches, the overall voltage conversion ratio 2n/m can be obtained. Hence, the voltage conversion ratio is wider than the conversion ratio n, 1/n. The principle of driving signal is shown in Figure 2b.

## 3. Operation Principles of the Proposed Circuit

#### 3.1. n Step Up Cells

_{1}′ and C

_{3}′ are slowly charged through diodes D

_{1}′ and D

_{3}′ and in turn, the current increases slowly from zero and resonate back to zero as shown in Figure 4b by the resonant tank. The input voltage is stepped up through the stepping effect of coupling capacitors C

_{1}′, C

_{3}′, C

_{2}′ and C

_{4}′. The stepped up voltage is an even multiple of input voltage. The voltages between A, B and A, C are 2V

_{s}and 4V

_{s}respectively, are shown in Figure 4b; i.e., the conversion ratio is 2n.

**Figure 4.**(

**a**) A two stage AC voltage multiplier; and (

**b**) the current and voltage of a two step up cell module.

#### 3.2. m Step Down Cells

_{1}, C

_{2}and C

_{3}are charged in series and from a resonant tank with inductor L

_{r2}. the charging currents i

_{Lr1}resonates in sinusoidal waveform. Then, the capacitors C

_{1}, C

_{2}and C

_{3}release energy in parallel to the load and from a resonant tank with L

_{r3}. The voltage is stepped down to ⅓ × 4V

_{s}, i.e., the conversion ratio is 1/m × 4V

_{s}. The discharging current i

_{Lr3}also resonates in sinusoidal waveform. Therefore, all of the switches are working under zero current switching modes and the current stress of the diodes is also released.

**Figure 5.**(

**a**) Three stage step down converter; and (

**b**) the current of resonant inductor and the output voltage.

#### 3.3. Operation Principle and Analysis of the Proposed Circuit

**Figure 6.**The detailed operation states of the proposed circuit: (

**a**) State 1; (

**b**) State 2; (

**c**) State 3; (

**d**) State 4; (

**e**) State 5; and (

**f**) State 6.

_{s}, then is stepped down by the cascaded step down module mentioned above for 4V

_{s}/3. The input current which is also the current flowing through resonant inductor L

_{r1}increases slowly and then resonates back to zero in half cycle of the source voltage. Similar operation is found in next half cycle of the source voltage, as shown in Figure 7b. The voltage amplitudes across the two transistors shown in Figure 7d are the same and show the difference between the step up voltage V

_{AC}and the output voltage V

_{o}. Since the circuit is used either to step up or step down, the difference between V

_{AC}and V

_{o}will not be large, and therefore, the voltage stress is not high.

**Figure 7.**Waveform of the current and voltage of the proposed circuit: (

**a**) V

_{AC}, V

_{c1}and V

_{o}; (

**b**) resonant inductor and switched-capacitor voltages and currents; (

**c**) i

_{Lr3}, i

_{c3}, i

_{d3}; and (

**d**) switch voltages.

_{s}sinωt is the source voltage; i

_{Lr1}, i

_{Lr2}, i

_{Lr3}, i

_{c2}′, i

_{c4}′ i

_{d1}′, i

_{d2}′ i

_{d3}′, i

_{d4}′, i

_{d3}, i

_{c3}are the current flowing through the inductors L

_{r1}, L

_{r2}, L

_{r3}, the capacitors C

_{2}′, C

_{4}′, C

_{3}and the diodes D

_{1}′, D

_{2}′, D

_{3}′, D

_{4}′, D

_{3}. L

_{r1}, L

_{r2}, L

_{r3}are the resonant inductors, the capacitances of C

_{1}′, C

_{2}′ C

_{3}′, C

_{4}′, C

_{1}, C

_{2}and C

_{3}are assumed equal to C.

- (1)
- Mode A (t
_{0}–t_{4}): S_{1}is on and S_{2}is off, the circuit is working in the positive half cycle of the source voltage. There are four stages in this period. The circuit is going through state 1 to states 2 and 3 and back to state 1.- (a)
- Stage 1 (t
_{0}–t_{1}): the circuit is working on state 1. As shown in Figure 6a, When the sum of source voltage and voltage across C_{1}′ is smaller than the voltage across C_{2}′, both D_{1}′ and D_{2}′ are reversely biased; when the sum of source voltage, voltage across C_{1}′ and voltage across C_{3}′ is smaller than V_{AC}which is larger than the sum of voltages of the capacitors C_{1}, C_{2}and C_{3}, then D_{3}′ and D_{4}′ are reversely biased, then the currents following through diode L_{r1}, and D_{1}′, D_{2}′, D_{3}′, and D_{4}′ are zero, as shown in Figure 7b, till the sum of source voltage and voltage of capacitors C_{1}′ and C_{3}′ is larger than V_{AC}, Capacitors C_{2}′ and C_{4}′ are charging capacitors C_{1}, C_{2}and C_{3}in series. The current of the inductor i_{c2}′ which is equal to i_{c4}′ and the current of the inductor i_{Lr2}starts to increase slowly from zero, and the voltages of v_{c2}′ and v_{c4}′ are decreasing slowly, ${i}_{\mathrm{c}{2}^{\prime}}={i}_{\mathrm{c}{4}^{\prime}}={i}_{\text{Lr}2}$, which is shown in Figure 7b, then there is:$$\{\begin{array}{c}{v}_{\mathrm{c}{2}^{\prime}}+{v}_{\mathrm{c}{4}^{\prime}}-3\left({\mathrm{L}}_{\mathrm{r}2}\frac{\mathrm{d}{i}_{\text{Lr}2}}{\mathrm{d}t}+{v}_{\mathrm{c}1}\right)=0\\ {i}_{\mathrm{c}{2}^{\prime}}=-C\frac{\mathrm{d}{v}_{\mathrm{c}{2}^{\prime}}}{\mathrm{d}t}\\ {i}_{\mathrm{c}{4}^{\prime}}=-C\frac{\mathrm{d}{v}_{\mathrm{c}{4}^{\prime}}}{\mathrm{d}t}\\ {i}_{\text{Lr}2}=C\frac{\mathrm{d}{v}_{\mathrm{c}1}}{\mathrm{d}t}\end{array}$$ - (b)
- Stage 2 (t
_{1}–t_{2}): the circuit is working on state 2. As shown in Figure 6b When the sum of source voltage and voltage across C_{1}′ is smaller than the voltage across C_{2}′,both D_{1}′ and D_{2}′ are reversely biased; meanwhile, the sum of source voltage and voltages across C_{1}′, C_{3}′ is larger than V_{AC}, and V_{AC}is equal to the sum of voltage of the capacitors C_{1}, C_{2}and C_{3}, then the source and the capacitors C_{1}′ and C_{3}′ are connected in series and start to charge capacitors C_{2}′ and C_{4}′ , and capacitors C_{1}, C_{2}, C_{3}are now in parallel. The current of the inductor i_{Lr1}starts to increase slowly from zero, which is equal to the sum of current of the inductor i_{c2}′ and i_{Lr1}, the voltages of v_{c1}′ and v_{c3}′ are decreasing slowly, the voltages of v_{c2}′ and v_{c4}′ are increasing, ${i}_{\text{Lr}2}={{i}_{\mathrm{d}4}}^{\prime}+{{i}_{\mathrm{c}2}}^{\prime}$, ${{i}_{\mathrm{d}4}}^{\prime}={i}_{\text{Lr}1}$, ${{i}_{\mathrm{c}2}}^{\prime}=C\frac{\mathrm{d}{{v}_{\mathrm{c}2}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}$, ${i}_{\text{Lr}1}=C\frac{\mathrm{d}{{v}_{\mathrm{c}3}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}$, which is shown and Figure 7b, then there is:$$\{\begin{array}{c}{V}_{\mathrm{s}}\text{sin}\mathrm{\omega}t+\left({\mathrm{L}}_{\mathrm{r}1}\frac{\mathrm{d}{i}_{\text{Lr}1}}{\mathrm{d}\left(t-{t}_{1}\right)}+{v}_{\mathrm{c}{1}^{\prime}}\right)+{v}_{\mathrm{c}{3}^{\prime}}-\left({\mathrm{L}}_{\mathrm{r}2}\frac{\mathrm{d}{i}_{\text{Lr}2}}{\mathrm{d}\left(t-{t}_{1}\right)}+3{v}_{\mathrm{c}1}\right)=0\\ {\mathrm{L}}_{\mathrm{r}2}\frac{\mathrm{d}{i}_{\text{Lr}2}}{\mathrm{d}\left(t-{t}_{1}\right)}+3{v}_{\mathrm{c}1}={v}_{\mathrm{c}{2}^{\prime}}+{v}_{\mathrm{c}{4}^{\prime}}\\ {i}_{\text{Lr}1}=C\frac{\mathrm{d}{{v}_{\mathrm{c}1}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}\\ {i}_{\text{Lr}2}=c\frac{\mathrm{d}{v}_{\mathrm{c}1}}{\mathrm{d}\left(t-{t}_{1}\right)}\end{array}$$ - (c)
- Stage 3 (t
_{2}–t_{3}): The circuit is working on state 3. The source voltage is increasing and the sum of source voltage and voltage across C_{1}′, is larger than the voltage across C_{2}′, the diode D_{2}′ is on, the voltage across C_{3}′ and C_{4}′ is the same. Then, D_{4}′ is on. Then, the source voltage and capacitor C_{1}′ start to charge capacitor C_{2}′. Meanwhile, Capacitors C_{3}′ and C_{4}′ in parallel are charging capacitors C_{1}, C_{2}and C_{3}in series, the current of the inductor i_{Lr1}starts to decrease slowly, and resonant back to zero, which equals the sum of i_{d2}′ and i_{d4}′. The current i_{d4}′ equals i_{c4}′; the current i_{d2}′ equals the sum of the current flowing through capacitor C_{2}′ and the capacitor C_{4}′. ${{i}_{\mathrm{d}4}}^{\prime}={{i}_{\mathrm{d}2}}^{\prime}+{{i}_{\mathrm{c}2}}^{\prime}$, ${i}_{\text{Lr}1}={{i}_{\mathrm{d}4}}^{\prime}+{{i}_{\mathrm{d}2}}^{\prime}$, ${i}_{\text{Lr}2}={{i}_{\mathrm{d}4}}^{\prime}+{{i}_{\text{dc}4}}^{\prime}$, ${{i}_{\mathrm{d}4}}^{\prime}=C\frac{\mathrm{d}{{v}_{\mathrm{c}3}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}$, ${{i}_{\mathrm{c}2}}^{\prime}=C\frac{\mathrm{d}{{v}_{\mathrm{c}2}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}$, ${{i}_{\mathrm{c}4}}^{\prime}=C\frac{\mathrm{d}{{v}_{\mathrm{c}4}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}$, as shown in Figure 6c and Figure 7b, the equations of operation are:$$\{\begin{array}{c}{V}_{\mathrm{s}}\text{sin}\mathrm{\omega}t+\left({\mathrm{L}}_{\mathrm{r}1}\frac{\mathrm{d}{i}_{\text{Lr}1}}{\mathrm{d}\left(t-{t}_{1}\right)}+{v}_{\mathrm{c}{1}^{\prime}}\right)+{v}_{\mathrm{c}{3}^{\prime}}-\left({\mathrm{L}}_{\mathrm{r}2}\frac{\mathrm{d}{i}_{\text{Lr}2}}{\mathrm{d}\left(t-{t}_{1}\right)}+3{v}_{\mathrm{c}1}\right)=0\\ {v}_{\mathrm{c}{3}^{\prime}}+{\mathrm{L}}_{\mathrm{r}2}\frac{\mathrm{d}{i}_{\text{Lr}2}}{\mathrm{d}\left(t-{t}_{1}\right)}+3{v}_{\mathrm{c}1}={v}_{\mathrm{c}{2}^{\prime}}\\ {v}_{\mathrm{c}{3}^{\prime}}={v}_{\mathrm{c}{4}^{\prime}}\\ {i}_{\text{Lr}1}=C\frac{\mathrm{d}{{v}_{\mathrm{c}1}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}\\ {i}_{\text{Lr}2}=C\frac{\mathrm{d}{v}_{\mathrm{c}1}}{\mathrm{d}\left(t-{t}_{1}\right)}\end{array}$$ - (d)
- Stage 4 (t
_{3}–t_{4}): The circuit is working back on state 1. When the source voltage is decreasing and the sum of the source voltage and voltage across C_{1}′, C_{3}′ is smaller than V_{AC}, the sum of source voltage and voltage across C_{1}′ is smaller than the voltage across C_{2}′, then all the diodes are reversed, the current following through diodes D_{2}′ and D_{4}′ is zero; V_{AC}is larger than the sum of voltage of the capacitors C_{1}, C_{2}and C_{3}because of the resonant inductor, the current of the inductor i_{Lr2}starts to decrease slowly, and resonates back to zero. The input current i_{Lr1}is zero, because there is no current flowing through. The capacitors C_{2}′ and C_{4}′ start to charge capacitors C_{1}, C_{2}and C_{3}in series again, as shown in Figure 7b. Then:$$\{\begin{array}{c}{v}_{\mathrm{c}{2}^{\prime}}+{v}_{\mathrm{c}{4}^{\prime}}-3\left({\mathrm{L}}_{\mathrm{r}2}\frac{\mathrm{d}{i}_{\text{Lr}2}}{\text{dt}}+{v}_{\mathrm{c}1}\right)=0\\ {i}_{\mathrm{c}{2}^{\prime}}=-C\frac{\mathrm{d}{v}_{\mathrm{c}{2}^{\prime}}}{\mathrm{d}t}\\ {i}_{\mathrm{c}{4}^{\prime}}=-C\frac{\mathrm{d}{v}_{\mathrm{c}{4}^{\prime}}}{\mathrm{d}t}\\ {i}_{Lr2}=C\frac{\mathrm{d}{v}_{\mathrm{c}1}}{\mathrm{d}t}\\ {i}_{\mathrm{c}{2}^{\prime}}={i}_{\mathrm{c}{4}^{\prime}}={i}_{\text{Lr}2}\end{array}$$

- (2)
- Mode B (t
_{4}–t_{8}): the switch S_{2}is on and S_{1}is off. Also, it is working on the negative half cycle. During the entire negative half cycle, the capacitor is parallel and releases energy to load. The current is increasing slowly because of the resonant inductor L_{r3}, then resonates back to zero at the time instant t_{8}. The equation of operation is:$$\{\begin{array}{c}{V}_{o}={\mathrm{L}}_{\mathrm{r}3}\frac{\mathrm{d}{i}_{\text{Lr}3}}{\mathrm{d}t}+{v}_{\mathrm{c}1}\\ {i}_{\text{Lr}3}=3C\frac{\mathrm{d}{v}_{\mathrm{c}1}}{\mathrm{d}t}\end{array}$$$$\{\begin{array}{c}\begin{array}{c}{i}_{\text{Lr}}={I}_{\mathrm{m}3}\text{sin}{\mathrm{\omega}}_{03}t\\ {v}_{\mathrm{c}}={V}_{\mathrm{o}}-\Delta {\mathrm{V}}_{3}\text{cos}{\mathrm{\omega}}_{03}t\end{array}\end{array}$$_{03}is the impedance.- (a)
- Stage 5 (t
_{4}–t_{5}): The circuit is working on state 4. As shown in Figure 6d, when sum of source voltage and voltage across C_{2}′ is smaller than the voltage across C_{1}′and C_{3}′, and source voltage is smaller than the voltage across capacitor C_{1}′, all diodes are reversely biased. There is no current flowing through pre-stage module; all variables are kept constant. - (b)
- Stage 6 (t
_{5}–t_{6}): The circuit is working on state 5. As shown in Figure 6e, the sum of source voltage and voltage across C_{2}′ is larger than the voltage across capacitors C_{1}′ and C_{3}′, but the source voltage is still smaller than the voltage across C_{1}′, source voltage and capacitor C_{2}′ start to charge capacitors C_{1}′ and C_{3}′. The current of the inductor i_{Lr1}starts to increase slowly, which is equal to the current flowing through capacitor C_{2}′ and diode D_{3}′. The voltage across C_{2}′ is decreasing, the voltages across C_{1}′ and C_{3}′ are increasing, till v_{c2}′ is equal to v_{c3}′, as shown in Figure 7b. Hence:$$\{\begin{array}{c}{V}_{\mathrm{s}}\text{sin}\mathrm{\omega}t+{\mathrm{L}}_{\mathrm{r}1}\frac{\mathrm{d}{i}_{\text{Lr}1}}{\mathrm{d}\left(t-{t}_{1}\right)}+{v}_{\mathrm{c}{1}^{\prime}}+{v}_{\mathrm{c}{3}^{\prime}}+{v}_{\mathrm{c}{2}^{\prime}}=0\\ {i}_{\text{Lr}1}={{i}_{\mathrm{d}3}}^{\prime}\\ {{i}_{\mathrm{c}2}}^{\prime}=C\frac{\mathrm{d}{{v}_{\mathrm{c}2}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}\\ {i}_{\text{Lr}1}=C\frac{\mathrm{d}{{v}_{\mathrm{c}1}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}\\ {i}_{\text{Lr}1}=C\frac{\mathrm{d}{{v}_{\mathrm{c}3}}^{\prime}}{\mathrm{d}\left(t-{t}_{1}\right)}\end{array}$$ - (c)
- Stage 7 (t
_{6}–t_{7}): The circuit is working on state 6, as shown in Figure 6f. When the voltage across C_{2}′ is equal to the voltage across C_{3}′, which makes diodes D_{1}′ on and D_{3}′ off. The source is charging capacitor C_{1}′, the current of the inductor i_{Lr1}starts to decrease slowly, and resonates back to zero. The voltage across C_{1}′ is increasing, Voltages across C_{2}′, C_{3}′ and C_{4}′ keep constant, ${i}_{\text{Lr}1}={{i}_{\mathrm{d}1}}^{\prime}$, is shown in Figure 7b. Then:$$\{\begin{array}{c}{V}_{\mathrm{s}}\text{sin}\mathrm{\omega}\left(t+{t}_{6}\right)+{\mathrm{L}}_{\mathrm{r}1}\frac{\mathrm{d}{i}_{\text{Lr}1}}{\text{dt}}+{v}_{\mathrm{c}{1}^{\prime}}=0\\ {i}_{\text{Lr}1}=C\frac{\mathrm{d}{{v}_{\mathrm{c}1}}^{\prime}}{\text{dt}}\end{array}$$ - (d)
- Stage 8 (t
_{7}–t_{8}): The circuit is working back on state 4. When the source voltage is decreasing and the sum of source voltage and voltage across C_{2}′, is smaller than the voltage across C_{1}′ and C_{3}′, source voltage is smaller than the voltage across capacitor C_{1}′, all diodes are reversely biased. There is no current flowing through the pre-stage module; all the variables are kept constant, as shown in Figure 7b.

#### 3.4. Performance of Different Step Up/Down Cascades

**Figure 8.**The output power, voltage conversion ratio and power efficiency versus load resistor of n = 2 to pre-stage, m = 2, 3, 4 to post-stage: (

**a**) voltage conversion ratio versus load resistor; (

**b**) output power versus load resistor; and (

**c**) the power efficiency versus output current.

**Figure 9.**The output power, voltage conversion ratio and power efficiency versus load resistor of n = 1, 2, 3 to pre-stage, m = 3 to post-stage: (

**a**) the output power versus load resistor; (

**b**) conversion ratio versus load resistor; and (

**c**) the power efficiency versus output current of 1, 2, 3 pre-stage, 3 post-stage.

## 4. Experimental Results

**Figure 10.**The waveform of switched signal, input and output voltage, input current (load resistance is 200 Ω): (

**a**) Ch1: input voltage (40 V/div); Ch2: switched signal S

_{1}(20 V/div); Ch3: switched signal S

_{2}(10 V/div); (

**b**) Ch1: stepped up voltage V

_{o1}(100 V/div); Ch2: input voltage (100 V/div); Ch4: output voltage (100 V/div); and (

**c**) Ch1: output voltage (100 V/div); Ch2: input voltage (100 V/div); Ch4: input current (2 A/div).

**Figure 11.**The waveform of current flowing through resonant inductor, diode and capacitor (load resistance is 100 Ω). (

**a**) Ch1: inductor current i

_{Lr3}(1 A/div); Ch3: inductor current i

_{Lr2}(500 mA/div); Ch4: i

_{Lr1}(2 A/div); (

**b**) Ch1: inductor current i

_{Lr2}(1 A/div); Ch3: current flowing through C

_{3}(1 A/div); Ch4: current flowing through D3 (1 A/div); (

**c**) Ch1: current flowing through D

_{4}′ (1 A/div); Ch3: inductor current i

_{Lr1}(2 A/div); Ch4: current flowing through D

_{2}′ (1 A/div); (

**d**) Ch1: current flowing through C

_{4}′ (1 A/div); Ch3: inductor current i

_{Lr1}(1 A/div); Ch4: current flowing through D

_{4}′ (1 A/div).

**Figure 12.**Simulation and experimental results for power efficiency and output power of the proposed circuit: (

**a**) simulation and experimental results for power efficiency; and (

**b**) simulation and experimental results for output power.

_{r1}, L

_{r2}are designed to be 3.5 µH and 1.5 µH, respectively. However, in the experiment, the resonant inductor is realized by the parasitic inductor of the capacitors to achieve ZCS; the output capacitor is 47 µF. The load resistor is variable. Therefore, the circuit is very simple. The specifications and part number are illustrated in Table 1.

Parameter | Symbol | Specified values |
---|---|---|

Input voltage | V_{s} | 50 kHz, 50 V |

Switching frequency | f_{s} | 50 kHz |

Output voltage | V_{o} | DC 60 V |

Power | P_{o} | 100 W |

Mosfet | S_{1}, S_{2} | IRF640 |

Diode 2–9 | D_{2}’-D_{4}’, D_{2}-D_{9} | MBR20100 |

Diode 1 | D_{1}’ | MBR20200 |

All capacitors | C_{1}’-C_{4}’, C_{0}-C_{3} | 6.8 μF |

_{1}is on when the input voltage is working on the positive half wave, the switch S

_{2}is on when the input voltage in working on negative half cycle. In Figure 10b,c the input voltage, stepped up voltage, output voltage, and input current are displayed, which shows that the input voltage is first stepped up to 180 V, then stepped down to 61.2 V, which confirms the concept and the performance of the proposed circuit. Figure 10c shows the input and output voltages. In the half cycle, the current is increasing from zero and resonate back to zero again because of the resonant inductors, and the input voltage is converted by 2 × n/mV

_{s}, i.e., 2 × 2/3 V

_{s}.

_{r1}, L

_{r2}and L

_{r3}. The introduced resonant inductors reduce the current spikes, which reduce the current pressure of the components and extend their life. Meanwhile, it keeps the MOSFETs turning on and off at zero current, and ZCS is achieved. Figure 11b shows the current flowing through inductor L

_{r2}, capacitor C

_{3}and diode D

_{3}. It shows that the switches and diodes are working on ZCS. Figure 11c shows that current flowing through D

_{4}′, D

_{2}′ and inductor current i

_{Lr1}. According to Figure 11d, the input current is equal to the sum of currents flowing through diodes D

_{4}′, D

_{2}′, and it also shows that the diode D

_{4}′conducts first and then diode D

_{4}′ conducts. Meanwhile, the inductor current i

_{Lr1}is equal to the sum of current flowing through capacitor C

_{4}′ and the diode D

_{4}′. There is a slight difference between simulation result and experiment result as compared with Figure 7b. The current in experiment as shown in Figure 11c is a resonant current because the resonant inductor in experiment is the parasitic inductor which exists in each capacitor.

## 5. Conclusions

## Author Contributions

## Conflicts of Interest

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## Share and Cite

**MDPI and ACS Style**

Xu, C.; Cheng, K.W.E.
A Switched Capacitor Based AC/DC Resonant Converter for High Frequency AC Power Generation. *Energies* **2015**, *8*, 10842-10860.
https://doi.org/10.3390/en81010842

**AMA Style**

Xu C, Cheng KWE.
A Switched Capacitor Based AC/DC Resonant Converter for High Frequency AC Power Generation. *Energies*. 2015; 8(10):10842-10860.
https://doi.org/10.3390/en81010842

**Chicago/Turabian Style**

Xu, Cuidong, and Ka Wai Eric Cheng.
2015. "A Switched Capacitor Based AC/DC Resonant Converter for High Frequency AC Power Generation" *Energies* 8, no. 10: 10842-10860.
https://doi.org/10.3390/en81010842