Enhancing Commutation Failure Immunity of LCC-HVDC Systems with a Fuzzy Adaptive PI Scheme and STATCOM Integration

Abstract

Commutation failures (CFs), which occur when current transfer between valves in line-commutated converter high-voltage direct current (LCC-HVDC) systems is disrupted, pose a challenge in weak alternating current (AC) networks. This paper introduces a coordinated control strategy that combines a fuzzy self-tuning proportional-integral (PI) controller (FSTPIC) and a static synchronous compensator (STATCOM) device to mitigate CFs and enhance system stability. The approach applies the FSTPIC to both converters of the HVDC link, while the STATCOM at the inverter side delivers dynamic reactive power and voltage support during AC faults. We test this strategy on the CIGRE HVDC benchmark system using MATLAB/SIMULINK simulations. The results demonstrate that the proposed method significantly reduces CFs, mitigates transient oscillations, and shortens recovery time compared to conventional control techniques. This coordinated control boosts voltage stability and the system’s ability to ride through faults, confirming its superiority under various fault scenarios in weak-grid conditions.

1. Introduction

LCC-HVDC systems are technologies that play a vital role in transmitting electrical energy over long distances, handling large capacities, and enabling asynchronous AC grid connections. These configurations utilize line-commutated converter (LCC) topologies. This technology can efficiently transfer power with low losses [1,2,3].

However, the interconnection between AC and DC networks is crucial to the stability of HVDC systems. In general, the strength of an AC-DC system is characterized by the short-circuit ratio (SCR), which quantifies the relative stiffness of the AC grid with respect to the transmitted DC power [4,5,6]. The SCR is commonly used to distinguish between strong and weak AC systems. In this regard, commutation failure (CF) represents one of the most critical interactions in LCC-HVDC systems, and its occurrence is significantly exacerbated under weak SCR conditions [5].

In addition, voltage distortions and amplitude depressions in AC networks, particularly under weak grid conditions and on the inverter side [6], may trigger CFs. Such events can lead to severe operational consequences, including DC side voltage depression, increased current stress, and reduced or interrupted power transfer capability. Furthermore, repeated CF events may accelerate the aging of converter valves, thereby reducing system reliability and compromising the overall stability and security of power transmission systems [7].

Nowadays, several methods have been developed to mitigate or reduce the occurrence of commutation issues and expedite grid return to normal after a fault in HVDC systems based on LCCs. The CF mechanism has been investigated extensively in the literature. As evidenced in [8,9], the DC current level, the AC voltage magnitude, the control firing angle, and the commutation reactance significantly influence the likelihood of CF. The relationship between power and control is very complex, motivating the development of dedicated analytical and numerical models. Building on these studies, a variety of mitigation strategies have been advanced, spanning both hardware- and software-oriented solutions. Control-oriented mitigation remains the predominant means of preventing commutation failures in LCC HVDC schemes, typically classified into three categories: enhancement of control systems, utilization of reactive power compensators, and improvement of converter topology [9]. That has evolved into the mature Commutation Failure Prevention (CFPREV) control mechanism, which triggers firing angle advancement when voltage drops exceed predetermined thresholds [10,11]. Another main control is the Voltage Dependent DC Order Limiter (VDCOL), which immediately reduces the DC current when the AC drops below specified thresholds [8,12,13].

A control strategy aimed at enlarging the commutation margin is proposed to improve recovery performance following CF while accounting for the rapid changes in voltage and the DC current [14]. Improved phase-locked loop (PLL) architectures, when combined with auxiliary controls, explicitly decouple phase- and frequency-detection functions, thereby enhancing synchronization and mitigating CF [15,16,17]. Systems for managing reactive power, including STATCOMs and synchronous condensers, are widely deployed to enhance immunity to CFs [18,19,20].

Adaptive voltage-control strategies for synchronous condensers account for the converters’ transient reactive power demand during recovery from a CF, adjusting the voltage regulation according to the converters’ operating state [8,21]. Predictive control combined with self-adaptive DC-current regulation dynamically adjusts converter firing angles to maintain sufficient commutation margins under fault conditions, thereby mitigating the occurrence of CFs [22,23,24].

Coordinated reactive power control methods use voltage interaction factors to identify strongly coupled DC systems and trigger dynamic reactive power compensation devices [25]. The insertion of controllable series capacitors, or implementation via hybrid converter topologies, raises the effective commutation voltage, thereby suppressing CFs during AC faults [26]. Controllable line-commutated converters (CLCCs) that combine partially and fully controllable semiconductor devices can eliminate CFs [27]. DC chopper topologies composed of energy-absorbing submodules based on thyristor full-bridge modules reduce the likelihood of CF and improve post-failure recovery performance [9].

Superconducting fault current limiters (SFCLs) offer a means to suppress CFs by limiting fault currents and increasing commutation margins during disturbances [28,29,30,31]. Including series voltage compensators, series voltage conditioners, and superconducting fault current limiters provides voltage support, thereby strengthening immunity to CFs [32,33,34]. The combination of a line-commutated converter (LCC) station with modular multilevel converters (MMCs) on the inverter side, together with flexible reactive power coordination, enhances resilience to CFs and improves post-fault recovery [35,36].

Conventional PI controllers employ fixed gains (K_p, K_i) and are therefore limited to nominal operating conditions, exhibiting degraded performance under disturbances. Adaptive PI controllers adjust gains via predefined mechanisms but remain dependent on model assumptions and lack true real-time adaptability. Neural network (NN)-based PI controllers provide learning capability; however, they require extensive training data and impose a significant computational burden. Fuzzy logic controllers (FLCs) are effective in handling nonlinearities without an explicit model, yet standalone FLC schemes do not preserve the well-established PI control structure commonly used in industrial practice. In contrast, the proposed FSTPIC integrates a conventional PI framework with a fuzzy inference mechanism that continuously tunes (K_p,K_i) online based on the error and its rate of change, ensuring fast adaptation without training requirements or detailed system modeling. This renders the approach particularly suitable for weak-grid LCC-HVDC systems subject to rapid transients.

For the purpose of this study, improved analysis and approaches are done using the CIGRE LCC-HVDC reference model available within the MATLAB platform in order to minimize CFs and enhance the fault-recovery capability of the LCC-HVDC system. The performance of the controller and AC-DC interactions during different AC fault conditions is analyzed in order to identify the main causes of CFs.

The proposal is to include two strategies in the system. The first is a fuzzy self-tuning PI controller (FSTPIC). The control is based on the online tuning of PI controller gains using fuzzy logic. The error and error rate serve as inputs to the FSTPIC. The signal follows the reference due to the controller’s output gains. The second strategy is the integration of a STATCOM static compensator based on the voltage-source converter (VSC) technique. The approach applies the FSTPIC to both converters of the HVDC link, while the STATCOM at the inverter side can provide dynamic, flexible reactive power and voltage support, suppressing fluctuations and enhancing AC system transient voltage stability.

This paper is organized as follows. The structure of the LCC-HVDC transmission system is discussed in Section 2. The structure of the communication algorithm and CF technique is outlined in Section 3. Section 4 illustrates the structure of the hybrid fuzzy self-tuning PI controller. The concept of STATCOM is briefly discussed in Section 5. Section 6 gives a series of case studies to verify the proposed schemes.

2. Test System

The weak SCR of AC grids connected to the HVDC systems proposed by CIGRE requires the use of flexible and robust control systems. Thus, the CIGRE HVDC benchmark model provides an excellent basis for validating control and protection systems [37]. Therefore, the validation of the systems described in this work is based on this model.

The HVDC interconnection is a monopolar 1000 MW/500 kV, with only one conductor on the DC side; each converter (rectifier and inverter) operates at 12 pulses (2 × 6-pulse Graetz bridges) linked to weak AC grids with an SCR of 2.5, The AC network connected to the rectifiers has a nominal voltage of 500 kV at 60 Hz, while the grid connected to the inverters has a nominal voltage of 345 kV at 50 Hz. A reactance connected in series between HVDC stations to smooth the DC current, and fixed capacitor banks are connected to give the reactive power required by the converters, as in Figure 1.

Table 1. Parameters of CIGRE HVDC model.

Parameter	Rectifier	Inverter
AC voltage	345 kV	230 kV
DC power	1000 kW	1000 kW
DC voltage	500 kV	500 kV
DC current	2 kA	2 kA
Frequency	60 Hz	50 Hz
Filter VAR supply	620 MVAR	625 MVAR
SCR	2.5	2.5
Nominal angle	15°	15°

shows the CIGRE HVDC system data [38].

3. Commutation Failure in LCC-HVDC Systems

Of all the dynamic phenomena that occur in LCC-HVDC power systems, commutation failure (CF) is perhaps the most frequently occurring problem. Total elimination of commutation failure can be challenging due to the inherent characteristics of thyristor valves at the inverter station [39,40]. CF is not a fault caused by a malfunctioning valve. This problem can occur during a fault in the AC network connected to the converter or due to a delay in the synchronization of a firing pulse with the AC voltage.

To facilitate the understanding of CF, the basic module of an LCC is considered. It employs a six-pulse Graetz bridge configuration comprising six thyristor valves, as illustrated in Figure 2. These thyristors operate in pairs from the upper and lower groups, thereby establishing the connection between the AC and DC systems. Proper commutation requires that only two thyristors conduct simultaneously, ensuring the generation of a continuous DC current. The commutation process between valve 1 and valve 3 is depicted in Figure 3.

For thyristor converters, the instants of transmission of the gate pulses are crucial. The process of opening a valve for commutation must respect the recovery time of the latter to avoid untimely reclosing, more particularly at the inverter, since the opening of the valve must be done when its commutation voltage is negative [42]. A minimum extinction angle, γ_min, must therefore be respected for the commutation process to be successful; generally, its value is around 10° [43].

The relationship between the extinction (γ), firing (α), and overlap angle (μ), as in [43], can be expressed as

$$\mathsf{\gamma }={180}^{\mathrm{o}}-\mathsf{\alpha }-\mathsf{\mu }$$

(1)

The CF is caused by the inability of a converter valve to pass current before its commutation voltage becomes negative. A delayed firing pulse is therefore a plausible cause of CF. In addition, the thyristor requires a certain amount of time before reaching its ultimate turn-off [42]. Deionization time must be allowed for the recombination of internal charges and thus the establishment of a quasi-infinite impedance [44]. If the terminal voltage becomes positive again before the deionization time ends, the thyristor re-latches. This undesirable event destabilizes the commutation sequence and causes a failure. To this end, the value of angle γ must be precisely controlled [15,40].

For example, a decrease in the commutation voltage level or distortions of the latter can cause α to fall below the minimum required value due to a possible increase in the firing angle ordered by the regulators. If the failure occurs due to low AC voltage, simply restoring the network after a fault can reduce the chances of subsequent CF. Similarly, a phase shift in the commutation voltage can also cause CF [42]. It is therefore essential that the interconnection AC/DC be controlled by a synchronization system that adapts quickly, as well as by excellent predictive controls to force the angle γ to remain within a particular order of value [15].

An increase in the overlap angle, µ, driven by an increase in current, can also cause a decrease in the angle, γ. The size of this angle is influenced by the commutation reactance (X_C) of the converter, which is mainly composed of the secondary leakage reactance of the transformers.

μ can be expressed as a function of the DC, I_d; the angle, α; the reactance, X_C; and the AC between the two Lignes, V_LL

$$\mathsf{\mu }=\mathrm{a}\mathrm{r}\mathrm{c}\mathrm{o}\mathrm{s}\left[\mathrm{c}\mathrm{o}\mathrm{s}\mathsf{\alpha }-\sqrt{2}{\displaystyle \frac{{\mathrm{X}}_{\mathrm{c}}{\mathrm{I}}_{\mathrm{d}}}{{\mathrm{V}}_{\mathrm{L}\mathrm{L}}}}\right]-\mathsf{\alpha },$$

(2)

Therefore, a strategy is required to reduce the occurrence of CFs and minimize the instability of the LCC-HVDC link due to AC faults or control system ambiguity [7].

4. Fuzzy Self-Tuning PI Controller

The fuzzy self-Tuning PI controller (FSTPIC) is a control strategy that addresses the limitations of conventional PI controllers in HVDC systems connected to weak AC grids, unlike fixed-gain PI controllers, whose proportional and integral gains (K_p, K_i) are set for a specific operating point. The FSTPIC adapts its parameters continuously in real time, based on the instantaneous error and its derivative; this adaptive feature improves robustness against parameter uncertainties, external disturbances, and commutation failures [38,41,45].

In this design, the FSTPIC is included on both sides of the HVDC link, the rectifier and the inverter; each side employs voltage and current controllers, initially designed as conventional PI controllers, where gains are dynamically adjusted online using a fuzzy logic module. Based on a Mamdani inference mechanism and a heuristic rule base, it enables self-adaptation and continuous optimization of controllers by combining fixed PI controllers with the adaptive intelligence of fuzzy logic (Figure 4). Let

$$E=g_{ref}-g_m,$$

(3)

$$R={\displaystyle \frac{(E-E_p)}{T_s}},$$

(4)

where

• E: Error between g_ref and g_m;
• E_p: Previous value of error;
• R: The error rate;
• g_ref: The reference greatness;
• g_m: The measured greatness;
• T_s: The sampling time.

The FSTPI operates by processing two key input variables, the instantaneous error (e) and its time derivative (de/dt), extracted from each PI regulator. These variables are fuzzified into seven linguistic terms: PB (Positive Big), NM (Negative Medium), NS (Negative Small), Z (Zero), PS (Positive Small), PM (Positive Medium), and NB (Negative Big). The membership functions are considered triangular for (PM, PS, Z, NS and NM) and trapezoid for (PB and NB), enabling a flexible representation of expert knowledge (Figure 5).

The initial values of the proportional and integral gains (K_po and K_io) of the conventional PI controller are determined through a trial-and-error approach to ensure satisfactory performance. Subsequently, the error and its rate of change are employed as input variables to the fuzzy logic controller. These inputs are first normalized and fuzzified using scaling factors, after which they are processed by the heuristic rule base to generate the fuzzy controller outputs, F_p and F_i (Figure 6). Finally, these outputs can be rescaled through the modulation factors K_p and K_i in order to further optimize the overall system performance.

The fuzzy rule base is first derived from control-engineering heuristics in the error–error rate (E–R) phase plane. E and R represent the instantaneous deviation and its dynamic evolution. This setup enables physically consistent control actions. The main rules increase K_p when large, diverging errors are present. They maintain nominal gains near steady state and reduce K_p under overshoot conditions. K_i is kept more conservative to mitigate integral windup. The complete 7 × 7 rule table is then fine-tuned using a systematic perturbation-based empirical procedure. In this procedure, the sensitivities of K_p and K_i are evaluated to ensure monotonic error reduction, improved damping, and stable convergence. This two-stage design ensures both physical interpretability and robust performance under normal and fault conditions. The fuzzy rule bases for K_p and K_i are presented in

Table 2. K_p control rules.

ERR	ERR RATE
	NB	NM	NS	Z	PS	PM	PB
NB	NB	NB	NB	NB	NM	NM	NS
NM	NB	NB	NM	NM	NM	NS	Z
NS	NB	NM	NS	NS	NS	Z	Z
Z	Z	Z	Z	Z	Z	Z	Z
PS	Z	Z	PS	PS	PM	PM	PB
PM	Z	PS	PS	PM	PM	PB	PB
PB	PS	PM	PM	PM	PB	PB	PB

and

Table 3. K_i control rules.

ERR	ERR RATE
	NB	NM	NS	Z	PS	PM	PB
NB	NB	NB	NM	NS	NS	Z	Z
NM	NB	NB	NS	NS	NS	Z	Z
NS	NB	NM	NS	NS	Z	PS	PS
Z	NM	NM	NS	Z	PS	PM	PM
PS	NS	NS	Z	PS	PM	PM	PB
PM	Z	Z	PS	PS	PS	PB	PB
PB	Z	Z	PS	PM	PM	PB	PB

, respectively. These rules are derived from control heuristics and fine-tuned empirically.

Defuzzification is performed using the centroid method, which provides accurate values for ΔK_p and ΔK_i. In this context, the center of gravity is adopted as the final output criterion. The output expression is written as follows:

$$\Delta K={\displaystyle \frac{\sum {{\mu }_{i}z}_i}{\sum {\mu }_i}},$$

(5)

where

µ_i: The membership value for the output function;

z_i: The output variable.

The fuzzy system’s output addresses the limitation of fixed proportional and integral gains in a conventional PI regulator (Figure 7). Accordingly, the values of K_p and K_i are updated online through the fuzzy controller, as expressed by the following equations:

$$K_p=K_{po}+{\Delta K}_p·K_p,$$

(6)

$$K_i=K_{io}+{\Delta K}_i·K_i,$$

(7)

where

K_po, K_io: The conventional gains;

ΔK_p, ΔK_i: The output gains tuned by FSTPI controllers;

K_p, K_i: Scaling factor from the output of proportional and integral gains.

The proposed control unit exhibits robust performance under variations in fault location, owing to a design based on real-time feedback of system variables rather than fault-location-dependent parameters. The FSTPIC utilizes the instantaneous error and its derivative at the converter terminals, which directly reflect the overall system dynamics and enable the controller to respond to disturbances propagating through the network rather than their physical origins. Although the fault location influences the severity and dynamic characteristics of the disturbance, including the depth of voltage sag, recovery time, and commutation margin reduction, the controller adaptively tunes its gains online to maintain stable, satisfactory performance. Consequently, its effectiveness remains consistent and reliable across different fault scenarios in the studied system.

5. STATCOM

The STATCOM has become a fundamental component in modern electrical systems, primarily due to its capability for rapid recovery following network faults and its consistent, dynamic response in regulating power flow [46]. A notable feature underscoring this robustness is its ability to maintain and deliver the full rated current to the grid, even under significantly low voltage conditions. This capability ensures uninterrupted reactive power support during critical voltage sags, which is a key advantage over traditional compensation technologies [47].

In its simplest form, a STATCOM (Figure 5) consists of a voltage source converter (VSC) based on the power electronic devices (GTO, IGBT), a DC voltage source (capacitors), and a transformer for coupling to the grid [19,20]. The STATCOM generates a balanced three-phase voltage waveform whose magnitude and phase angle can be separately controlled depending on the system’s needs. This control enables the regulation of the exchange of reactive power with the AC grid [5].

The controller keeps the output voltage of the STATCOM (V_ST) in phase with the grid voltage (V_b) to regulate the exchange of reactive and active power (Equation (9), Figure 8) as:

$$P={\displaystyle \frac{V_b{V}_{ST}}{X_{TF}}}sin\delta ,$$

(8)

$$Q={\displaystyle \frac{V_b}{X_{TF}}}(V_b-V_{ST}cos\delta ),$$

(9)

where

V_b: Busbar voltage where the STATCOM is connected;

V_ST: STATCOM output voltage;

δ: Phase shift between V_r, V_ST;

X_TF: The leakage reactance of the transformer.

Since δ ≈ 0, there is no active power flow:

$$P\approx 0$$

(10)

$$Q={\displaystyle \frac{V_b}{X_{TF}}}(V_b-V_{ST}),$$

(11)

How it works can be described as follows:

If V_ST > V_b, the STATCOM will act as a reactive power source by injecting reactive current into the system.

If V_ST = V_b, there is no reactive power exchange.

If V_ST < V_b, the STATCOM absorbs reactive power.

6. Simulation Studies

In order to verify the success of the above-mentioned control strategy in reducing CFs, a set of simulation tests was performed using the MATLAB (R2018b). As the formation of CFs is highly sensitive to the severity of the fault and time of initiation of the fault, both single-phase-to-ground and three-phase faults, each lasting for 100 ms with different fault reactance, L_f, were introduced to the AC bus on the inverter side, which has been found to be the most vulnerable section of the entire system.

The developed strategy relies on two complementary components: reinforcement of the HVDC system via a STATCOM device and optimization of control performance via an FSTPIC. To analyze the impact of each enhancement, four scenarios were considered: the conventional system, the system equipped with an FSTPIC, the system reinforced with a STATCOM, and the system combining the FSTPIC and the STATCOM.

During fault conditions, the FSTPIC and STATCOM operate in a coordinated but decoupled manner. The FSTPIC dynamically adjusts PI gains based on real-time error signals at the converter terminals, while the STATCOM independently provides reactive power support to regulate AC bus voltage. Since both controllers act on different layers of the system—control parameters for the HVDC converter versus reactive power injection in the AC network—there is no direct coupling or conflict between their commands. Instead, their interaction is indirect through shared system variables such as AC voltage. This results in complementary behavior that enhances overall system stability and improves immunity to commutation failures.

6.1. Single Phase to Ground Fault

The proposed control strategies are evaluated by simulating a single-phase-to-ground fault, a type of electrical short circuit in which one phase of the power system makes contact with ground at the inverter-side AC bus of the HVDC system. Fault severity is adjusted by varying the fault inductance (L_f), which represents the opposition to changes in electrical current caused by the fault, from 0 to 0.6 H. During a 100 ms fault applied between 1.2 s and 1.3 s, with L_f set to 0.15 H, the HVDC system, equipped with an FSTPIC and a STATCOM, demonstrates improved transient performance. This configuration limits the peak electrical current to 1.25 p.u., as shown in Figure 9, and enhances the direct current (I_d) waveform.

The effect of the FSTPIC is significant from the onset of the transient, as reflected by an optimized response dynamics and a reduced rise time. Enhanced damping of current, I_d, oscillations is achieved, which promotes fast stability recovery after fault clearance. Although the settling time remains minimal with FSTPIC and the current undershoot does not exceed 0.46 p.u., using either the FSTPIC alone or the STATCOM alone in the LCC-HVDC system does not fully suppress instabilities, resulting in persistent commutation failures (

Table 4. Performance of different control strategies during a single-phase-to-ground fault on the inverter side.

HVDC System with	Peak Current (Id) (p.u.)	Rise Time (s)	Settling Time (s)	Recovery Time (s)
Conventional PI	2.52	0.16	0.48	0.23
FSTPIC	1.82	0.12	0.46	0.10
Conventional PI + STATCOM	2.34	0.14	0.48	0.29
FSTPIC + STATCOM	1.25	0.12	0.46	0.08

and

Table 5. Occurrence of CFs under a single-phase-to-ground fault on the inverter side.

Fault Inductance L(H)	HVDC with
	Conventional-PI	FSTPIC	Conventional-PI + STATCOM	FSTPIC + STATCOM
0.60	No CFs	No CFs	No CFs	No CFs
0.55	CFs	No CFs	No CFs	No CFs
0.20	CFs	CFs	No CFs	No CFs
0.15	CFs	CFs	CFs	No CFs
0	CFs	CFs	CFs	CFs

).

Integrating the STATCOM into the FSTPIC-regulated system substantially improves overall robustness. The peak current magnitude is reduced to 1.25 p.u, compared with 1.82 p.u. when the STATCOM is not connected (Figure 9), evidencing enhanced transient stability and a marked reduction in settling time. In addition, this hybrid configuration achieves the fastest post-fault stabilization and completely eliminates commutation failures under the tested operating conditions (Figure 10).

Table 5 summarizes commutation failure occurrences for the four studied systems during and after a single-line-to-ground fault over an extended fault-inductance range of 0 H to 0.6 H. The results confirm the effectiveness of the proposed control scheme: the HVDC system combining FSTPIC and STATCOM ensures complete immunity for any fault inductance: L_f > 0.15 H. This outcome validates the capability of the proposed approach to preserve power transmission integrity under severe asymmetrical disturbances.

6.2. Three-Phase Fault

The simulation results are summarized in

Table 6. Performance of different control strategies during three-phase fault on the inverter side.

HVDC System with	Peak Current (Id) (p.u.)	Rise Time (s)	Settling Time (s)	Recovery Time (s)
Conventional PI	2.57	0.15	0.49	0.35
FSTPIC	1.92	0.12	0.46	0.10
Conventional PI + STATCOM	2.32	0.14	0.49	0.26
FSTPIC + STATCOM	1.16	0.12	0.46	0.10

, with corresponding waveforms illustrated in Figure 11 for a fault inductance of 0.2 H; under conventional control, the system exhibits sustained oscillations with significant voltage and current fluctuations, resulting in multiple CFs specifically, and the inverter-side AC voltage experiences a substantial drop to 0.23 p.u., while peak current magnitude reaches 2.57 p.u.

The proposed FSTPIC-enhanced system is robust against voltage and current transients while accelerating the dynamic response, achieving steady-state recovery in less than 0.10 s. After STATCOM integration, stable HVDC operation is achieved with well-behaved waveforms and complete suppression of CFs (Figure 12).

Table 7. Occurrence of CFs under a three-phase fault on the inverter side (Figure 9). Single-phase-to-ground fault on the inverter side.

Fault Inductance L(H)	HVDC with
	Conventional-PI	FSTPIC	Conventional-PI + STATCOM	FSTPIC + STATCOM
0.85	No CFs	No CFs	No CFs	No CFs
0.75	CFs	No CFs	No CFs	No CFs
0.30	CFs	CFs	No CFs	No CFs
0.20	CFs	CFs	CFs	No CFs
0	CFs	CFs	CFs	CFs

presents a comparative analysis of CF occurrences across the four investigated control schemes during and following three-phase faults, with fault inductance, L_f, varying from 0 H to 0.85 H. Notably, the HVDC system incorporating both the FSTPIC and STATCOM exhibits zero CFs for L_f values exceeding 0.2 H.

7. Conclusions

This paper introduces an effective solution to mitigate commutation failure in LCC-HVDC systems connected to weak AC networks. The proposed method enhances HVDC system performance by integrating a fuzzy self-tuning PI controller (FSTPIC) with a STATCOM. The STATCOM provides dynamic reactive power support, while the FSTPIC optimizes the control strategy, improving overall system performance. Simulation results under various fault conditions, including single-phase and three-phase faults on the inverter side, demonstrate substantial improvements in dynamic response and system stability. The findings show that the proposed system effectively reduces commutation failures, minimizes recovery time, and mitigates transient oscillations, thereby enhancing stability and reliability compared to conventional setups without these enhancements.

Despite the promising performance of the proposed FSTPIC–STATCOM strategy, the primary implementation challenge lies in meeting the real-time computational requirements of fuzzy inference within the strict HVDC control cycle. Closely related challenges include the sensitivity to measurement noise and communication delays, as well as the need for precise parameter tuning at commissioning. Additionally, proper coordination with HVDC protection schemes and consideration of STATCOM sizing, cost, and fault-time capability introduce further complexities. Addressing these issues is essential for successful industrial deployment and optimization of the proposed approach.

In future work, this work will be advanced by performing Hardware-in-the-Loop (HIL) experimental validation to strengthen the reliability of the results. Enhancements to the proposed FSTPIC algorithm will be explored to optimize its effectiveness under more severe and complex fault conditions. Additionally, advanced control strategies and the proposed approach will be incorporated into multi-terminal HVDC (MTDC) systems to improve grid stability and robustness.