A Review of Filters for Conducted Electromagnetic Interference Suppression in Converters

Abstract

With the evolution of semiconductor devices, power electronics systems are trending towards higher frequencies and greater integration, leading to increasingly severe electromagnetic interference (EMI) issues. As an effective means of suppressing EMI, EMI filters have been extensively researched consequently. Over the past few decades, research on EMI filters has yielded a wealth of valuable achievements. However, the existing literature lacks a comprehensive and systematic collation of different EMI filters. In order to fill this gap, this work presents a thorough survey of EMI filters. According to their principles and implementation methods, these EMI filters can be broadly categorized into three types: Passive EMI Filters (PEFs), Active EMI Filters (AEFs) and integrated electromagnetic EMI filters (IEFs). Based on the review of the principles for each category, this paper analyzes their respective advantages, drawbacks, and development status. Through organization and categorization, this work aims to provide a reference for researchers and designers.

1. Introduction

The invention of controllable switching devices in the 1960s marked the advent of the power electronics era. While converters have brought significant transformation, they have also introduced electromagnetic interference (EMI) issues. The rapid switching of these devices causes abrupt changes in circuit voltage and current. High dv/dt and di/dt form conductive paths through the circuit’s parasitic inductance and ground parasitic capacitance, respectively, generating EMI that disrupts the normal operation of other equipment. EMI not only affects the stable operation of power supply systems and electricity grids, reduces the performance of electrical equipment, and disrupts remote and data communications, but may even impact aviation navigation, thereby posing a threat to human life and safety. Scholars have adopted methods such as shielding and filtering to suppress EMI.

Over the past decade, with the gradual adoption of third-generation switching devices in photovoltaic power generation and new energy vehicles, their switching frequency has increased by 4 to 5 times compared to second-generation devices. This trend has driven power electronics systems toward higher frequencies and greater integration. The increasingly frequent voltage and current switching leads to more severe EMI, while the growing integration of power electronics systems exacerbates its impact [1]. Today, EMI has become one of the factors hindering the advancement of power electronics. Effectively suppressing EMI is an urgent issue in the field, attracting numerous scholars to invest in research, which has yielded many valuable results.

Among various solutions, designing EMI filters to block conductive EMI propagation is one of the effective means to achieve electromagnetic compatibility (EMC), and substantial research has been conducted in this area. This paper compiles relevant research findings on conductive EMI filters and analyzes the advantages, disadvantages, and development prospects of different filters. Section 2 outlines the methodology of this review. Section 3 elaborates on the principles and current development status of passive EMI filters (PEFs). Section 4 reviews the principles, classification, and development status of active EMI filters (AEFs). Section 5 discusses the principles, classification, and development prospects of electromagnetic integrated EMI filters (IEFs). Section 6 provides a comprehensive comparative analysis of the three types of filters. Finally, Section 7 presents the conclusions and provides future prospects for EMI filters.

2. Methodology

2.1. Reference Database

A systematic literature search was conducted across the Institute of Electrical and Electronics Engineers Xplore (IEEE Xplore), CNKI, WanFang Data, and Scopus databases, covering the period from their inception to November 2025. The search strategy applies Boolean operators (AND, OR) to query multiple keywords in the title, abstract, and keyword fields, based on their relative relevance.

2.2. Selection Criteria

The specific selection criteria are as follows:

(1)

The research topic should pertain to filter design.

(2)

The abstract must include references to electromagnetic interference or electromagnetic compatibility.

(3)

Priority shall be given to original research articles and conference papers to ensure data originality and reliability.

(4)

Non-original research literature such as review articles, book chapters, editorials, and commentaries shall be excluded.

2.3. PRISMA Protocol

Following the selection criteria outlined in Section 2.2, the literature resources were screened to eliminate duplicates and studies with low relevance to the article’s content, resulting in the references cited herein. The specific process is illustrated in the PRISMA [2] flowchart shown in Figure 1.

3. Principles and Current Development Status of PEFs

3.1. Basic Components of PEFs

Based on their conduction paths, EMI can be categorized into common-mode (CM) interference and differential-mode (DM) interference. CM interference refers to in-phase noise components on the positive and negative busbars, forming a loop through the protective earth (PE). DM interference refers to out-of-phase noise components on the positive and negative busbars, circulating through the main power circuit structure. Taking a single-phase full-bridge inverter as an example, Figure 2 illustrates the conducted paths for CM and DM interference tests without filters. EMI testing is performed using a Line Impedance Stabilization Network (LISN). The LISN on the DC side measures EMI propagating from the inverter to the DC source, while the LISN on the AC side measures EMI from the inverter to the load. Due to their distinct generation mechanisms and conduction principles, the filter design requirements differ for DM and CM interference.

The basic configuration of a passive filter is shown in Figure 3, where L_CM, L_DM, C_X1, C_X2 and C_Y represent the CM inductor, DM inductor, X-capacitors, and Y-capacitor, respectively. The L_CM, also known as a CM choke (CMC), consists of two coils symmetrically wound on a magnetic core. When CM current flows through it, the magnetic fluxes in the core add up, resulting in a significant inductance that suppresses the CM current. Conversely, when DM current flows, the magnetic fluxes cancel each other out, resulting in negligible inductance, thus allowing the DM current to pass through without attenuation. Consequently, the CM inductor can effectively suppress CM interference in balanced lines without affecting the normally transmitted DM signals. The L_DM and C_X, C_Y form a low-pass filter, primarily filtering out differential-mode interference. Simultaneously, the L_CM, part of the L_DM, and C_Y also form a low-pass filter, primarily filtering out common-mode interference.

Based on the analysis of the conducted paths in Figure 2, the passive filter can be abstracted into CM and DM filter equivalent circuits to facilitate filter design. The resulting equivalent circuits of the filter are shown in Figure 4.

By neglecting the load impedance and noise source impedance, the cutoff frequency expressions for CM and DM can be derived as follows:

$$f_{{\mathrm{c}\_}_{\mathrm{C}\mathrm{M}}}={\displaystyle \frac{1}{2\mathsf{\pi }\sqrt{2C_{\mathrm{Y}}\left(L_{\mathrm{C}\mathrm{M}}+\frac{1}{2}{L}_{\mathrm{D}\mathrm{M}}\right)}}}$$

(1)

$$f_{{\mathrm{c}\_}_{\mathrm{D}\mathrm{M}}}={\displaystyle \frac{1}{2\pi \sqrt{2C_{\mathrm{X}2}{L}_{\mathrm{D}\mathrm{M}}}}}$$

(2)

The general approach to passive filter design involves determining the filter’s cutoff frequency using the insertion loss curve [3]. Insertion Loss (IL) is defined as the ratio of the power delivered from the noise source to the load without the filter connected in the circuit, to the power delivered with the filter connected. It is commonly expressed in decibels (dB), and its mathematical expression is given as follows:

$$IL=10\mathrm{l}\mathrm{g}\left({\displaystyle \frac{P_1}{P_2}}\right)=20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{V_1}{V_2}}\right)$$

(3)

where P₁ and P₂ are the power delivered from the source to the load before and after the filter is inserted, respectively. V₁ and V₂ are the voltage delivered from the source to the load before and after the filter is inserted, respectively. The specific design procedure can be summarized into the following five aspects:

(1)

Obtain the electromagnetic interference spectrum of the equipment through measurement or prediction, including both DM and CM interference.

(2)

Select an appropriate filter topology.

(3)

Design the filter’s insertion loss and determine its cutoff frequency.

(4)

Determine the parameters of each filter component based on the cutoff frequency and safety regulations.

(5)

Further optimize the filter to ensure its applicability in practical scenarios.

Taking the typical filter topology presented in Figure 3 as an example, this section illustrates the method for determining the cutoff frequency using insertion loss. First, the DM/CM spectrum is compared with the EMI limit. The portion exceeding the limit represents the insertion loss requirement, as detailed in Figure 5a. It should be noted that EMI standards (such as CISPR) typically specify only the total conducted EMI limit. When compared with individual CM or DM interference components, the applicable EMI limit should be 6 dB lower than the total EMI limit [4]. Then, the cutoff frequency is determined graphically. The magnitude-frequency characteristic of insertion loss can be approximated by asymptotes, with filters of different orders exhibiting different asymptotic slopes. The second-order system shown in Figure 4 has an asymptotic slope of 40 dB/dec. As shown in Figure 5b, a straight line with a slope of 40 dB/dec is translated to the position tangent to the insertion loss requirement, ensuring effective suppression of all exceeding components. The corresponding horizontal coordinate f_c is the cutoff frequency of the relevant mode, which can be substituted into Equations (1) and (2) to provide reference for filter design.

3.2. Methodology for PEFs Topology Selection

The discussion in Section 2.1 did not account for the influence of noise source impedance and load impedance, which can lead to issues such as prolonged trial-and-error cycles and over-design at certain frequency points. The actual insertion loss is closely related to the source and load impedances. Here, the filter is equivalently modeled as a two-port network, and the relationship between insertion loss and the input/output impedances is described by A-parameters.

The A-parameters of this two-port network in Figure 6 can be derived from the component parameters within the filter:

$$\left[\begin{array}{c}{\dot{U}}_1\\ {\dot{I}}_1\end{array}\right]=\left[\begin{array}{cc}{A}_{11}& A_{12}\\ A_{21}& A_{22}\end{array}\right]\left[\begin{array}{c}{\dot{U}}_2\\ {\dot{I}}_2\end{array}\right]$$

(4)

Consequently, the insertion loss expression can be derived as:

$$IL=20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{A_{11}{Z}_{\mathrm{L}}+A_{12}+A_{21}{Z}_{\mathrm{S}}{Z}_{\mathrm{L}}+A_{22}{Z}_{\mathrm{S}}}{Z_{\mathrm{S}}+Z_{\mathrm{L}}}}\right)$$

(5)

Insertion loss is closely related to both the source impedance of the noise and the load impedance. Therefore, the influence of impedance must be considered in filter design.

The selection of a passive filter topology in practice should adhere to the impedance mismatch principle to suppress the power transmission of EMI noise. Impedance mismatch effectively reduces EMI transmission power and mitigates the conduction of electromagnetic interference. Figure 7 shows a low-order filter structure designed according to the impedance mismatch principle. In some cases, to increase the cutoff frequency and reduce the size of filter components, third-order or fourth-order filter topologies are required. Figure 8 shows a high-order filter structure that complies with the impedance mismatch principle. Here, Z_S denotes the source impedance of the noise, Z_L represents the load impedance, and the same notations apply in the subsequent text.

To comply with the impedance mismatch design principle, the values of the load impedance and noise source impedance must first be determined. The load impedance is the LISN impedance: 25 Ω for CM filters and 100 Ω for DM filters. In contrast, the determination of the noise source impedance is difficult. The noise source impedance, generated by the parasitic inductance and stray capacitance of internal components and interconnects, exhibits frequency-dependent magnitude and phase characteristics. Numerous scholars have conducted research on methods for determining the noise source impedance, which can be broadly categorized into the resonance method, the insertion loss method and the dual-probe method. The resonance method involves introducing different reactive components into the circuit and estimating the noise source impedance based on the inverse reactive component at the resonance frequency [5]. However, the process of selecting passive components and adjusting the resonance frequency is cumbersome. Moreover, at high frequencies, the method becomes ineffective as the inserted reactance is influenced by parasitic parameters and no longer exhibits ideal impedance characteristics. References [6,7] describe the insertion loss method for measuring noise source impedance. As shown in Figure 9, the insertion loss is calculated from the voltage change across the load before and after filter insertion. Since the insertion loss is uniquely determined by the source impedance, load impedance, and filter parameters, the magnitude of the noise source impedance can be derived when the load impedance and filter parameters are known. However, this method requires the inserted impedance to be either much larger or much smaller than the noise source impedance. Otherwise, its accuracy degrades. The dual-probe method, as the name implies, employs two probes to measure the noise impedance: one for signal injection and the other for signal reception. Combined with a signal generator and a spectrum analyzer, the frequency characteristics of the source impedance are obtained. References [8,9,10,11] detail the fundamental principles and improvement strategies of this method. The frequency range of conducted EMI spans 150 kHz to 30 MHz, while the resonance and insertion loss methods provide accurate results only up to a few megahertz. In contrast, the dual-probe method maintains high accuracy even at 30 MHz, making it more suitable for noise source impedance measurements.

Furthermore, a method for calculating the maximum and minimum magnitude of the noise source impedance based on the noise spectrum was proposed in [12], and an EMI filter was accordingly designed to ensure impedance mismatch under all conditions. However, this approach is prone to causing over-design issues.

3.3. Development Status of PEFs

PEFs, characterized by their simple design and low cost, demonstrate good performance at low frequencies and currently serve as the primary solution for addressing EMI issues. However, due to the influence of parasitic parameters, their high-frequency performance is somewhat disappointing, and they may even amplify EMI noise in some cases. Furthermore, since PEFs are connected in the main power loop and carry the load current, their inductors require large magnetic cores to avoid saturation, which contradicts the development trend of integration in power electronics. To address these limitations, researchers and engineers have made numerous attempts to improve PEF performance and achieved significant results, which will be elaborated in the following sections. Figure 10 shows the architecture detailed in Section 2.3.

To reduce the size of PEFs, some scholars have proposed the use of balancing techniques to modify circuit topologies. By applying symmetry principles or constructing Wheatstone bridge circuits, CM noise can be reduced, thereby alleviating the demands on PEFs and enabling a more compact design. Japanese scholar M. Shoyama early proposed the concept of a balanced impedance circuit, which splits the main circuit inductance into two parts and coordinates with the parasitic capacitance to ground at both ends of the switching devices, thereby reducing CM noise without affecting the main power loop [13]. In 2007, American scholar Shuo Wang further utilized the balancing principle by redistributing the inductance and capacitance within the main circuit while keeping their total values unchanged. He skillfully constructed a Wheatstone bridge, leveraging its balancing principle to achieve approximately 30 dB of CM noise reduction [14], thereby laying the foundation for subsequent research. Reference [15] bridged the midpoints of the input and output in a 3L-buck-boost converter, trapping the noise within the power converter and achieving 30 dB of CM noise suppression. Numerous other studies have explored the use of balancing techniques to improve circuit topologies [16,17,18,19,20,21,22,23,24], many of which achieve noise reduction by constructing Wheatstone bridge circuits. However, relying solely on circuit modifications often yields insufficient noise attenuation, necessitating the combination with PEFs to ensure that EMI levels are reduced below standard limits.

Affected by parasitic and coupling effects [25], the filtering performance of PEFs deteriorates significantly at high frequencies, falling far short of design expectations. Therefore, repeated adjustments are needed, which leads to time consumption and potential over-design. An effective solution to this issue is developing high-frequency models for the filters so that we can predict their actual high-frequency performance accurately and thereby reduce the cost of subsequent troubleshooting. The modeling work comprises two main aspects: high-frequency modeling of discrete components and analysis of internal coupling effects within the filter. Among the components, the CMC is a critical element of PEFs and significantly influences their high-frequency performance. References [26,27,28,29,30,31,32,33] analyze the structure of CMCs and establish high-frequency models using distributed equivalent, lumped parameter equivalent, and multi-stage circuit equivalent methods, respectively, for filters modeling and prediction. Analysis of internal coupling effects in filters typically requires field analysis tools, such as ANSYS HFSS and CST. References [34,35,36] conduct 3D electromagnetic simulations of filters, demonstrating that models considering coupling effects yield more accurate predictions.

In practical engineering, the design of PEFs involves not only considerations such as source impedance, parasitic parameters, and insertion loss but also factors like cost and spatial constraints, making it a complex multi-constrained problem. For the sake of design, some researchers have focused on automating PEFs design for practical engineering applications. Reference [37] takes into account the high-frequency characteristics of filter components and the noise source impedance to obtain the attenuation performance of the filter within 150 kHz–30 MHz. Simultaneously, it selects suitable magnetic cores and winding wires based on the magnetic flux density saturation and temperature rise parameters of the core, and integrates the design process into software, thus achieving automated PEFs design. Reference [38] considers not only the filtering performance of PEFs but also practical costs, employing a particle swarm optimization algorithm to provide both PEFs designs and component selections that meet users’ requirements. References [39,40,41] propose multi-objective optimization algorithms that integrate key design tasks—such as impedance measurement, high-frequency modeling, cost assessment, component selection, and spatial layout— into a unified framework, thereby enabling automated PEF design for engineering applications. However, based on current literature research findings, the design of PEFs remains incapable of achieving fully automated design without human intervention. From a developmental perspective, integrating artificial intelligence to realise this objective represents the inevitable path forward.

Beyond the main research directions discussed above—balancing techniques for noise reduction, high-frequency modeling of PEFs, and automated design—many other studies have explored the improvements of PEFs. For instance, Reference [42] combines spread-spectrum modulation with PEFs. This technique redistributes spectral energy, suppressing low-frequency EMI noise. As a result, the required cutoff frequency of the PEFs can be amplified, leading to a more compact filter and higher power density. Reference [43] adds an auxiliary winding with a damping resistor to the CM inductor in an electric drive system’s PEFs, effectively reducing the peak and RMS values of the motor leakage current and decreasing the volume of the CM inductor. Another study [44] constructs a CM current shunt path to confine a portion of the CM current within the loop, preventing its flow toward the motor and the DC side of the drive system, thus reducing the demand for CM inductance. However, the effectiveness of these optimization methods is limited in reducing the volume of PEFs. Against the backdrop of increasing integration and power density requirements, there is a pressing need for filters with superior performance and more compact size to suppress the increasingly severe EMI issues. Consequently, AEFs and IEFs, which offer distinct advantages in terms of volume, have become research hotspots in recent years and will be introduced in Section 4 and Section 5.

4. Principles and Current Development Status of AEFs

AEFs suppress system EMI by the sense-compensate principle. Specifically, active components process the sensed interference to generate a compensating signal. This signal is then injected into the circuit through feedforward or feedback paths to cancel EMI. In contrast to PEFs that block interference using passive components, AEFs achieve suppression through sensing circuits, compensation networks, and active components. Consequently, AEFs feature significantly smaller size and weight. AEFs can be categorized into analog AEFs and digital AEFs (DAEFs). Analog AEFs generate compensation signals primarily using analog components such as operational amplifiers, while DAEFs produce compensation signals through components including Analog-to-Digital Converters (ADC), Field Programmable Gate Arrays (FPGA)/Digital Signal Processors (DSP), and Digital-to-Analog Converters (DAC). The required operating frequency range for conducted EMI suppression is 150 kHz–30 MHz, which imposes stringent requirements on sampling chips. As a result, DAEFs incur higher costs and current research on AEFs primarily focuses on analog AEFs, with only a few scholars investigating DAEFs.

4.1. Introduction of Analog AEFs

4.1.1. Basic Topologies of AEFs

AEFs can be classified into current-sensing and voltage-sensing configurations based on the type of sensing signal. According to the compensation method, they fall into feedforward and feedback compensation types. Based on the form of the compensating signal, they are further divided into current-compensation and voltage-compensation categories. Since feedforward compensation provides direct and rapid counteraction to the interference voltage or current, the forms of the sensing and compensating signals must be the same. Consequently, there are theoretically six distinct topological structures for AEFs [45]. Figure 11 shows the topological structures of feedback AEFs, while Figure 12 presents those of feedforward AEFs. In the figures, A(s) represents the gain of the active amplification circuit, V_S(s) denotes the noise source signal, V_c(s) indicates the compensating voltage, and I_c(s) signifies the compensating current.

Different topological structures correspond to different IL expressions and are suited for different source and load impedances, as detailed in [45]. A simplified analytical calculation is presented here to illustrate the selection methodology for AEFs topologies. The analysis begins with Figure 11a. The compensating current expression is given by:

$$V_{\mathrm{c}}\left(s\right)=A\left(s\right)i_{\mathrm{L}}\left(s\right)$$

(6)

It can be derived by applying Kirchhoff’s voltage and current laws:

$$IL\left(s\right)=20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{A\left(s\right)}{Z_{\mathrm{L}}+Z_{\mathrm{S}}}}\right)$$

(7)

Therefore, this filter achieves high IL only when A(s) >> Z_L + Z_S, making it suitable for scenarios with low total impedance in the conduction path. Similarly, analysis of Figure 11b shows that maximum IL is achieved only when A(s) >> Y_L + Y_S, making it suitable for cases with low admittance. The IL of these two AEFs topologies is significantly influenced by the source and load impedance.

The compensating voltage expression in Figure 11c is:

$$V_{\mathrm{c}}\left(s\right)=A\left(s\right)v_{\mathrm{L}}\left(s\right)$$

(8)

By applying KVL and KCL to the circuit topology, the IL expression for this AEF can be derived as:

$$IL\left(s\right)=20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{Z_{\mathrm{L}}}{Z_{\mathrm{L}}+Z_{\mathrm{S}}}}A\left(s\right)\right)$$

(9)

When the load impedance Z_L is much greater than the source impedance Z_S, the IL can be approximated as:

$$IL\left(s\right)=20\mathrm{l}\mathrm{g}\left(1+A\left(s\right)\right)$$

(10)

Under this condition, the IL becomes independent of the specific values of the source and load impedance and is determined solely by the gain A(s). This characteristic facilitates the achievement of high IL with a simple design. Therefore, the feedback VSVC AEFs are suitable for applications where the source impedance is very small. Similarly, it can be concluded that the feedback CSCC AEFs in Figure 11d are suitable for cases with very large source impedance. The design of these two types of AEFs does not rely on specific impedance values, making them more attractive than the topologies of Figure 11a,b in practical engineering applications.

The analytical approach for feedforward compensation is identical to that for feedback compensation, and its result can be approximated as:

$$IL\left(s\right)=20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{1}{1-A\left(s\right)}}\right)$$

(11)

For Figure 12a, Equation (11) provides a valid approximation only when Z_S << Z_L. Therefore, feedforward VSVC AEFs are suitable for circuits with low source impedance. For Figure 12b, the approximation holds only when Z_S >> Z_L, making feedforward CSCC AEFs suitable for high source impedance applications. The IL expressions and applicable circuit conditions for these six topological structures are presented in

Table 1. IL Expressions for Different Topologies and Conditions for Achieving Maximum IL.

Control Method	IL(s)	Approximate IL(s)	Condition for Maximum IL
Feedback CSVC	$20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{A\left(s\right)}{Z_{\mathrm{L}}+Z_{\mathrm{S}}}}\right)$	$20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{A\left(s\right)}{Z_{\mathrm{L}}+Z_{\mathrm{S}}}}\right)$	$A\left(s\right)\gg Z_{\mathrm{L}}+Z_{\mathrm{S}}$
Feedback VSCC	$20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{A\left(s\right)}{Y_{\mathrm{L}}+Y_{\mathrm{S}}}}\right)$	$20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{A\left(s\right)}{Y_{\mathrm{L}}+Y_{\mathrm{S}}}}\right)$	$A\left(s\right)\gg Y_{\mathrm{L}}+Y_{\mathrm{S}}$
Feedback VSVC	$20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{Z_{\mathrm{L}}}{Z_{\mathrm{L}}+Z_{\mathrm{S}}}}A\left(s\right)\right)$	$20\mathrm{l}\mathrm{g}\left(1+A\left(s\right)\right)$	$Z_{\mathrm{L}}\gg Z_{\mathrm{S}}$
Feedback CSCC	$20\mathrm{l}\mathrm{g}\left(1+{\displaystyle \frac{Z_{\mathrm{S}}}{Z_{\mathrm{L}}+Z_{\mathrm{S}}}}A\left(s\right)\right)$	$20\mathrm{l}\mathrm{g}\left(1+A\left(s\right)\right)$	$Z_{\mathrm{S}}\gg Z_{\mathrm{L}}$
Feedforward VSVC	$20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{1}{1-A\left(s\right)}}\right)·\left(1-{\displaystyle \frac{Z_{\mathrm{S}}A\left(s\right)}{Z_{\mathrm{S}}+Z_{\mathrm{L}}}}\right)$	$20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{1}{1-A\left(s\right)}}\right)$	$Z_{\mathrm{L}}\gg Z_{\mathrm{S}}$
Feedforward CSCC	$20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{1}{1-A\left(s\right)}}\right)·\left(1-{\displaystyle \frac{Z_{\mathrm{L}}A\left(s\right)}{Z_{\mathrm{S}}+Z_{\mathrm{L}}}}\right)$	$20\mathrm{l}\mathrm{g}\left({\displaystyle \frac{1}{1-A\left(s\right)}}\right)$	$Z_{\mathrm{S}}\gg Z_{\mathrm{L}}$

.

Although feedforward control achieves stable operation easily, Equation (11) indicates that it requires unity gain across the 150 kHz to 30 MHz frequency. However, due to parasitic effects in circuit components, maintaining a consistent unity gain across such a broad frequency spectrum is challenging. In contrast, feedback control only needs to maintain high gain within the frequency range of conducted interference, making it easier to implement. Although feedback control often faces stability issues, these can be mitigated by adding compensation networks [46]. Consequently, most AEF designs focus on feedback control, while some scholars have explored hybrid methods combining feedforward and feedback control to suppress EMI [47,48,49].

4.1.2. Research Status of Analog AEFs

An AEF comprises three main parts: a noise sensing section, an amplification section, and a noise compensation section. There are two methods for extracting noise components: using a coupling coil to detect noise currents within the circuit, and employing a capacitor to detect noise voltages within the circuit. The extracted noise signal is amplified to generate the compensation signal. This compensation signal can be injected into the circuit in two ways: by using a coupling coil to inject a compensating voltage, or by employing a capacitor to inject the compensating current. The amplification section of an AEF is commonly implemented using a push-pull amplifier circuit, an operational amplifier (op-amp) circuit, or a combination of both.

In existing research, push-pull amplifier circuits find their predominant application in motor drive systems for active EMI suppression. For instance, in 1998, scholars S. Ogasawara et al. designed a feedforward compensation AEF based on a push–pull amplifier circuit, as shown in Figure 13a. This circuit utilizes the emitter-follower function of the push–pull amplifier to achieve voltage-sensing and voltage-compensation, with a gain close to unity [50], laying the foundation for the subsequent design of push-pull AEFs.

Following this work, Reference [51] utilized a coupling transformer for current sensing and a capacitor for current compensation, thereby developing a feedforward CSCC AEF. However, in Figure 13a, the transistors must handle the DC bus voltage. Sourcing suitable high-voltage transistors proves difficult when this voltage is too high. To overcome the drawbacks, Reference [52] introduced an improved AEF based on low-voltage transistors, as shown in Figure 13b. Instead of directly injecting the sensed interference voltage into the emitter follower, this design uses capacitor C₂ to create a voltage divider before injection. The interference signal is then restored by setting the turns ratio of the coupling transformer and compensated into the circuit. This significantly reduced the voltage rating required for the transistors, thereby reducing the cost of the filter. Furthermore, Reference [53] proposed a simple transformerless feedback VSCC AEF structure capable of achieving effective EMI suppression at a lower cost. Complementing this work, Reference [54] provided a comprehensive analysis of such compact, transformerless AEFs and derived quantitative design guidelines. These studies have reduced filter costs through incremental innovations, yet all employ push-pull amplifiers, with the core amplification circuitry remaining virtually identical.

Compared with push-pull amplifier circuits, op-amp circuits offer more design flexibility and can be used to implement various topologies. For example, Reference [55] utilized a single op-amp to realize feedback CSCC. Reference [56] employed an op-amp circuit to achieve feedback CSVC. Reference [57] designed both feedback CSCC and CSVC AEFs using op-amp circuits and analyzed their suitability for suppressing different types of noise. Reference [58] implemented feedback CSCC using a multi-stage op-amp circuit, which increased the gain-bandwidth of the AEF compared to a single-stage design. Reference [59] designed a single-stage op-amp circuit to realize feedback VSVC. Reference [60] realized feedback VSCC using two symmetrical op-amp circuits. While the above-mentioned op-amp circuits all adopt an inverting amplifier configuration, Reference [61] employed an integrator-based op-amp circuit to design a transformerless AEF based on virtual impedance enhancement. The corresponding topologies are shown in Figure 14. It follows that the design methodology for op-amp circuits is more flexible, offering greater scope for innovation.

Push–pull amplifier circuits offer lower cost and less design flexibility compared to op-amp circuits. A considerable number of studies have combined these two circuit types to form the amplification section of AEFs [62,63,64]. Regardless of the amplifier type used, the gain-bandwidth product is inherently limited. Consequently, analog AEFs provide limited suppression for high-frequency system EMI and cannot fully replace PEFs in practical applications. They typically need to be used in conjunction with PEFs [65,66,67,68]. Since AEFs can effectively reduce the amplitude of low-frequency interference, thereby increasing the cutoff frequency of the PEFs, the hybrid AEFs can significantly reduce the overall filter volume compared to using PEFs alone.

Research on analog AEFs has been burgeoning in recent years. Reference [69] proposed a compact AEF topology based on a neutral point, significantly reducing the overall filter size. Reference [70] investigated eight cascaded structures for DM AEFs and identified two configurations whose IL far exceeds that of the others. Since the Y-capacitance value in PEFs is often limited because of security, the CM inductance is typically constrained to a relatively large value, leading to excessive PEF volume. To address this, Reference [71] introduced an AEF based on virtual capacitance enhancement, which increases the equivalent capacitance of the CM filter capacitor, thereby reducing the filter volume. Reference [72] proposed a phasor analysis-based design method for AEFs. By adjusting key parameters to modify the phase difference, the noise suppression capability was improved by approximately 10 dB, compensating for the drawback that IL-based design methods ignore phase considerations. In summary, research on analog AEFs focuses on reducing filter volume and enhancing EMI suppression capability.

4.2. Introduction of DAEFs

Analog AEFs can only effectively suppress low-frequency EMI and cannot operate independently without PEFs, thereby often facing limitations in both size and filtering performance. In contrast, DAEFs demonstrate excellent performance across the entire 150 kHz–30 MHz. Their independence from PEFs enables a more compact filter design, making them a viable solution to EMI challenges. In 2012, Canadiansohuresearcher D. Hamza first proposed that DAEFs could replace analog AEFs to suppress conducted EMI in grid-connected photovoltaic inverters and experimentally validated this approach [73]. In 2013, D. Hamza extended the application of DAEFs to electric vehicle DC-DC converters, demonstrating their advantages over traditional filters [74]. Contemporary studies, including References [75,76], also confirmed the superior compactness of DAEFs. In 2018, considering the time delay issue in DAEFs, Reference [77] established an accurate DAEF model and proposed a scientific decoupling circuit. In 2024, Reference [78] introduced an adaptive DAEF based on the LMS algorithm, enhancing the filter’s adaptability to changing operating conditions. All these studies have refined the design of DAEFs. Despite their potential, the high cost of DAEFs has limited their widespread practical application. If these technical cost barriers can be overcome, DAEFs hold promising prospects for future development.

5. Integrated Electromagnetic EMI Filters

The concept of magnetic integration—combining multiple magnetic components into a single structure—has existed for decades. In the early 21st century, this technology made breakthrough progress with the rise of electromagnetic integration techniques. Consequently, it has been applied across various power electronics fields to enhance the power density of converters. In 2003, Reference [79] applied planar electromagnetic integration technology to the design of PEFs, integrating the inductors and capacitors of the DM and CM Filters, respectively, which significantly reduced the filter volume and provided a new approach for EMI suppression. However, planar electromagnetic integration structures require expanding the PCB area to accommodate additional winding turns, which not only increases copper loss but also weakens the magnetic coupling between coils and raises leakage inductance. In 2009, Wu Xiaofeng, a researcher from Zhejiang University, proposed a novel electromagnetic integration method based on flexible multilayer foils (FMLFs). Compared to planar integration, this method offers significant advantages in terms of winding length, integrated module area, and leakage flux [80]. Under the trends of high-frequency operation and increasing integration, electromagnetic IEFs that balance both size and filtering performance demonstrate considerable development potential. These two types of electromagnetic IEFs will be introduced separately in the following discussion.

5.1. Planar Electromagnetic IEFs

The structure of a planar electromagnetic integration is shown in Figure 15. It can employ an E-shaped core with an embedded winding structure comprising three layers: a top conductor layer, a bottom conductor layer, and a dielectric layer sandwiched between them. The top conductor layer (from A to C), together with the core, forms one inductive element, while the bottom conductor layer (from B to D) forms another. The top and bottom conductor layers, separated by the dielectric layer, collectively create a capacitive element. This configuration achieves the integration of inductive and capacitive components, effectively combining magnetic and electric energy storage elements. There is also an equivalent schematic of the planar winding structure included in Figure 15. By configuring the four ports differently, various functions can be realized, such as a parallel resonator, a series resonator, or a low-pass filter. In the context of integrated EMI filter design, the low-pass filter configuration is typically employed. The figure depicts only a single-layer planar winding structure. When integration of multiple inductors and capacitors is required, this can be accomplished by stacking multiple planar winding layers between planar E-cores.

When an E-core made of ferrite material is selected, the equivalent inductance can be expressed as:

$$L_{\mathrm{C}\mathrm{M}}={\mu }_0·{\mu }_{\mathrm{e}}·n^2·A_{\mathrm{e}}·l_{\mathrm{e}}$$

(12)

where μ_e is the relative permeability of the core, n is the total number of turns, A_e represents the effective cross-sectional area of the core, and l_e is the effective magnetic path length. The equivalent inductance can be expressed as:

$$C_{\mathrm{C}\mathrm{M}}={\epsilon }_0·{\epsilon }_{\mathrm{r}}·m·l_{\mathrm{m}\mathrm{e}\mathrm{a}\mathrm{n}}·w/d$$

(13)

where ε_r is the relative permittivity of the dielectric, m is the number of turns in the LC hybrid winding, l_mean is the average length per turn, w is the conductor width, and d is the dielectric thickness. The designed integrated EMI filter structure is shown in Figure 16, with each dashed circle representing one planar winding layer.

After this concept was introduced, Reference [81] proposed an optimization method that enhances the high-frequency IL by reducing the equivalent series inductance (ESL) and equivalent parallel capacitance (EPC) of the integrated components. Reference [82] adopted a distributed conductive structure to model integrated passive devices, providing valuable reference for filter design. However, rectangular planes typically face issues of uneven current distribution and low mechanical strength. Reference [83] addressed this issue by modifying the planar LC integrated structure from a rectangular to a circular configuration. On this basis, Reference [84] designed and implemented a toroidal planar EMI filter based on multilayer ceramics, featuring two ground layers that allow separate design of inductors and capacitors. The invention of the ring-shaped electromagnetic integrated structure further optimizes and refines the technology of planar electromagnetic IEFs. However, existing planar electromagnetic integration technology can only increase the number of winding coils by enlarging the PCB area. This not only leads to greater copper losses and leakage inductance but may also cause spatial layout incompatibility issues.

5.2. FMLFs Electromagnetic IEFs

FMLFs-based electromagnetic integration evolved from planar electromagnetic integration. As shown in Figure 15, planar electromagnetic integration forms inductors by winding conductors around the core in a planar pattern. Reference [85] creatively used flexible windings wrapped three-dimensionally around the magnetic core, as illustrated in Figure 17. Experimental results confirmed its excellent performance in attenuation, temperature characteristics, and efficiency, establishing a novel implementation approach for electromagnetic integration.

Reference [80] analyzed the limitations of the integration method in [85] and proposed a novel interleaved flexible multilayer foil winding structure, as shown in Figure 18. This structure significantly increases capacitance, facilitates the integration of L_CM and C_DM, and promotes the practical application of FMLFs in EMI suppression.

In 2011, Reference [86] proposed an analytical model for designing integrated filters using FMLFs—the Distributed Electromagnetic Component (DEMC) model—and experimentally validated it. Based on this model, methods to enhance the high-frequency performance of the integrated EMI filter were investigated. The FMLFs integrated filter was applied to suppress EMI in a 1-kW switching power supply, with experimental results showing a 45% reduction in volume compared to conventional discrete PEFs. This work laid the foundation for subsequent designs of FMLFs-based electromagnetic integrated filters. In 2014, Deng Cheng et al. integrated the EMI filter with the boost inductor in a PFC converter, forming an E-E-E core structure with three FMLF windings [87,88]. Reference [89] applied the FMLFs electromagnetic integrated filter to EMI filtering in a 3-kW single-phase inverter, achieving a 30% volume reduction compared to discrete PEFs under identical filtering performance. Notably, many prior integrated filters required additional DM filtering components to ensure adequate DM noise suppression. In 2022, Jiang Shiqi, a scholar in Harbin Insititute of Technology, utilized a UU-core with rationally configured windings to integrate all capacitive and inductive elements of both the CM and DM filters into a single core unit, thus achieving full integration of the EMI filter. The superior performance of this design was experimentally verified on a prototype [90]. Reference [91] further optimized this approach by replacing the UU-core with an EE-core. Compared to the former, the EMI choke with the EE-core not only reduces the filter’s weight and volume but also improves noise suppression performance.

In practice, the turn spacing in planar PCB windings is significantly larger than in FML foils. As the number of turns increases, the total length of planar PCB windings becomes much greater than that of FML foils. Longer windings lead to increased copper usage, higher power losses, and potential inter-winding coupling. While magnetic core selection for planar electromagnetic integration is limited to planar E-cores and ER-cores, FMLFs electromagnetic integration offers more options. Moreover, the eddy current loss in FMLFs is lower than in planar electromagnetic integration, making FMLFs more suitable for high-frequency applications. More importantly, FMLFs electromagnetic integration is considerably less expensive than its planar counterpart [92]. In summary, FMLFs electromagnetic integrated filters exhibit broader development prospects. At the same time, they also face challenges such as limitations in permittivity and thermal distribution analysis.

6. Comparative Analysis of Different Types of EMI Filters

The preceding section reviewed the principles and current development status of PEFs, AEFs, and electromagnetic IEFs. Figure 19 illustrates the technological evolution of EMI filters.

Table 2. Performance Comparison Table for Different Types of Filters.

EMI Filter Types	Cost	Volume	Filter Reliability	Complexity
PEFs	Low	Large	High	Low
AEFs	Mid	Mid	Low	Mid
Electromagnetic IEFs	High	Compact	High	High

The ratings in the table are based on filters of the same power rating.

clearly demonstrates their differing performance characteristics.

Each of them has their own distinct advantages, disadvantages, and applicable scenarios, which will be compared and analyzed in detail below.

(1)

From the cost perspective, PEFs are mature and simple in design, resulting in low research and development (R&D) expenses. The passive components that constitute PEFs, such as capacitors and inductors, are also relatively inexpensive, making PEFs the most cost-effective solution. Designing analog AEFs requires consideration of factors such as stability, making the process more challenging. Additionally, the active components used are more expensive than passive components, resulting in higher costs for AEFs compared to standard PEFs. The cost of designing DAEFs is higher. Electromagnetic IEFs are still in the R&D phase, with costs primarily stemming from R&D as well as integration processes. Lower-cost production may be achievable in the future.

(2)

In terms of volume and weight, PEFs emerged earliest and exhibit the largest dimensions and heaviest weight. To address miniaturization in power electronics, researchers began exploring AEFs in the 1980s, which generally feature smaller volumes than PEFs. Electromagnetic IEFs have only been studied in the past two decades, achieving even smaller volumes than analog AEFs. Particularly, FMLFs electromagnetic IEFs enable significant reduction in filter size.

(3)

Regarding filtering performance and reliability, PEFs provide stable performance but are inherently inflexible due to fixed parameters, leading to over-design. AEFs offer superior adaptability through active compensation but face stability risks. Electromagnetic IEFs, as passive devices, maintain the inherent stability of PEFs.

Overall, PEFs offer the advantages of stable filtering, lower cost, and simple design, making them the most suitable choice for applications where power density is not a critical requirement. In recent years, however, the ongoing pursuit of higher frequencies and increased integration in power electronics has intensified EMI challenges while simultaneously constraining the available space for filters. PEFs often struggle to meet these competing demands. Consequently, in scenarios demanding high power density, AEFs and electromagnetic IEFs demonstrate significant advantages. However, the essence of analog AEFs lies in reducing EMI at low frequencies through active components, thereby decreasing the size of discrete passive components. Their role in size reduction is limited. In contrast, electromagnetic IEFs completely eliminate the need for discrete passive components, enabling significant reduction in filter size and demonstrating tremendous development potential.

7. Conclusions and Future Prospects

7.1. Conclusions

This review comprehensively overviews the principles and current development status of PEFs, AEFs, and electromagnetic IEFs, while conducting a comparative analysis of these three types of EMI filters. Our analysis leads to the following conclusions: the physical size of PEFs has become their fundamental limitation for applications requiring high power density. While AEFs can partially reduce overall volume by supplementing PEFs, they inherently rely on discrete passive components, thus offering limited potential for significant size reduction. In contrast, electromagnetic IEFs break away from the conventional paradigm of discrete components, promising substantial volume reduction while maintaining acceptable costs, thereby presenting a comprehensive advantage. Given the accelerating trends toward higher frequencies and greater integration in power electronics, future development of EMI filters is expected to focus predominantly on electromagnetic integrated approaches.

The contributions of this work are twofold. First, it clarifies the developmental trajectories of the three filter technologies and, through comparative analysis, reveals a convergent trend from discrete to integrated approaches. Second, it presents the first quantified development roadmap centered on electromagnetic integration technology, providing an important reference for future research directions in EMI filters.

7.2. Future Prospects

However, existing electromagnetic IEFs are still far from meeting the standards required for practical engineering applications. Numerous issues remain to be addressed. Firstly, the heat dissipation capacity of the FMLFs-based electromagnetic IEFs must be enhanced to prepare for its application in high-power converters. Secondly, there remains significant potential for reducing the size of current FMLFs-based electromagnetic IEFs. Existing research has achieved a maximum reduction of 45% compared to discrete passive components, while theoretically even smaller filter sizes are achievable. Last but not least, refine the thermal analysis methodology for electromagnetic integrated filters. The reasonable quantified technology roadmap is shown in Figure 20.

Researchers should focus on overcoming bottlenecks in design methodologies. The primary task is to establish a multi-physics coupling model integrating electromagnetic, thermal, and stress phenomena, enabling the co-design of performance and reliability. For manufacturers, the immediate priority is to establish a manufacturing process system geared toward high-density integration, with a focus on addressing the collaborative manufacturing challenges of electromagnetic compatibility and thermal management.