A Flyback Converter with a Simple Passive Circuit for Improving Power Efficiency

Abstract

This paper proposes an effective method to improve the power efficiency of the flyback converter in the continuous conduction mode (CCM). The proposed converter uses a simple passive circuit to reduce the switching power losses. The current through the output diode can be shifted to a new branch where one diode, one inductor, and one auxiliary winding of the transformer are included. The output diode current can be reduced to zero for the zero-current switching of the output diode. The additional inductor is used to control the changing rate of the additional diode current to reduce the reverse-recovery current. Keeping the simplicity of the passive method, the proposed converter improves the power efficiency compared to the conventional converter. The circuit configuration and the operation principle are described. The design considerations are presented, including the simulation verification. The experimental results for a 45 W prototype are discussed to evaluate the performance of the proposed converter. The proposed converter has achieved a power efficiency of 93.5% for the rated load condition, improving the power efficiency. The applications of the proposed converter are also discussed for the future research directions.

1. Introduction

The flyback converter has been widely used for low-cost power supplies due to its simple circuit structure [1,2,3,4]. It has been utilized for various applications such as photovoltaics [1], portable devices [2], solid-state lighting [3], and motor drive systems [4]. Figure 1 shows the circuit diagram of the conventional flyback converter. To increase the power density, the flyback converter should operate with a high switching frequency. However, it suffers from the switching power losses as the switching frequency increases. In general, the switching power losses of the flyback converter are caused by the power switch S_p and the output diode D_o. The energy stored in the transformer leakage inductor L_lk mainly causes the power losses. The reverse-recovery current of the output diode additionally increases the power losses, which deteriorates the power efficiency of the flyback converter.

To reduce the switching power losses, various switching techniques have been proposed for the flyback converter [5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20]. The power efficiency can be improved by making the flyback converter operate in the boundary conduction mode (BCM) [6,7,8,9,10]. The flyback converter in the BCM operates at the boundary of the continuous conduction mode (CCM) and the discontinuous conduction mode (DCM) [6]. The valley switching is accomplished by varying the switching frequency of the flyback converter in the BCM [7]. It enables the output diode to be turned off at zero current in the flyback converter. The output diode operates by minimizing the turn-off switching loss [8]. However, the valley switching technique requires a wide range of switching frequencies to regulate the output voltage [9]. As the switching frequency changes according to the output load conditions, the closed-loop control is not easy to design [10]. As the switching frequency decreases, the current stresses on the switching devices increase with high conduction losses.

An alternative method is applying the snubber circuits to the flyback converter in the CCM [11]. The active snubber circuits have been applied to the flyback converter [12,13,14,15,16,17]. The active-clamp circuits have been presented for the soft-switching operation in the flyback converter [12,13,14]. The zero-voltage switching can be achieved by clamping the switch voltage stresses with the help of the auxiliary power switch. The active resonant switching circuits have been proposed for the flyback converter [15,16,17]. The LC resonant circuits have been designed with the additional power switch for the zero-voltage switching operation and the zero-current switching operation [15,16]. By using the auxiliary power switch for the synchronous rectifier [17], the flyback converter can achieve the zero-voltage switching operation at the primary side. As the active snubber circuits commonly require the additional power switch for the soft-switching operation, not only the additional power switch but also its associated gate driving circuit increases the manufacturing cost, which limits their practical uses.

Passive snubber circuits have been proposed for the flyback converter without using any auxiliary power switch [18,19,20]. Lossless passive snubber circuits have been proposed using the coupled inductor [18,19]. The coupled inductor discharges the energy stored in the snubber capacitor for the soft-switching operation. The energy recovery has been accomplished by applying regenerative passive snubber circuits to the flyback converter [20]. Although these passive snubber methods do not need the auxiliary power switch, they use the LC resonance on the switching devices for the soft-switching operation. The voltage and current stresses on the switching devices are increased because of the resonant behavior of the passive snubber circuits. As a result, higher-rated devices are required for the switching devices, which dictates the use of more expensive circuit components.

This paper proposes an effective method to improve the power efficiency of the flyback converter in the CCM. The proposed flyback converter includes a simple passive circuit to reduce the switching power losses. Figure 2 shows the circuit diagram of the proposed flyback converter. The additional circuit includes one diode, one inductor, and one auxiliary winding of the transformer. The output diode current can be shifted to the new branch in the additional circuit. The output diode can be turned off at zero current, which eliminates the turn-off switching loss of the diode. The additional inductor is used to control the changing rate of the additional diode current to reduce the reverse-recovery current. Instead of using the soft-switching operations using the LC resonance, the proposed method utilizes the current shifting operation of the diode currents. It is advantageous for mitigating the saturation of the magnetic core to extend its operation range [21]. It is also beneficial for thermal management and the reduction of electromagnetic interference [22]. Keeping the advantageous simplicity of the passive method, the proposed converter reduces the switching power losses, improving the power efficiency.

The circuit configuration and the operation principle of the proposed converter are described in Section 2. The design considerations for the circuit components are presented along with the simulation verification in Section 3. The experimental results are given to evaluate the performance of the proposed converter in Section 4. The future research directions for the applications of the proposed converter are discussed in Section 5. Finally, Section 6 presents the concluding remark of the paper. With the motivation to improve the power efficiency of the flyback converter, the main contributions of this paper are to suggest an effective scheme to reduce the switching power losses by using a simple passive circuit, to present its operation principle, to evaluate experimentally its performance, and to discuss its applications. Considering the application of the flyback converter, the single-stage power factor correction [23,24,25,26] is one of the attractive applications. By integrating two power conversion stages into one, the single-stage flyback converters reduce the component count and correct the power factor [23]. A single-stage, single-switch converter method has been proposed by integrating the boost converter switching cell with the conventional flyback converter in [24]. On the other hand, asymmetrical pulse-width modulation (APWM) has been applied to the flyback converter for the single-stage power factor correction in [25]. The soft-switching operation, such as the zero-voltage switching, is achieved by an additional power switch on the primary side. A boost inductor is included for the DCM boost rectifier operation. However, the use of the additional active switch increases the manufacturing cost, losing the benefits of the flyback converter. In [26], a new method using a dual-purpose inverter has been proposed for the single-stage converter applications of the flyback converter. A low-power dual-purpose inverter has been included for the active harmonic compensation and for the output voltage regulation, respectively. However, the converter in [26] not only uses the BCM operation but also requires the additional power stage for implementing the dual-purpose inverter. In Section 5, the features of the proposed converter are compared to the features of the previous converters in [25,26] for the single-phase power factor corrections. Considering the advantages of the simple circuit structure and the improved power efficiency, the proposed converter is expected to be a cost-effective single-stage, single-switch converter.

2. Proposed Converter

2.1. Circuit Configuration

The proposed converter has two parts, as shown in Figure 2. The first part is the flyback converter, which consists of S_p, T, D_o, and C_o. The switch S_p operates with a constant switching frequency f_s. It has an intrinsic body diode in parallel. The transformer T is modeled as an ideal transformer with the magnetizing inductor L_m and the leakage inductor L_lk on the primary side. L_m is large enough so that the flyback converter operates in the CCM. T has the turns ratio of n₁:n₂:n₃. n₁ is the number of the primary winding turns connected to S_p. n₂ is the number of the secondary winding turns connected to the output diode D_o. The output capacitor C_o is large enough so that the output voltage V_o is constant with respect to the input voltage V_d. The second part is the additional circuit, which consists of D_a, L_a, and n₃. n₃ is the number of the auxiliary winding turns connected to L_a directly. The additional inductor L_a helps reduce the reverse-recovery current of the additional diode D_a.

2.2. Operation Principle

Figure 3 shows the operation modes of the proposed converter. Figure 4 shows the operation waveforms of the proposed converter. D is the duty ratio of the switch S_p. The proposed converter has five operation modes during one switching period T_s (=1/f_s) as follows:

Mode I: At t = t_o, the switch S_p has been turned on. As the input voltage V_d has been applied to L_m and L_lk, the magnetizing current i_Lm increases linearly at the rate of

$${\displaystyle \frac{d{i}_{Lm}}{dt}}={\displaystyle \frac{V_d}{{L_m+L}_{lk}}} .$$

(1)

The diodes D_o and D_a have been turned off on the secondary side.

Mode II: At t = t₁, the switch S_p is turned off. The energy stored in L_m is transferred to the secondary side, causing the current to flow through the diodes D_o and D_a. As the output diode D_o is turned on, the voltage across the winding n₂ is V_o. As n₃V_o/n₂ is applied to the winding n₃, the additional diode current i_Da increases linearly at the rate of

$${\displaystyle \frac{d{i}_{Da}}{dt}}={\displaystyle \frac{V_o}{L_a}}\left({\displaystyle \frac{n_3}{n_2}}\right).$$

(2)

As −n₁V_o/n₂ is applied to L_m, the magnetizing current i_Lm decreases linearly. By reflecting the magnetizing current i_Lm to the secondary side, the decreasing rate of the output diode current i_Do can be represented as

$${\displaystyle \frac{d{i}_{Do}}{dt}}=-{\displaystyle \frac{V_o}{L_m}}{\left({\displaystyle \frac{n_1}{n_2}}\right)}^2-{\displaystyle \frac{V_o}{L_a}}\left({\displaystyle \frac{n_3}{n_2}}\right).$$

(3)

Due to the simultaneous turn-on of the diodes D_o and D_a, the output diode current i_Do is shifted to the additional circuit branch. The output diode current i_Do becomes zero at the end of Mode II. The time duration in Mode II can be represented as

$$∆t_{12}=t_2-t_1={\displaystyle \frac{i_{Do,peak}}{V_o\left\{\frac{1}{L_m}{\left(\frac{n_1}{n_2}\right)}^2+\frac{1}{L_a}\left(\frac{n_3}{n_2}\right)\right\}}}$$

(4)

where i_Do,peak is the peak current of the output diode D_o. This mode ends when the output diode current i_Do becomes zero. At the beginning of this mode, the energy stored in L_lk should be released as the switch S_p is turned off. Along with the stray capacitances for the switch and the transformer, the leakage inductor causes a parasitic oscillation. This parasitic oscillation exists for some time at the beginning of this mode.

Mode III: At t = t₂, the output diode D_o is turned off at zero current. The zero-current switching of the output diode D_o is achieved, which eliminates the turn-off switching loss. As the additional diode D_a is still in the conduction state, the current flows through n₂, n₃, L_a, D_o, and C_o. By reflecting the magnetizing inductance L_m to the secondary side, the decreasing rate of the additional diode current i_Da can be represented as

$${\displaystyle \frac{d{i}_{Da}}{dt}}=-{\displaystyle \frac{V_o}{{{L_m\left(\frac{n_2 {+n}_3}{n_1}\right)}^2+L}_a}}.$$

(5)

As the output voltage V_o is applied to n₂, n₃, and L_a, the voltage V_n2 across n₂ can be represented as

$$\begin{array}{cc}{V}_{n2}& ={\displaystyle \frac{{L_m{V}_o\left(\frac{n_2}{n_1}\right)}^2}{{L_m\left(\frac{n_2}{n_1}\right)}^2+{L_m\left(\frac{n_3}{n_1}\right)}^2+L_a}}\\ & ={\displaystyle \frac{V_o}{1+{\left(\frac{n_3}{n_2}\right)}^2+{\frac{L_a}{L_m}\left(\frac{n_1}{n_2}\right)}^2}} \end{array} .$$

(6)

The voltage across L_m becomes −n₁V_n2/n₂. As V_n2 is lower than V_o, the voltage V_Sp across the switch S_p can be reduced.

Mode IV: At t = t₃, a turn-on gate signal V_Gs is applied to the gate of the switch S_p. As the input voltage V_d is applied to L_m and L_lk, the following voltage equation can be obtained at the secondary side as

$$\left({\displaystyle \frac{n_2+n_3}{n_1}}\right)\left({\displaystyle \frac{L_m}{L_m+L_{lk}}}\right)V_d+L_a{\displaystyle \frac{d{i}_{Da}}{dt}}+V_o=0.$$

(7)

From (7), the decreasing rate of the additional diode current i_Da is represented as

$${\displaystyle \frac{d{i}_{Da}}{dt}}=-{\displaystyle \frac{V_o+\left(\frac{n_2+n_3}{n_1}\right)\left(\frac{L_m}{L_m+L_{lk}}\right)V_d}{L_a}}.$$

(8)

The decreasing rate of the additional diode current i_Da is controlled by the additional inductor L_a, which can alleviate the reverse-recovery process of the additional diode D_a.

Mode V: At t = t₄, the additional diode current i_Da becomes zero. However, the additional diode D_a is not immediately turned off because the reverse-recovery process makes the diode conduct reversely to discharge its reverse-recovery charge. As the switch S_p is been turned on, the reverse-recovery current of the additional diode D_a is reflected to the primary side through the transformer T. As the diode reverse-recovery current is reduced, the turn-on switching loss for the switch S_p can be reduced as well. At the end of Mode V, the stored charge is recovered from the junction of the additional diode D_a.

3. Design Considerations

3.1. Voltage Gain and Magnetizing Inductance

By the volt-second balance for the transformer T, the following relation can be written as

$$\begin{array}{c}\left({\displaystyle \frac{L_m}{L_m+L_{lk}}}\right)V_d{DT}_s=V_o\left({\displaystyle \frac{n_1}{n_2}}\right)∆t_{12} \\ +\left\{{\displaystyle \frac{V_o}{1+{\left(\frac{n_3}{n_2}\right)}^2+{\frac{L_a}{L_m}\left(\frac{n_1}{n_2}\right)}^2}}\right\}\left({\displaystyle \frac{n_1}{n_2}}\right)\left\{\left(1-D\right)T_s-∆t_{12}\right\}\end{array} .$$

(9)

By rearranging (9), the following voltage relation can be obtained for the voltage gain of the proposed converter as

$${\displaystyle \frac{V_o}{V_d}}=\left({\displaystyle \frac{n_2}{n_1}}\right)\left({\displaystyle \frac{{DT}_s}{1+\frac{L_{lk}}{L_m}}}\right)\left\{{\displaystyle \frac{1}{\left(1-D\right)T_s+\left(\frac{1}{\alpha }-1\right)∆t_{12}}}\right\}\left({\displaystyle \frac{1}{\alpha }}\right)$$

(10)

where

$$\alpha ={\displaystyle \frac{1}{1+{\left(\frac{n_3}{n_2}\right)}^2+{\frac{L_a}{L_m}\left(\frac{n_1}{n_2}\right)}^2}} .$$

(11)

Supposed that α is one and L_lk is zero, the voltage gain in (10) can be considered as the voltage relation of the conventional flyback converter in the CCM, which is

$${\displaystyle \frac{V_o}{V_d}}=\left({\displaystyle \frac{n_2}{n_1}}\right)\left({\displaystyle \frac{D}{1-D}}\right).$$

(12)

Figure 5 shows the normalized voltage gain curves. The curve in red is obtained from (12) with the parameters for V_o = 15 V, V_d = 48 V, n₁ = 30, and n₂ = 10. The duty ratio D = 0.48 is obtained for the normalized voltage gain of V_o/V_d = 0.31. On the other hand, the curve in blue is obtained from (10) with the parameters for V_o = 15 V, V_d = 48 V, f_s = 50 kHz, L_m = 300 μH, L_lk = 1 μH, L_a = 7 μH, n₁ = 30, n₂ = 10, and n₃ = 2. The duty ratio D = 0.46 is obtained for the normalized voltage gain of V_o/V_d = 0.31. As shown in Figure 5, the voltage gain in (10) with the parameters mentioned above is higher than the voltage gain in (12) with respect to the duty ratio D. The voltage gain of the proposed converter is more effective as the duty ratio can be reduced for obtaining the same normalized voltage gain compared to the conventional converter. Once the duty ratio D is decided for V_d and V_o, n₁ and n₂ can be decided in advance by considering (12). Since the proposed converter operates in the CCM, the magnetizing inductor could be chosen as

$$L_m>{\displaystyle \frac{2P_o}{i_{Sp}^2{f}_s}}$$

(13)

where P_o is the output power, and i_Sp is the switch current which is the same as the leakage inductor current i_Lk. For the design of high-frequency transformers, the gapped ferrite cores can be used for avoiding the saturation. By adding an air gap to the solid ferrite core, the number of ampere-turns can be increased so that the ferrite core can tolerate before it saturates.

3.2. Auxiliary Winding Turns and Additional Inductor

When the power switch S_p is turned off, the output diode current i_Do is shifted to the additional circuit branch. The output diode D_o can be turned off at zero current. As shown in Figure 4, for the zero-current switching of the output diode D_o, the time duration in Mode II should be less than the turn-off time of the switch S_p as

$$∆t_{12}<\left(1-D\right)T_s.$$

(14)

By applying (4) to (14), the following equation can be represented as

$$V_o\left\{{\displaystyle \frac{1}{L_m}}{\left({\displaystyle \frac{n_1}{n_2}}\right)}^2+{\displaystyle \frac{1}{L_a}}\left({\displaystyle \frac{n_3}{n_2}}\right)\right\}>{\displaystyle \frac{i_{Do,peak}}{\left(1-D\right)T_s}} .$$

(15)

Here, the peak output diode current i_Do,peak is expressed as

$$i_{Do,peak}=i_{Do,avg}+{0.5\mathsf{\Delta }i}_{Do}$$

(16)

where i_Do,avg and Δi_Do are the average current and the ripple current of the output diode D_o, respectively, during one switching period T_s. Because the secondary current is related to the primary current through the inverse turns-ratio of the transformer [28], the peak output diode current i_Do,peak can be represented as

$$i_{Do,peak}=i_{Lm,avg}\left({\displaystyle \frac{n_1}{n_2}}\right){+0.5\mathsf{\Delta }i}_{Lm}\left({\displaystyle \frac{n_1}{n_2}}\right)$$

(17)

where i_Lm,avg and Δi_Lm are the average current and the ripple current of the magnetizing current i_Lm, respectively, during one switching period T_s. Assuming that the converter is lossless, (17) can be expressed as

$$i_{Do,peak}=\left({\displaystyle \frac{P_o}{V_d}}\right)\left({\displaystyle \frac{n_1}{n_2}}\right)+\left(1-D\right){\left({\displaystyle \frac{V_o{T}_s}{{2L}_m}}\right)\left({\displaystyle \frac{n_1}{n_2}}\right)}^2.$$

(18)

By applying (18) to (15), the following condition for selecting n₃ can be obtained as

$$n_3>n_1{L}_a\left\{\left({\displaystyle \frac{I_o}{V_d}}\right)\left({\displaystyle \frac{f_s}{1-D}}\right)-\left({\displaystyle \frac{1}{{2L}_m}}\right)\left({\displaystyle \frac{n_1}{n_2}}\right)\right\}$$

(19)

where I_o is the output current. While the auxiliary winding turns satisfied with (19), the time duration in Mode II is ensured for the current shifting operation of the proposed converter. The inductance of the additional inductor can be selected based on (8) as

$$L_a>{\displaystyle \frac{V_o+\left(\frac{n_2+n_3}{n_1}\right)\left(\frac{L_m}{L_m+L_{lk}}\right)V_d}{\left|\frac{d{i}_{Da}}{dt}\right|}}.$$

(20)

The changing rate of the additional diode current i_Da is controlled by the additional inductor L_a. As L_a gets higher, the changing rate of the additional diode current i_Da is reduced, which decreases the reverse-recovery current of D_a. For the design of high-frequency inductors, a commonly simple scheme called the area-product method [29] can be adopted where the thermal considerations are ignored. It implies that the high-frequency inductor built on this design should be evaluated for its temperature rise and efficiency. Of course, the core size should be adjusted accordingly. Figure 6 shows the operation waveforms of the proposed converter for the exceptional design case. When the inductance for the additional inductor L_a is very large, the output diode current i_Do will not be zero before the power switch is turned on. Because the increasing rate of the additional diode current i_Da is so low, the output diode current i_Do is not turned off at zero current. Despite the use of the transformer auxiliary winding turns, the output diode cannot achieve the zero-current switching operation. The output diode and the additional diode will have their reverse-recovery processes for Mode IV and Mode V, respectively, as shown in Figure 6. Therefore, the inductance of the additional inductor should be chosen experimentally, considering the exceptional operation modes in Figure 6.

3.3. Output Capacitor and Switching Devices

The capacitance of the output capacitor can be chosen based on the output voltage ripple ΔV_o as

$$C_o>{\displaystyle \frac{I_{o}D}{f_s∆V_o}}.$$

(21)

As the capacitance of the output capacitor is higher, the ripple of the output voltage is reduced. For the selection of the switching devices, the reverse blocking voltage should be considered with the parasitic oscillations. For the power switch S_p, its reverse blocking voltage is V_d + n₁V_o/n₂ theoretically. For the additional diode D_a, its reverse blocking voltage is theoretically V_o + n₂V_d/n₁ + n₂V_d/n₁. However, considering the energy stored in the leakage inductor and the reverse-recovery process of the additional diode, the voltage rating for S_p and D_a, respectively, should be at least two times higher than the reverse blocking voltage of each device. On the other hand, theoretically, for the output diode D_o, the reverse blocking voltage is V_o + n₂V_d/n₁. As the output D_o is turned off at zero current, additional voltage stress is not imposed on the diode, which permits the use of a lower voltage rating device for D_o. For the selection of the diodes, the forward voltage drop is a major concern. In applications with low output voltages, the Schottky diode can be used with a low voltage drop. Being majority-carrier devices, the Schottky diodes switch fast and keep switching losses to a minimum compared to the fast-recovery diodes.

3.4. Simulation Verification

The simulation results have been obtained for the conventional converter and the proposed converter, respectively. The simulations have been carried out by the physical security information management (PSIM) software, the version of which is 2023.a. The integration time step for the simulation has been set as 10 ns. By deliberating the design considerations described above, the key simulation parameters have been obtained as V_d = 48 V, V_o = 15 V, P_o = 45 W, f_s = 50 kHz, L_m = 300 μH, L_lk = 1 μH, n₁ = 30, n₂ = 10, and C_o = 2200 μF.

Figure 7 shows the simulation results of the conventional converter. Figure 7a shows V_Sp and i_Sp. The switch current i_Sp increases for the turn-on period of the switch S_p. Figure 7b shows V_Sp and i_Do. The output current i_Do decreases for the turn-off period of the switch S_p. When the switch S_p is turned off, a parasitic oscillation is observed across S_p. Because the energy stored in the leakage inductor L_lk should be released, a parasitic oscillation has been observed. There is a parasitic oscillation between the leakage inductor and the stray capacitors in the converter. These stray capacitors include the parasitic capacitor C_Sp of the switch and the parasitic capacitor C_Tr of the transformer. In the simulations, C_Sp and C_Tr are chosen as C_Sp = 200 pF and C_Tr = 100 pF, respectively. The parasitic oscillation affects the voltage and current waveforms of the circuit components.

Figure 8 shows the simulation results of the proposed converter. The additional parameters for L_a = 7 μH and n₃ = 2 have been included in the simulation. Figure 8a shows V_Sp and i_Sp. The switch current i_Sp increases for the turn-on period of the switch S_p. The switch voltage V_Sp has been reduced during the turn-off period by the operation of the additional circuit. When the switch S_p is turned off, a parasitic oscillation is observed across S_p because the energy stored in L_lk is released along with the stray capacitors in the converter. Figure 8b shows i_Do and i_Da. The current i_Do through the output diode D_o is shifted to the additional diode D_a. When the output diode current i_Do is reduced to zero, the additional diode current i_Da changes its direction. The output diode D_o is turned off at zero current, while the additional diode D_a is turned on at zero current.

4. Experimental Results

4.1. Experimental Setup

A 45 W prototype converter has been built and tested to evaluate the performance of the proposed converter. The conventional converter has also been designed to compare its performance with the proposed converter. Figure 9 shows the pictures for the experimental setup. Figure 9a shows the picture of the test environment, including the measurement instruments, the power supply, and the prototype circuit.

The programmable power supply PSH-6012A (GW-INSTEK, Seoul, Republic of Korea) has been used to supply the dc input voltage. The programmable electronic load ESL-300 (PNCYS, Seoul, Republic of Korea) has been used for the dc output load. The oscilloscope MDO3014 (Tektronix, Beaverton, OR, USA) has been used along with the voltage probes P5200 (Tektronix, USA) and the current probes TCP202 (Tektronix, USA). The digital power meter WT-230 (YOKOGAWA, Tokyo, Japan) has been utilized to measure power efficiency. The power efficiency has been obtained by dividing the output power by the input power. As shown in Figure 9b, the digital power meter measures the parameters up to 3 decimal places so that the power efficiency measurement can be as accurate as possible.

Table 1. Electrical specifications and the circuit parameters.

Symbol	Quantity	Value
Vd	input voltage	48 V
Vo	output voltage	15 V
Po	rated output power	45 W
fs	switching frequency	50 kHz
Lm	magnetizing inductance	300 μH
Llk	leakage inductance	1 μH
Sp	power switch	IRF640NPbF
Do	output diode	MBR10100G
Da	additional diode	MBR10100G
La	additional inductor	7 μH
Co	output capacitor	2200 μF

shows the electrical specifications and the circuit parameters. The transformer T has been designed by using an EFD2525S PQ core (Samwha Electronics, Yongin, Republic of Korea) with a 0.3 mm air gap. The inductor L_a has been designed by using an OR16 toroidal core (Samwha Electronics, Republic of Korea) with 5 winding turns. The magnetic components and the switching devices have been selected based on the design considerations discussed in the previous section.

The control circuit has been implemented using the pulse-width modulation controller KA7552 (On Semiconductor, Phoenix, AZ, USA) to regulate the output voltage. Figure 10 shows the circuit diagram for the control circuit implementation. To implement the closed-loop control of the converter, the following components have been used as R₁ = 10 Ω, R₂ = 100 Ω R₃ = 10 kΩ, R₄ = 5.3 kΩ, C₁ = 1 μF, C₂ = 1 nF, C₃ = 1 nF, C₄ = 3.3 nF, and C₅ = 470 nF. There are three signals interfaced with the power stages of the proposed converter. In Figure 10, the first signal is PWM_SIGNAL, which is connected to the gate of the power switch S_p. The second signal is CURRENT_SENSE, which senses the voltage across the resistor between the source of the power switch S_p and the electrical ground. The third signal is OUTPUT_FEEDBACK, which comes from the output voltage feedback circuitry. For the negative feedback control with galvanic isolation, the photocoupler PC817 and the shunt regulator TL431 have been utilized.

4.2. Experimental Verifications

Figure 11 shows the experimental waveforms of the conventional converter. Figure 11a shows V_Sp and i_Sp. As discussed in the simulation results, the voltage and current oscillations are observed due to the parasitic components in the circuit. Figure 11b shows V_Sp and i_Sp for the enlarged Figure 11a. It is observed that the switching loss is significant for the turn-on process of the switch S_p.

Figure 12 shows the experimental waveforms of the proposed converter. Figure 12a shows V_Sp and i_Sp. Figure 12b shows V_Sp and i_Sp for the enlarged Figure 12a. It is shown that the switch voltage V_Sp has been reduced during the turn-off of the switch S_p. It is also observed that the changing rate of the switch current i_Sp has been reduced for the turn-on process, compared to i_Sp in Figure 11b. As shown in Figure 12b, the turn-on switching loss has been reduced for the switch S_p.

Figure 13 shows the experimental waveforms of the conventional converter. Figure 13a shows V_Sp and i_Do. Figure 13b shows V_Sp and i_Do for the enlarged Figure 13a. It is observed that the reverse-recovery process is significant for the output diode Do in its turn-off process. The reverse-recovery time is approximately 350 ns, considering the parasitic oscillation time. Figure 13c shows V_Do and i_Do where the blocking voltage of the output diode is observed.

Figure 14 shows the experimental waveforms of the proposed converter. Figure 14a shows i_Do and i_Da. Figure 14b shows V_Sp and i_Da. As shown in Figure 14a,b, the output diode current i_Do is shifted to the additional diode D_a by the operation of the additional circuit. The additional diode D_a is turned on at zero current. As the output diode current i_Do is reduced to zero, the additional diode current i_Da changes its direction. The output diode D_o is turned off at zero current. Figure 14c shows V_Sp and i_Da for the enlarged Figure 14b. It is observed that the reverse-recovery process has been reduced for the additional diode D_a for the turn-off process. The reverse-recovery time is approximately 200 ns, considering the parasitic oscillation period. It is shown that the diode reverse-recovery current has been reduced by lowering the decreasing rate of the additional diode D_a during its turn-off instant. Figure 14d shows V_Do and i_Do. Figure 14e shows V_Da and i_Da. The blocking voltages for the diodes D_o and D_a are observed in Figure 14d,e, respectively. Figure 14f shows V_o and I_o. As shown in Figure 14f, the output voltage V_o is regulated well when the output load I_o changes abruptly from 1.0 A to 0.5 A.

Figure 15 shows the measured power efficiency curves. To consider the uncertainty of the measurement of the power efficiency, the upper limit and the lower limit for the measured power efficiency are 0.05% and—0.05%, respectively. For an example of the measurement result of 91.5 ± 0.05%, the measured power efficiency ranges between 91.45% and 91.55%. With the tolerance limit range from 0.05% to 0.05%, the difference between the measured power efficiencies has been calculated for the experimental results. Figure 15a shows the power efficiency curves for the conventional converter and the proposed converter with L_a = 7 μH, respectively, for different output power levels. As shown in Figure 15a, the conventional converter has a power efficiency of 92.3% at the rated load condition. On the other hand, the proposed converter has a power efficiency of 93.5% at the rated load condition. It has improved the power efficiency by 1.2% compared to the conventional converter. Figure 15b shows the power efficiency curves of the proposed converter for different inductances of L_a. The proposed converter has achieved the highest power efficiency of 93.5% for L_a = 7 μH for the rated load condition. In the case of using low inductance, the proposed converter has obtained the power efficiency of 93.1% for L_a = 4 μH. On the other hand, the proposed converter has obtained a power efficiency of 93.3% for L_a = 10 μH in the case of using high inductance.

Figure 16 shows the power loss distributions for the proposed converter with respect to the experimental results in Figure 15a. The power losses have been calculated based on the theoretical power loss model [30]. S_p, D_a, and D_o have caused the switching losses, which account for 42% of the total losses. The conduction losses for S_p, D_a, and D_o account for 29% of the total losses. The magnetic losses for T and L_a account for 17% of the total losses. Other losses include the power losses associated with the capacitor and the control circuitry. The highest losses are the switching losses, which can be reduced by achieving the soft-switching operation of the power switch on the primary side. Another approach to improve power efficiency is to use the synchronous rectifier [31], which can reduce conduction losses by replacing the diode with the power switch.

Table 2. Comparison of the electrical specifications and the power efficiency for previous converters.

	Input Voltage/Output Voltage	Rated Output Power	Power Efficiency
[18]	50 V/100 V	200 W	not announced
[19]	140 V/24 V	100 W	90.5%
[20]	72 V/12 V	100 W	77.5%

compares the electrical specifications and the power efficiency of the previous converters.

Table 3. Comparison of different passive snubber methods with the proposed method.

	Component	Advantage	Complexity
Lossless snubber [18]	inductor × 2, diode × 4, capacitor × 1, coupled inductor × 1	zero-voltage turn-on (switch), zero-current-turn-off (diode)	high
Lossless snubber [19]	capacitor × 2, diode × 4, coupled inductor × 1	zero-voltage turn-on (switch), zero-current-turn-off (diode)	high
Regenerative snubber [20]	capacitor × 1, diode × 3, coupled inductor × 1	zero-voltage turn-on (switch), energy regeneration	high
Proposed method	inductor × 1, diode × 1, transformer winding × 1	zero-current turn-off (diode), reduced turn-on loss (switch)	low

compares the components required for the passive snubber methods in [18,19,20] and the proposed converter.

Figure 17 shows the measured power efficiency curves to evaluate the performance of the proposed converter. The previous converter in [18] has been designed and tested under the same electrical specifications as the proposed converter. The additional components for the inductor, diode, capacitor, and coupled inductor have been included in applying the lossless snubber circuit in [18] to the flyback converter. Figure 17a shows measured power efficiency curves for the proposed converter and the converter in [18], respectively. The proposed converter has achieved higher power efficiency than the converter in [18], as shown in Figure 17a. The converter using the lossless snubber method in [18] achieves the soft-switching operation for the switch and the diode, respectively. However, the conduction losses are increased because a lot of the diodes are utilized. In addition, the high current stresses on the magnetic components increase the magnetic losses. Considering the components and the circuit complexity shown in Table 3, the proposed converter provides a low cost and higher power efficiency compared to the previous converters. To evaluate the proposed converter for higher power levels, a 90 W prototype converter has been designed and tested under the same input and output voltage specification in Table 1. Figure 17b shows the measured power efficiency curve of the proposed converter tested for the 90 W rated load condition. Because the output current has been doubled, the current ratings of the switch devices have been enhanced as S_p = IRFB4137PbF and D_a = D_o = MBR20100CT. The transformer T has been designed by using an EFD3130S PQ core (Samwha Electronics, Republic of Korea) with n₁:n₂: n₃ = 30:10:3. The parallel winding has been utilized for reducing the wire conduction losses of the transformer. As shown in Figure 17b, the proposed converter has achieved an efficiency of 93.6% at the 70 W load condition and 93.3% at the 90 W rated load condition, respectively.

5. Discussion

5.1. Application for Auxiliary Power Supplies

In this study, the proposed converter has been designed and tested for the use of the auxiliary power supply in low-voltage electric motor drive systems [4]. Typical examples are 48 V automotive systems like low-speed electric vehicles [32]. These kinds of applications need a highly efficient and highly reliable auxiliary power supply to provide a constant output voltage with electrical isolation. Furthermore, manufacturing costs are one of the key design issues for commercial products. Considering the high input voltage applications [12,13], the soft-switching techniques to recycle the transformer leakage energy would be desirable to improve the power efficiency. However, the soft-switching methods will increase the cost when the flyback converter is applied for low input voltage applications despite its advantages. Therefore, the proposed converter provides a simple and effective method to improve power efficiency by reducing the power losses of the switching devices, which will be desirable for the cost-effective design of the flyback converter.

5.2. Application for Power Factor Corrections

Single-stage power factor correction techniques have been actively researched using the flyback converter [23,24,25,26]. By integrating two power conversion stages into one, the single-stage ac–dc converters reduce the component count and the manufacturing cost [23]. As described in [24], as a single-switch converter, the flyback converter can be utilized for the cost-effective single-stage ac–dc converters. The proposed converter is expected to be a good candidate for single-stage power factor correction applications because it uses only one power switch. Figure 18 shows the circuit diagram of the proposed converter applied for the single-stage, single-switch power factor correction. In Figure 18, the power factor correction circuit components, including C_i, L_b, D_b1, D_b2, n_a, and n_b, are added to the proposed flyback converter. v_i is the single-phase grid voltage. The single-phase full-bridge diode rectifier includes D₁, D₂, D₃, and D₄. One coupled inductor can be utilized to realize the coupled windings for n_a and n_b. C_d is the dc-link capacitor, which is the dc input voltage for the proposed flyback converter. By the pulse-width modulation for the power switch S_p, the output voltage V_o is regulated, while the input current i_i is controlled to improve the power factor. For the proposed converter in Figure 18, the operation principle of the converter, the optimal design of the magnetic components, the analysis of the power factor, and the dc-link voltage regulation scheme will be further research topics.

Table 4. Comparison of the flyback converters for the single-stage power factor corrections.

	Operation	Advantage	Complexity
Converter in [31]	APWM operation (switch × 2)	Zero-voltage switching (switch)	medium
Converter in [32]	BCM operation (switch × 5)	Zero-current switching (diode)	high
Proposed converter in Figure 18	CCM Operation (switch × 1)	Zero-current switching (diode)	low

compares the features of the proposed flyback converter with the features of the previous converters in [25,26] for the single-stage power factor corrections.

The flyback converter in [25] operates with the APWM. Two power switches are required for the half-bridge switching leg to realize the zero-voltage switching operation of the power switches. The flyback converter in [26] needs a dual-purpose inverter for the active harmonic compensation and for the output voltage regulation. Totally, five power switches are required for implementing both the flyback converter and the dual-purpose inverter. The BCM operation is adopted to control the flyback converter, while an extra dual-mode control is applied to the dual-purpose inverter. Compared to the previous converter in [25,26], the proposed converter in Figure 18 is expected to reduce the circuit complexity and improve the power efficiency for a single-stage, single-switch converter.

6. Concluding Remark

This paper has proposed a flyback converter with a simple passive circuit to improve power efficiency. The additional passive circuit includes one diode, one inductor, and one auxiliary winding of the transformer. The current through the output diode has been shifted to the new branch in the additional circuit. The output diode has been turned off at zero current, which eliminates the turn-off switching loss. The additional diode has been turned on at zero current. The additional inductor has been utilized to control the changing rate of the additional diode current to reduce the reverse-recovery current. Therefore, the turn-on switching loss for the power switch has been reduced. Keeping the advantageous simplicity of the passive method, the proposed converter has reduced the switching power losses, improving the power efficiency.

The circuit configuration and the operation principle have been described. The design considerations for the circuit components and the simulation verification have been presented. The applications of the proposed converter have been discussed for future research directions. Experimental results for a 45 W prototype have been discussed to evaluate its performance. The proposed converter has achieved a power efficiency of 93.5% for the rated load condition, improving the power efficiency compared to the previous converters. Over the drawbacks of the previous converters, the proposed converter has reduced switching power losses with a simple and effective passive circuit method.