Universal Input Single-Stage High-Power-Factor LED Driver with Active Low-Frequency Current Ripple Suppressed

Abstract

In this paper, a light-emitting diode (LED) driver with a high power factor (PF) and low-frequency current ripple suppression over a wide input range is presented, and a flyback converter is designed to operate in the discontinuous conduction mode (DCM), with a digital controller used to keep the duty cycle constant for half of the utility cycle under a fixed load and input voltage. This method ensures that the input current is in phase with the universal input voltage, thus achieving a high power factor without utilizing feedforward control. Furthermore, on the secondary side, the time of the zero point of the utility voltage can be attained so that the duty cycle can be updated at this time. In addition, a simple auxiliary circuit is connected parallel to the output side to absorb the excess output current of the flyback converter or to release the current to the load to make up for the shortage of the output current of the flyback converter so that the low-frequency ripple of the output current can be inhibited. There are only two current-detecting resistors used in this study: one is the output current-sensing resistor of the flyback converter, and the other is the output current-sensing resistor of the auxiliary circuit.

1. Introduction

In actual power applications, most electronic products are not purely resistive loads but may contain inductive loads, capacitive loads, or non-linear loads. However, when a sinusoidal voltage is input, to consider the consumption of generic and specific (pure inductive and capacitive) inductances, the pure resistive load consumes energy, which is called real power, and the purely inductive and purely capacitive loads only store or release energy, which is called reactive power. But when a sinusoidal voltage is input and the load is non-linear, only the fundamental wave component has power output, and the others are harmonics. Therefore, increasing the power factor (PF) of the consumer by using the AC/DC converter as the energy interface can save energy and reduce the total harmonic distortion (THD) [1].

The active power factor correction circuits can be divided into two-stage and single-stage types. In recent years, products with two-stage power factor correction circuits have been gradually developed, and numerous papers and research results have been published on the subject. Although the two-stage power factor correction circuit has a high power factor, relatively low input current with high harmonics, and stable output voltage, the two-stage type has one more energy conversion process and one more control circuit than the single-stage type, which results in more components, more complex circuits, a larger size and weight, and a higher cost.

The conventional single-stage power factor correction converter uses a single converter to realize the power factor correction. It is the most commonly used structure for low-wattage LED luminaires in the industry because of its high power factor and low total harmonic distortion.

Related studies have proposed solutions to the problem of low-frequency ripple. In [2], a valley-filling filter circuit is used, and in [3], an auxiliary energy storage circuit is used to improve the low-frequency ripple of the output voltage, but this method shortens the on-time of the input current at the expense of the power factor.

In [4], an auxiliary circuit, which is powered by the battery, is added to the main power stage to reduce the low-frequency ripple of the output voltage by controlling the active switch in the auxiliary circuit to generate a current in the opposite direction of the current ripple of the main power stage.

In [5], the same switch is used to integrate a boost converter and a flyback converter into a single-stage converter, which relies on the energy storage capacitor between the two converters to decouple the low-frequency components and is able to recover the leakage current to improve efficiency. However, the drawback is that the energy still needs to be converted twice, which will increase the loss, and the experimental waveform shows a lack of ripple cancellation capability to some extent.

In [6], half-bridge active switches are used with soft switching to reduce losses. However, the drawback is that two transformers and one inductor are used, thereby increasing the overall weight and volume of the circuit. In addition, the experimental output current is lacking to a certain degree in ripple cancellation capability.

The literature [7] uses a simple two-stage structure and creates a DC voltage across a capacitor to compensate for the lack of a utility power supply and achieve low-frequency ripple cancellation. However, the drawback is that when the input voltage is less than the voltage across the capacitor, the input current will be flat, which will seriously damage the input current waveform and affect the power factor and total harmonic distortion.

In [8], the step-up converter, step-down converter, and flyback converter are integrated into a single-stage converter, and the same switch is used to operate the circuit, which simplifies the control and reduces the losses caused by the switch. However, the drawback is that the energy must be converted twice, which increases the overall loss, and the linear regulator is used in the back stage, which can suppress low-frequency ripple but significantly reduces the overall efficiency.

Reference [9] shows that the input adopts a bridgeless structure, which can reduce the conduction loss caused by the traditional full-bridge rectifier, and the half-bridge switches have soft switching to reduce the switching loss and further improve the efficiency. And the front and back stages are integrated into a single-stage structure through the same switch used, reducing the number of switches. However, the drawback is that since the input is the AC power source, it is necessary to determine the positive and negative status of the input voltage to activate the switch given by the main control force.

Reference [2] shows the LED driver. The advantage of this driver is that the main power stage is a step-down converter, so the structure is simple and efficient, and the proposed average current control with valley-filling power factor correction is used to remove low-frequency ripple currents.

As shown in [10], two opposite LCL output voltages are generated, so if the output capacity requirement is reduced, the LCL current can still be suppressed, and the secondary output voltage is minimized to reduce the loss and harmonic component of the input current. However, the drawback is that the auxiliary circuit will cause the input current to generate a zero-current plateau when the input voltage is close to zero, which increases THD, and the control of the switch requires circuit status feedback and complex judgment.

The circuits shown in [11,12] are similar, but they differ in the control strategy. The advantage of [11] is that the circuit uses a fixed on-time step-down converter as the auxiliary circuit, which has fast load transient response and is capable of eliminating low-frequency ripple across the load voltage and minimizing the secondary-side power conversion by depressing the secondary-side output voltage to optimize efficiency. However, the drawback is that the coupling inductor of the flyback converter requires multiple windings, which are not easy to manufacture because they must be tightly wound, and some power is still converted twice, resulting in lower efficiency. The advantage of [12] is that after the input power is at its maximum value, the energy is transferred only through the second winding of the flyback converter until the input power is lower than the output power. Then, the energy is transferred through the third winding and the step-down converter so that the energy can be drawn from the storage capacitor to make up for the shortage of the input power. However, the drawback is that this circuit is not able to store the excess energy when the input power is greater than the output power, resulting in a surge current at the output.

As shown in [13], the output voltage of the flyback converter is connected in series with the output voltage of the full-bridge inverter to eliminate the low-frequency voltage ripple without the use of electrolytic capacitors, and the auxiliary winding or loss compensation is used to avoid the imbalance between the stored and released energy of the full-bridge inverter due to the loss in the line, which leads to the inability to completely eliminate the low-frequency voltage ripple. However, the disadvantage of this circuit is that it is a high-voltage output with LEDs in series up to 150 V. The ground of the auxiliary capacitor voltage is the same as that of the output voltage, which makes it more complicated to realize the voltage feedback control.

As shown in [14,15], the whole system is completed in a nearly single-stage circuit, and only one inductive component is used to reduce the circuit size and weight; instead of using the electrolytic capacitor, the thin-film capacitor and the multi-layer ceramic capacitor (MLCC) are adopted to obtain a longer circuit life and a wider operating temperature range. Moreover, some power semiconductors have zero current switching (ZCS) at cutoff to reduce the switching losses of the overall system. However, the drawback is that the main switch is connected in series with the diode, so the conduction loss is higher. For the energy release mode in [14], the energy in the storage capacitor is first stored in the coupling inductor, and then the coupling inductor transfers the energy to the load, whereas for the energy release mode in [15], the storage capacitor directly transfers part of the energy to the load, and the excess energy is stored in the coupling inductor. From this, it can be known that the conversion loss in [15] is less than that in [14].

Therefore, this paper aims to develop a single-stage LED driver with low-frequency current ripple suppression and a high power factor over a wide input range. The basic principle is to combine the flyback converter and the synchronously rectified boost converter. By using the active switching of the synchronously rectified boost converter to store and release energy and to deploy the output power of the flyback converter, the low-frequency ripple can be suppressed.

2. Analysis of the Proposed Circuit

Figure 1 shows the proposed circuit structure, which is composed of an active low-frequency current ripple suppression unit (ALFCRSU) combined with a flyback converter (FC). The components of the FC are one switch S₁, one diode D₁, one coupled inductor T₁, and one output capacitor C_o. The components of the ALFCRSU are two switches S₂ and S₃, one capacitor C₁, and one inductor L₁. The secondary coil of the coupled inductor T₁ is represented by N₁, and the secondary coil is represented by N₂. The load is represented by the output resistance, R_o.

The relevant symbols are shown in Figure 2 and defined as follows:

(1)

v_in is the input voltage, V_o is the output voltage, and i_in is the input current.

(2)

i_{o_flyback} is the current flowing from point A to point B, i_D1 is the current in the diode D₁, i_ds1 is the current in the switch S₁, i_ds2 is the current in the switch S₂, i_ds3 is the current in the switch S₃, i_N1 is the current in the coil N₁, i_Lm1 is the current in the magnetizing inductor L_m, i_L1 is the current in the inductor L₁, i_C1 is the current in the capacitor C₁, and I_o is the current flowing through the output resistor R_o.

(3)

v_Lm is the voltage across the magnetizing inductor L_m, v_N1 is the voltage across the coil N₁, v_N2 is the voltage across the coil N₂, v_L1 is the voltage across the inductor L₁, and v_C1 is the voltage across the capacitor C₁.

For convenience of analysis, the following definitions and assumptions are made first:

(1)

The small-ripple approximation method is used for analysis in the steady state.

(2)

The FC operates in the discontinuous conduction mode (DCM), and the ALFCRSU operates in the continuous conduction mode (CCM).

(3)

The switching period is T_s1, the on-time of the switch S₁ is D_x1T_s1, the cutoff time of the switch S₁ is (1 − D_x1)T_s1, the switching period of the switches S₂ and S₃ is T_s2, the on-time of the switch S₂ and the cutoff time of the switch S₃ are D_yT_s2, the cutoff time of the switch S₂ and the on-time of the switch S₃ are (1 − D_y)T_s2; T_s1 is much larger than T_s2, and the blanking time is neglected.

(4)

The FC and the ALFCRSU are independent of each other in terms of operation timing, so they can be analyzed separately.

(5)

The switches are regarded as ideal.

(6)

The inductor L₁, the coupled inductor T₁, and the capacitors C_o and C₁ are not considered for their parasitic resistance.

(7)

The value of the output capacitor C_o is large enough to keep the voltage across it at a constant value, V_o.

(8)

The coupling coefficient of the couped inductor T₁ is one, i.e., leakage inductances are not considered.

(9)

Since the switching frequency is much larger than the line frequency, v_in can be considered a DC value over one or more switching periods. The proposed ALFCRSU has two operating states over the line radian frequency ω_L, as shown in Figure 3. In addition, state I occurs when the ALFCRSU stores energy, whereas state II occurs when the ALFCRSU releases energy.

(10)

The proposed FC and ALFCRSU both operate under negative feedback current control.

(11)

The load current is defined as I_o.

2.1. ALFCRSU Operating Concept

The input voltage v_in and the input current i_in are defined as

$$v_{in}=V_m\sin ({\omega }_{L}t)$$

(1)

$$i_{in}=I_m\sin ({\omega }_{L}t)$$

(2)

where V_m and I_m are the amplitudes of v_in and i_in, respectively.

The instantaneous input power p_in is defined as

$$\begin{array}{cc}{p}_{in}\hfill & =V_m\sin ({\omega }_{L}t)\times I_m\sin ({\omega }_{L}t)\hfill \\ & =V_m{I}_m\times \frac{1-\cos (2{\omega }_{L}t)}{2}\hfill \\ & =\frac{V_m}{\sqrt{2}}\times \frac{I_m}{\sqrt{2}}\times [1-\cos (2{\omega }_{L}t)]\hfill \\ & =V_{rms}{I}_{rms}\times [1-\cos (2{\omega }_{L}t)]\hfill \\ & =P_{in}[1-\cos (2{\omega }_{L}t)]\hfill \end{array}$$

(3)

where V_rms and I_rms are the root-mean-square values of v_in and i_in, respectively.

It is assumed that the efficiency is one, namely, that the instantaneous input power p_in is identical to the instantaneous output power p_o, and hence, the average input power P_in is identical to the instantaneous output power P_o, and the current i_{o_flyback} can be expressed as

$$\begin{array}{l}{i}_{o\_flyback}=\frac{p_o}{V_o}=\frac{P_o}{V_o}\times [1-\cos (2{\omega }_{L}t)]\\ =I_o\times [1-\cos (2{\omega }_{L}t)]\end{array}$$

(4)

From (4), the effect of ALFCRSU can be achieved by controlling the inductor current i_L1 as follows:

$$i_{L1}=i_{o\_flyback}-I_o=-I_o\times \cos (2{\omega }_{L}t)$$

(5)

Based on the above assumptions, since the operations of the FC and ALFCRSU are independent of each other, their related waveforms can be discussed separately. In the following analysis, based on the ALFCRSU, there are two operating states.

2.2. Operating Behavior of FC and ALFCRSU in State I

In State I, the ALFCRSU stores energy. Figure 4 shows the equivalent circuit of the proposed topology. The associated equation is

$$I_o=i_{o\_flyback}-i_{L1},i_{L1}>0$$

(6)

In this state, i_L1 will absorb the output current i_{o_flyback} of the FC minus the load current I_o.

2.2.1. FC Operating Principle in State I

The FC operates in the DCM, so there are three modes to be described, as shown in Figure 5.

Mode 1: [t₀ ≤ t ≤ t₁]

As shown in Figure 5 and Figure 6, the switch S₁ is on. During this mode, the diode D₁ is cut off. At the same time, the voltage across the magnetizing inductor L_m is the input voltage V_in, so L_m is magnetized. The output capacitor C_o is discharged to provide energy to the load R_o and ALFCRSU.

Mode 2: [t₁ ≤ t ≤ t₂]

As shown in Figure 5 and Figure 7, the switch S₁ is cut off. During this mode, the diode D₁ is turned on. At the same time, the voltage across the magnetizing inductor L_m is −nV_o, so L_m is demagnetized, and the energy stored in L_m is transferred to the output and ALFCRSU via the secondary winding N₂.

Mode 3: [t₂ ≤ t ≤ t₀ + T_s]

As shown in Figure 5 and Figure 8, the switch S₁ is cut off. During this mode, the diode D₁ is cut off. At the same time, the magnetizing inductor L_m has no energy, and only the output capacitor C_o is discharged to provide energy to the load R_o and ALFCRSU.

Voltage Gain of the FC in State I

For the FC to be considered, the duty cycle D_x1 is updated every half utility cycle. The average power of the half utility cycle must be used to calculate the actual voltage gain, which is defined as the output voltage V_o divided by the maximum value of v_in, called V_m. By assuming the efficiency equals one, the following equation can be obtained:

$$\begin{array}{c}\frac{V_m^2\times D_{x1}^2\times T_{s1}}{4\times L_m}=\frac{V_o^2}{R_o}\\ \Rightarrow \frac{V_o}{V_m}=\sqrt{\frac{R_o\times D^2\times T_{s1}}{4\times L_m}}=\frac{D_{x1}}{2}\times \sqrt{\frac{R_o\times T_{s1}}{L_m}}\end{array}$$

(7)

Also,

$$V_m=\sqrt{2}\times V_{ac}$$

(8)

Therefore, the relationship between the output voltage V_o and the root-mean-square (RMS) value of v_ac, called V_ac, is

$$\frac{V_o}{V_{ac}}=D_{x1}\times \sqrt{\frac{R_o\times T_{s1}}{2\times L_m}}$$

(9)

2.2.2. ALFCRSU Operating Principle in State I

The ALFCRSU operates in the CCM, so there are two modes to be described, as shown in Figure 9.

Mode 1: [t₀ ≤ t ≤ t₁]

As shown in Figure 9 and Figure 10, switch S₂ is on and switch S₃ is off. At this time, the voltage across inductor L₁ is the output voltage V_o, so L₁ is magnetized. The FC provides energy to L₁ and the load R_o.

Mode 2: [t₁ ≤ t ≤ t₀ + T_s]

As shown in Figure 9 and Figure 11, the switch S₂ is cut off and the switch S₃ is on. At the same time, the voltage across the inductor L₁ is V_o − v_C1, so L₁ is demagnetized. The capacitor C₁ obtains energy from L₁ and the FC, so it is charged, and the FC also provides energy to the load R_o.

Voltage Gain of the ALFCRSU in State I

Since the voltage across the inductor L₁ over one switching cycle in steady state must obey the volt-second balance, the following equation can be obtained:

$$D_y\times V_o+(1-D_y)\times (V_o-V_{C1})=0$$

(10)

By rearranging (10), the corresponding voltage gain can be obtained:

$$\frac{V_{C1}}{V_o}=\frac{1}{1-D_y}$$

(11)

2.3. Operating Behavior of FC and ALFCRSU in State II

In state II, the ALFCRSU stores energy. Figure 12 shows the equivalent circuit of the proposed topology. The associated equation is

$$I_o=i_{o\_flyback}-i_{L1},i_{L1}<0$$

(12)

In this state, i_L1 will release current to compensate for the output current i_{o_flyback} of the FC and to provide energy to the load current I_o.

2.3.1. FC Operating Principle in State II

The flyback converter operates in the DCM, so there are three modes to be described, as shown in Figure 13.

Mode 1: [t₀ ≤ t ≤ t₁]

As shown in Figure 13 and Figure 14, the switch S₁ is on. During this mode, the diode D₁ is cut off. At the same time, the voltage across the magnetizing inductor L_m is the input voltage V_in, so L_m is magnetized. The output capacitor C_o, together with the ALFCRSU, is discharged to provide energy to the load R_o.

Mode 2: [t₁ ≤ t ≤ t₂]

As shown in Figure 13 and Figure 15, the switch S₁ is cut off. During this mode, the diode D₁ is turned on. At the same time, the voltage across the magnetizing inductor L_m is −nV_o, so L_m is demagnetized. The energy stored in L_m is transferred to the secondary winding N₂, and together with the ALFCRSU, it is supplied to the output, so the output capacitor C_o is charged.

Mode 3: [t₂ ≤ t ≤ t₀ + T_s]

As shown in Figure 13 and Figure 16, the switch S₁ is cut off. During this mode, the diode D₁ is cut off. At the same time, the magnetizing inductor L_m has no energy, and the output capacitor C_o, together with the ALFCRSU, is discharged to provide energy to the load R_o.

Voltage Gain of FC in State II

The corresponding voltage gain is the same as that shown in (9).

2.3.2. ALFCRSU Operating Principle in State II

The ALFCRSU works in the CCM, so there are two modes to be described, as shown in Figure 17.

Mode 1: [t₀ ≤ t ≤ t₁]

As shown in Figure 17 and Figure 18, the switch S₂ is on and the switch S₃ is off. During this mode, the voltage across the inductor L₁ is the minus output voltage V_o, so L₁ is reverse demagnetized. At the same time, the flyback converter and L₁ provide energy to the load R_o.

Mode 2: [t₁ ≤ t ≤ t₀ + T_s]

As shown in Figure 17 and Figure 19, the switch S₂ is cut off and the switch S₃ is on. During this mode, the voltage across the inductor is $V_o-v_{C1}$, so L₁ is reverse magnetized. The capacitor C₁ provides energy to the inductor L₁ and the load R_o so it is discharged, and the FC also provides energy to the load R_o.

Voltage Gain of the ALFCRSU in State II

Since the voltage across the inductor L₁ over one switching cycle in the steady state must obey the volt-second balance, the following equation can be obtained:

$$(1-D_y)\times V_o+D_y\times (V_o-V_{C1})=0$$

(13)

By rearranging (13), the corresponding voltage gain can be obtained:

$$\frac{V_o}{V_{C1}}=D_y$$

(14)

3. System Configuration along with Circuit Component Specifications

Figure 20a shows a block diagram of the system. The system configuration consists of the main circuit and the feedback control circuit. The main circuit is composed of the FC and ALFCRSU. In the feedback circuit, the analog signal of the output current is obtained from the current sensor, and then the analog-to-digital converter (ADC) inside the dsPIC33FJ16GS502 converts the analog signal into the digital signal, and the zero-voltage detection generates the trigger signal. The control force created from the dsPIC33FJ16GS502 is then used to regulate the switches after the isolated gate drivers. In addition, Figure 20b shows a photo of the experimental setup. In addition,

Table 1. LED specifications.

Specifications	Values
Forward Voltage (VF)	2.95V~3.85 V
DC Operating Current (IF,max)	400 mA
Pulsed Forward Current	500 mA
Junction Temperature	125 °C
Operating Temperature	−40 °C~85 °C
Typical Light Flux Output	100 lm @ 350 mA

,

Table 2. LED driver specifications.

Specifications	Values
Normal Input Voltage (Vin_nor)	110 Vrms
Maximum Input Voltage (Vin_max)	264 Vrms
Minimum Input Voltage (Vin_min)	85 Vrms
Line Frequency (fline)	60 Hz
Rated Output Voltage (Vo_rated)	34.5 V (=3.45 V × 10)
Rated Output Current (Io_rated)	350 mA × 10 = 3.5 A
System Operation Mode	DCM
Switching Frequency (fs1) for FC	100 kHz
Switching Frequency (fs2) for ALFCRSU	200 kHz
LED Specifications	VF = 3.45 V, IF = 0.35 A (Rated Load) VF = 2.9 V, IF = 87.5 mA (Light Load)
Number of LEDs on the LED String	10

and

Table 3. A summary of the component specifications of the proposed circuit.

Components	Specifications
BD1	T8KB60
S1	SPA20N60C
S2, S3	SUP85N10
D1	SBR30300CT
Cf1	0.1 μF Film Capacitor
Cf2	0.47 μF Film Capacitor
C1	220 μF Electrolytic Capacitor
Co	141 μF Multi-Layer Ceramic Capacitor
	470 μF Electrolytic Capacitor
T1	Core: LP3320, Lm = 61.22 μH, n = 3.5
L1	Core: T94-52 64 μH
Lf	Core: T106-45, 800 μH
Isolated Gate Drivers	TLP250H

display the LED specifications, LED driver specifications and summary of the component specifications for this system, respectively.

4. Control Strategy

4.1. Input Voltage Waveform Restoration Circuit

As shown in Figure 21, when the switch S₁ is on, the input voltage v_in is mapped from the primary winding N₁ of the coupled inductor T₁ to the third winding N₃, and the voltage is built up across the capacitor C_a due to the conduction of the diode D_a. Since the relationship between N₂ and N₃ is opposite in polarity, the diode D_a is cut off. The above-mentioned input voltage waveform restoration circuit can directly obtain the input voltage information from the coupled inductor T₁ to realize waveform restoration, as well as exclude the output voltage component.

4.2. Zero-Voltage Detection

The zero-voltage detection circuit is displayed in Figure 22. Therefore, the restoration waveform is compared with the voltage level of about 1.34 V to generate the trigger signal, called v_trig, as shown in Figure 23, and this signal will be sent to the DSP.

4.3. Main Program Control Function

Figure 24 shows a block diagram of the main program control function. In this figure, the diode current i_D1 is averaged over half of a utility cycle to obtain ${\widehat{i}}_{D1}$. Subsequently, if the interrupt is activated, then the output current command IoC minus this average value is sent to the first proportional–integral (PI) controller. On the other hand, ${\widehat{i}}_{D1}$ minus the output current command IoC plus the uplift constant IL0 is used to create the current command of the inductor L₁, and then the sensed inductor current ${\widehat{i}}_{L1}$ minus this command is sent to the second PI controller. In this paper, the digital control program is written according to Figure 24. The duty cycle of the switch S₁ can be fixed for half of a utility cycle generated by the interrupt based on the triggering signal v_trig, as shown in Figure 23, and the output average current and the active low-frequency current ripple suppression unit can be controlled, respectively.

5. Experimental Results

5.1. Input Voltage of 110 V at Rated Load

Figure 25a shows the input voltage v_in and input current i_in. Figure 25b provides a comparison of the input current harmonic distribution with IEC61000-3-2 Class C. The values are in accordance with Class C requirements. Figure 26a shows the gate driving signal v_gs1 for the switch S₁, the voltage v_ds1 across the switch S₁, and the voltage v_D1 across the diode D₁ at the input voltage near the peak. Figure 26b shows the gate driving signal v_gs1 for the switch S₁, the voltage v_ds1 across the switch S₁, and the voltage v_D1 across the diode D₁ at the input voltage near the zero-crossing point. At rated load, Figure 26a,b show that the duty cycle of the switch S₁ is fixed for half of a utility cycle; Figure 27a shows the current i_{o_flyback} in the output of the flyback converter, the inductor current i_L1 in the inductor L₁, the output current i_o, and the voltage v_C1 across the capacitor C₁; Figure 27b shows the output current ripple Δi_o. However, if the control force is reduced, the low-frequency ripple suppression effect will be reduced. Therefore, in this paper, the control force is set to a high value to obtain a better low-frequency ripple suppression effect despite the oscillation. When the inductor current i_L1 changes from a positive to negative half cycle, it can be seen from Figure 27a,b that the output current variation of Δi_o decreases considerably, whereas when the inductor current i_L1 changes from a negative to positive half cycle, the output current variation of Δi_o decreases by less, and then the inductor current i_L1 appears as a small flat area close to 0A, that is, the inductor current i_L1 cannot be controlled by the digital controller. In contrast, when the inductor current i_L1 changes from a positive to a negative half cycle, the reason for the larger sag in the output current variation of Δi_o is that the current i_L1 is smaller and more easily disturbed.

5.2. Input Voltage of 220 V at Rated Load

Figure 28 shows the input voltage v_in and input current i_in. Figure 29 provides a comparison of the input current harmonic distribution with IEC61000-3-2 Class C. The values are in accordance with Class C requirements. Figure 30 shows the gate driving signal v_gs1 for the switch S₁, the voltage v_ds1 across the switch S₁, and the voltage v_D1 across the diode D₁ at the input voltage near the peak. Figure 31 shows the gate driving signal v_gs1 for the switch S₁, the voltage v_ds1 across the switch S₁, and the voltage v_D1 across the diode D₁ at the input voltage near the zero-crossing point. At rated load, as shown in Figure 30 and Figure 31, the duty cycle of the switch S₁ is fixed for half a utility cycle; Figure 32 shows the current i_{o_flyback} in the output of the flyback converter, the inductor current i_L1 in the inductor L₁, the output current i_o, and the voltage v_C1 across the capacitor C₁. Figure 33 shows the output current ripple Δi_o. However, if the control force is reduced, the low-frequency ripple suppression effect will be reduced. Therefore, in this paper, the control force is set to a high value to obtain a better low-frequency ripple suppression effect despite the oscillation. When the inductor current i_L1 changes from a positive to negative half cycle, from Figure 32 and Figure 33, it can be seen that the output current variation of Δi_o decreases considerably, whereas when the inductor current i_L1 changes from a negative to a positive half cycle, the output current variation of Δi_o decreases by less, and then the inductor current i_L1 appears as a small flat area close to 0 A, that is, the inductor current i_L1 cannot be controlled by the digital controller. In contrast, when the inductor current i_L1 changes from a positive to negative half cycle, the reason for the larger sag in the output current variation of Δi_o is that the sensed current i_L1 is smaller and more easily disturbed. Compared to the results measured under 110 V input voltage, the duty cycle of the switch S₁ that is fixed for half a utility cycle is relatively small, and the ring phenomenon is relatively serious.

5.3. Output: Current Ripple Suppression

Table 4. Output current ripple amplitude.

Output Current	Suppression		No Suppression
	110 V	220 V	110 V	220 V
0.88 A (25%)	1.73 A	1.75 A	0.73 A	0.8 A
1.75 A (50%)	3.5 A	3.55 A	0.83 A	1.01 A
3.5 A (100%)	6.9 A	6.8 A	1.2 A	1.33 A

and

Table 5. Output current ripple suppression percentage.

Output Current	110 V	220 V
0.88 A (25% Load)	57.8%	54.3%
1.75 A (50% Load)	78.29%	71.55%
3.5 A (100% Load)	82.61%	80.44%

show the output current ripple amplitude and output current ripple suppression percentage, respectively. They also show that the effectiveness of the proposed ALFCRSU has been verified.

5.4. Other Associated Measurements

The total harmonic distortion, power factor, and efficiency of the proposed circuit are measured for different output currents at four different input voltages. The measurement method is shown in Figure 34. First, a power analyzer (PM1000+) is used to measure the input current, total harmonic distortion (THD), and power factor (PF). Then, a digital meter (Fluke 179, manufactured by FLUKE Co., Everett, WA, USA) is used to measure the input voltage, output voltage, and the voltage across the current shunt to obtain the output current, from which the input power and output power can be obtained. Finally, the resulting input and output power are used to calculate the corresponding efficiency. Figure 35 shows the curve of total harmonic distortion versus load under different input voltages. Figure 36 shows the curve of power factor versus load at different input voltages. Figure 37 shows the curve of efficiency versus load under different input voltages.

From Figure 35, it can be seen that the low-voltage input can maintain low total harmonic distortion under any load condition; the high-voltage input can also maintain low total harmonic distortion above heavy load, but below half load, the total harmonic distortion increases due to increasing zero-crossing distortion. From Figure 36, under the input voltages of 85 V and 110 V, it can be seen that almost no zero-crossing distortion occurs for all load conditions, and the phase difference between input voltage and input current is very small, so the high power factor can be maintained. When the output power is fixed, comparing the measured results of the 110 V input with those of the 220 V input, the capacitive current of the 220 V input is the same as that of the 110 V input, and the input current of the 220 V input is lower than that of the 110 V input. Therefore, the power factor of the 220 V input is lower than that of the 110 V input. To summarize, the proposed circuit has a high power factor. As can be seen from Figure 37, the efficiency of the LED driver can be maintained at 84% or higher, with a maximum efficiency of 86.95% at the 110 V input voltage and 30% load. This flat area can be eliminated by changing the parameters of the digital controller. This is because the capacitor voltage v_C1 will not decrease to near the average output voltage V_o, and this means that more energy must be supplied to the capacitor C₁, and hence, the efficiency will be reduced. Accordingly, the flat area with some inductor current (i_L1) is adopted herein to obtain better efficiency.

6. Conclusions

This paper applies a control method of a fixed duty cycle in each half of the utility cycle to a single-stage AC/DC converter, built by using a flyback converter, and this has the advantages of a high power factor and simple control. Furthermore, an active low-frequency ripple suppression unit is employed to reduce the output low-frequency ripple and thereby decrease the flicker of the LED load. The proposed method makes sure that the input current can be in phase with the universal input voltage, thus achieving a high power factor without utilizing feedforward control. Furthermore, not only can the time of the zero point of the utility voltage be attained on the secondary side, so that the duty cycle can be updated at the time of the zero point of the utility voltage, but also the simple auxiliary circuit is connected parallel to the output side to absorb the excess output current of the flyback converter or to release the current to the load to make up for the shortage of the output current of the flyback converter. As a result, the low-frequency ripple of the output current can be suppressed easily. In the future, the number of LED strings will increase along with the soft switching considered in this study and applied to street lighting.