A Simple Mismatch Mitigating Partial Power Processing Converter for Solar PV Modules
Abstract
:1. Introduction
- (a)
- In the first category [37,42], the secondary sides of the central inverter and the DC bus are connected in parallel and they share the same voltage. Furthermore, the switching devices on the secondary side of the module-level DC-DC converter experience high voltage stress, as the DC-bus voltage is the summation of all the PV module output voltages [44].
- (b)
- The second category [37,43], which is known as an isolated bus, is formed by connecting the secondary ports of DC-DC converters in parallel. The selection of DC-bus voltage in PV to an isolated bus DPP converter topology enhances the complexity of the design, as it can be selected independently from the PV module voltage. Also, in (a) and (b), the size and power loss increase due to the presence of more components along with the cost.
- (c)
- Lastly, the third DPP, which is known as the PV-PV DPP converter [42,45] are non-isolated DPP architectures, which can be built cost-effectively through modular combinations. These PV-PV DPP converters draw power from adjacent PV modules. The general structure of PV-PV DPP is shown in Figure 3. Moreover, this topology has one less power converter than the number of PV modules, i.e., one less PV-PV DPP converters is required than the total number of PV modules. The main benefit of this architecture is that its converters are designed according to the voltage characteristics of the PV module rather than that of the main bus voltage. Therefore, the PV-PV DPP converter is independent of bus voltage and need not withstand the high voltage stresses. PV-PV DPP converters are emerging DPP topologies, which are improving continuously in terms of performance, cost, and reliability [42,46].
2. Proposed DPP Methodology
2.1. Conventional Mismatch Mitigation Method
2.2. Main Features and Qualitative Comparison with Other DPP Converter Topologies
- a better performance under severe mismatching,
- less inductor current ripple,
- simple control circuitry, and
- equalization of the series-connected PV submodule voltages.
2.3. Operational Analysis
2.4. Component Design
2.5. Power Loss Analysis
3. Simulation Results
- Scenario 1—No shading
- Scenario 2—SM1 is shaded
- Scenario 3—SM2 is shaded
4. Experimental Results and Discussion
4.1. Prototype and Experimental Setup
4.2. Results
5. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Conflicts of Interest
References
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Average Maximum Power (Pmax) | 45 W |
---|---|
Maximum Voltage (Vmp) | 17.50 V |
Maximum Current (Imp) | 2.58 A |
Open-Circuit Voltage (Voc) | 22 V |
Short-Circuit Current (Isc) | 2.86 A |
Cases | Case 1 | Case 2 | Case 3 | Case 4 |
---|---|---|---|---|
E1 (W/m2) | 1000 | 750 | 500 | 250 |
E2 (W/m2) | 1000 | 1000 | 1000 | 1000 |
Cases | V1 | V2 |
---|---|---|
Case 1 | 17.50 | 17.50 |
Case 2 | 17.21 | 17.23 |
Case 3 | 16.89 | 16.94 |
Case 4 | 16.61 | 16.68 |
Components | Value |
---|---|
MOSFET | IRFZ44VPbF, Ron = 16.5 mΩ |
Inductance (L) | 100 µH, RL = 180 mΩ |
Capacitance (C) | Ceramic capacitor, 10 µF × 5, 1 mΩ |
Gate driver | TC4428M |
DSP | Texas Instrumentation TI F28379D |
Mismatch Conditions | I1(A), V1(V) | I2(A), V2(V) |
---|---|---|
Test 1 | 2, 15 | 2, 15 |
Test 2 | 2, 15 | 1.56, 14.8 |
Test 3 | 1.41, 14.7 | 2, 15 |
Components | Switch Pon | Switch Pswloss | Capacitor PC_loss | Inductor PL_loss |
---|---|---|---|---|
Calculated loss (mW) | 109.83 | 71.69 | 8.3 | 300 |
Calculated efficiency (ƞ) | 67.5/(67.5 + 0.489) = 99.28% | |||
Simulated efficiency (ƞ) | (66.5 × 100)/67.4 = 98.66% |
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Niazi, K.A.K.; Yang, Y.; Kerekes, T.; Sera, D. A Simple Mismatch Mitigating Partial Power Processing Converter for Solar PV Modules. Energies 2021, 14, 2308. https://doi.org/10.3390/en14082308
Niazi KAK, Yang Y, Kerekes T, Sera D. A Simple Mismatch Mitigating Partial Power Processing Converter for Solar PV Modules. Energies. 2021; 14(8):2308. https://doi.org/10.3390/en14082308
Chicago/Turabian StyleNiazi, Kamran Ali Khan, Yongheng Yang, Tamas Kerekes, and Dezso Sera. 2021. "A Simple Mismatch Mitigating Partial Power Processing Converter for Solar PV Modules" Energies 14, no. 8: 2308. https://doi.org/10.3390/en14082308
APA StyleNiazi, K. A. K., Yang, Y., Kerekes, T., & Sera, D. (2021). A Simple Mismatch Mitigating Partial Power Processing Converter for Solar PV Modules. Energies, 14(8), 2308. https://doi.org/10.3390/en14082308