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Article

Active Damping Injection Output Voltage Control with Dynamic Current Cut-Off Frequency for DC/DC Buck Converters

1
Intelligent Robotics Research Center, Korea Electronics Technology Institute, Bucheon 401401, Korea
2
Department of Creative Convergence Engineering, Hanbat National University, Daejeon 34158, Korea
3
School of Mechanical Engineering, Chungnam National University, Daejeon 136701, Korea
*
Authors to whom correspondence should be addressed.
Energies 2021, 14(20), 6848; https://doi.org/10.3390/en14206848
Submission received: 28 August 2021 / Revised: 30 September 2021 / Accepted: 9 October 2021 / Published: 19 October 2021
(This article belongs to the Special Issue Advanced Frontiers for Power Electronics in Energy Conversion)

Abstract

:
With regard to DC/DC buck converter applications, the objective of this study is to expand the admissible range of the output voltage cut-off frequency while lowering the steady-state current cut-off frequency as possible. This study fortifies the inner loop by incorporating the novel subsystems such as an auto-tuner (for the dynamic current cut-off frequency) and active damping injection invoking the pole-zero cancellation nature with the particular designed feedback gain structure. The outer loop active damping control renders the closed-loop speed transfer function to be a first-order low-pass filter with the cooperation of the specially structured design parameters; in addition, it provides time-varying disturbance attenuation. The experimental results obtained for a 3-kW buck converter validate the feasibility of the proposed technique by showing a 34 % performance enhancement (at least) compared with the recent active damping controller.

1. Introduction

Battery-based industrial applications (including drones, electrical vehicles, and mobile robots) require high-quality DC power supply systems to ensure improved reliability during operation [1,2,3]. To address these industrial needs, DC/DC power converters are considered to be a reasonable solution. These converters are equipped with devised that provide major advantages, such as power factor correction. Moreover, a carefully designed feedback controller can dramatically improve the closed-loop robustness to variations in the load and operating conditions [4,5,6].
The cascade-type control strategy is typically adopted to ensure high-performance DC/DC power conversion, and the inner and outer loops should regulate the inductor current and output capacitor-side voltage, respectively [7,8]. The introduction of a fast current loop provides practical advantages. First, it improves the output voltage control performance by kicking off the unstable zero through the high-current loop cut-off frequency settings. Secondly, it limits the inductor current by using software to regulate the current reference signal obtained from the outer loop controller. To ahieve the two above-mentioned benefits, proportional-integral (PI) controllers were mainly been adopted for each loop. The selected PI gains assign the cut-off frequencies for the current and voltage loops to satisfy the desired closed-loop performance and robustness described in the frequency domain. Typically, the current cut-off frequency is set to be greater than that of the voltage loop, which makes the current loop faster compared with the voltage loop. This closed-loop setting may limit the output voltage control performance based on the current cut-off frequency specification. Increasing the current cut-off frequency to increase the admissible output voltage cut-off frequency can result in the increase of the current ripples or even instability [7,9,10]. To limit the current cut-off frequency, a feed-forward compensation technique was developed with consideration to the converter current dynamics. This technique requires the true converter inductance and capacitance values to vary in accordance with the operating conditions [11]. The resulting closed-loop accuracy can be greatly improved by adopting additional novel online parameter identifiers (as in [12,13]).
There are several novel methods for ensuring the high output voltage control performance while avoiding the increase of the current cut-off frequency: for example, predictive [14], deadbeat [15], adaptive [16], sliding mode [17], backstepping [18], and nonlinear robust methods [19]. These methods achieve true converter parameter dependence level reduction for the feed-forward compensation terms. However, the control actions keep the current cut-off frequency constant, although it must be increased to achieve rapid output voltage dynamics. The recently proposed cascade-type feedback linearization (FL) controller stabilizes the current and voltage at the desired values, and the optimal feedback gains determine the constant current and voltage cut-off frequencies [20]. The differential inclusion technique based on the discontinuous switching function has been applied to ensure the global tracking property without controlled error integrators and a pulse-wide modulation (PWM) process [21]. The state-feedback controllers collaborate with the disturbance observer (DOB) used for the feed-forward compensator to stabilize the error dynamics; the feasibility of this method has been experimentally demonstrated [22,23]. The recent cascade-type proportional current and voltage controller systematically adopts nonlinear DOBs in the feed-forward loop with a rigorous proof of the offset-free property without control error integral actions [24]. Moreover, DOB-based energy-shaping controllers solve the parameter and load uncertainty problem by solving a partial differential equation, which ensures the removal of the steady-state error caused by the DOB dynamics. Model predictive control (MPC) has been proposed as a solution to the numerical solver dependence problem, which requires the true converter parameter and load information to ensure closed-loop optimality [25,26]. The analytic form self-tuner was incorporated into a DOB-based proportional-type outer loop controller to achieve a dynamic cut-off frequency [27]. For this technique, the constant inner loop cut-off frequency must be sufficiently increased to achieve the desired closed-loop performance. The voltage-derivative observer-based nonlinear PD controller removes the current feedback loop and solves the converter parameter and load dependence problem in the control and observer [28].
According to the literature review, the constant current-loop cut-off frequency assigned by the feedback gain must increase proportionally to the output voltage loop cut-off frequency to improve the transient dynamic performance, which is desirable only for the transient operations and can increase current ripple level and limit the closed-loop relative stability. The so-called “constant current cut-off frequency problem” corresponds to the main challenge faced by this study. This paper proposes a solution to this problem based on the following contributions:
  • An online auto-tuner for the current cut-off frequency to be dynamically updated according to the transient and steady state operation mode;
  • A DOB-based pole-zero cancellation current controller driven by the dynamic current cut-off frequency from the online auto-tuner;
  • An active damping outer loop speed controller leading to a first-order closed-loop system with time-varying disturbance suppression capability by the active damping coefficient.
Convergence analysis is also carried out to highlight the contributions by investigating the closed-loop dynamics. A 3-kW DC/DC buck converter is used in the experiments to demonstrate that the proposed solution addresses the constant current cut-off frequency problem based on the dynamic current cut-off frequency from the online auto-tuner. The qualitative comparison results obtained by the above-mentioned studies are summarized in the table in Figure 1.

2. DC/DC Buck Converter Model

This study considers the standard DC/DC buck converter depicted in Figure 2, where the inductor current i c (in A) and output voltage v d c (in V) are the state variables excited by the duty ratio u ( [ 0 , 1 ] ) (control input) applied to the switching device (MOSFET). The input source voltage and load current are represented as v s (in V) and i L o a d (in A), respectively. The application of the averaging technique to the circuit dynamics obtained from each switching state (ON and OFF) yields the second-order differential equations:
L i ˙ c = v d c + v s u ,
C v ˙ d c = i c + i L o a d , t 0 ,
with L and C denoting the inductance and capacitance values, respectively.
The operation mode uncertainty validates the assumption stating that the true values of L and C and the load current i L o a d are unknown. Moreover, to reduce the number of sensors, the uncertainty of the input source voltage v s is also considered, except for its initial value v s , 0 . Thus, the introduction of the nominal values L 0 and C 0 results in another version of the original converter dynamics (1) and (2):
L 0 i ˙ c = v d c + v s , 0 u + d ¯ i c ,
C 0 v ˙ d c = i c + d v d c , t 0 ,
with the lumped disturbances d ¯ i c and d v d c to be treated as unknown time-varying signals, which are used to design the control law in the following sections. Notably, the equivalent series resistance (ESR) of the inductor and capacitor are also included in the perturbed disturbances d i c and d v d c .

3. Proposed Control Algorithm

This section presents the cascade-type solution proposed for actual implementations as clearly as possible. The main results discussed in this section are presented in Figure 3. Section 3.1 and Section 3.2 give the corresponding detailed subsystem descriptions. The closed-loop analysis results are included in Section 4.
Before presenting the control algorithm, it is necessary to clarify the control objective of this study. Consider the desired output voltage trajectory v d c , d e s for a given reference v d c , r e f with the Laplace transformations V d c , d e s ( s ) and V d c , r e f ( s ) , and define the target closed-loop transfer function as
V d c , d e s ( s ) V d c , r e f ( s ) = λ v c s + λ v c , s C ,
with the output voltage cut-off frequency λ v c = 2 π f v c ( λ v c in rad/s, corresponding to f v c in Hz). Based on the desired system (5), the control objective is formulated as exponential convergence:
lim t v d c = v d c , d e s ,
where v d c , d e s denotes the inverse Laplace transform for the target system (5):
v ˙ d c , d e s = λ v c ( v d c , r e f v d c , d e s ) , t 0 .

3.1. Inner Loop for Current Control

3.1.1. Current Cut-off Frequency Auto-Tuner

For a given current reference i c , r e f from the outer loop, define the target current dynamics as
i ˙ c , d e s = λ c c ( i c , r e f i c , d e s ) , t 0 ,
with the current cut-off frequency λ c c = 2 π f c c ( λ c c in rad/s corresponding to f c c in Hz); its transfer function is identical to (5) with the replacement λ v c with λ c c . For a rapid output voltage transient response, the current cut-off frequency λ c c must to be proportional to the increase in λ v c .
To boost the current cut-off frequency only during transient periods, a slight modification of the target current dynamics (8) with a dynamic current cut-off frequency λ ^ c c is suggested as
i ˙ c , d e s = λ ^ c c ( i c , r e f i c , d e s ) , t 0 ,
with the auto-tuning rule for λ ^ c c :
λ ^ ˙ c c = γ c c ( i ˜ c , d e s 2 + σ c c λ ˜ c c ) , t 0 ,
with the errors defined as i ˜ c , d e s = i c , r e f i c , d e s and λ ˜ c c = λ c c λ ^ c c , gains γ c c > 0 and σ c c > 0 , and initial condition λ ^ c c ( 0 ) = λ c c .
Remark 1.
The nonlinear error term i ˜ c , d e s 2 excites the dynamic current cut-off frequency λ ^ c c whose boosting level is adjusted by γ c c > 0 , and the stabilization term λ ˜ c c exponentially restores the boosted cut-off frequency to its initial value λ ^ c c ( 0 ) = λ c c according to the decay rate ρ c c > 0 . The corresponding formal analysis is presented in Section 4.

3.1.2. Control Law

The error Δ i c = i c , d e s i c is defined to accomplish the convergence lim t i c = i c , d e s with i c , d e s representing the solution to the desired system (9). Then, it follows from (3) that
L 0 Δ i ˙ c = L 0 i ˙ c , d e s L 0 i ˙ c = v s , 0 u + d i c , t 0 ,
with the re-defined lumped disturbance d i c = L 0 i ˙ c , d e s + v d c d ¯ i c . This study proposes the control law for stabilizing the open-loop system (11) as
u = 1 v s , 0 ( ( b d L + L 0 k c c ) Δ i c + b d L k c c 0 t Δ i c d τ + d ^ i c ) ,
t 0 , with gains b d L > 0 and k c c > 0 , where the DOB for updating d ^ i c is given by
z ˙ i c = l i c z i c l i c 2 L 0 Δ i c + l i c v s , 0 u ,
d ^ i c = z i c + l i c L 0 Δ i c , t 0 ,
with gain l i c > 0 .
This study introduces the structured feedback gain structure in (12) to improve the inner loop current control accuracy through closed-loop order reduction caused by pole-zero cancellation. Further details are given in Section 4.

3.2. Outer Loop for Voltage Control

Consider an equivalent form for the output voltage dynamics (4):
C 0 v ˙ d c = i c , r e f i ˜ c + d v d c , t 0 ,
with the error defined as i ˜ c = i c , r e f i c ; its control variable i c , r e f (current reference) is designed to stabilize the error v ˜ d c = v d c , r e f v d c :
i c , r e f = b d v v d c + C 0 λ v c v ˜ d c + b d v λ v c 0 t v ˜ d c d τ , t 0 ,
with gain b d v > 0 . The stabilization action tries to ensure the exponential convergence lim t v d c = v d c , d e s by adding artificial damping ( b d v v d c ) to the closed-loop. This results in pole-zero cancellation, with the collaboration of the particularly structured feedback gain structure. A detailed analysis of this statement is presented in Section 4.

4. Closed Loop Analysis

This section begins with the inner loop analysis (Section 4.2) carried out to analyze the entire closed-loop system (Section 4.2).

4.1. Inner Loop

Lemmas 1–3 investigate the subsystem dynamics acting on the dynamic cut-off frequency update and disturbance estimation mechanisms in the inner loop.
Lemma 1.
The auto-tuner (10) ensures the existence of a minimum dynamic cut-off frequency with an initial value λ ^ c c ( 0 ) = λ c c . i.e.,
λ ^ c c λ c c , t 0 .
Proof. 
Integration on both side of the auto-tuner (10) yields
λ ^ c c = e γ c c σ c c t λ c c + 0 t e γ c c σ c c ( t τ ) ( γ c c σ c c λ c c + γ c c i ˜ c , d e s 2 ) d τ ,
which is bounded from below by λ ^ c c , owing to the positivity of γ c c σ c c λ c c + γ c c i ˜ c , d e s 2 . □
As mentioned in Remark 1, the stability issue for the dynamic cut-off frequency update mechanism (9) and (10) originates from the nonlinear excitation term i ˜ c , d e s 2 in (10), which is addressed in Lemma 2 with the dynamic cut-off frequency magnification characteristics (17).
Lemma 2.
The target system (9) with the dynamic cut-off frequency driven by (10) ensures the two boundedness properties. For a dynamic cut-off frequency:
| λ ^ c c | < , t 0 ,
For the target current trajectory:
| i ˜ c , d e s | a 1 e a 2 t , t 0 , | i ˜ c , d e s | 2 μ i c , r e f λ ^ c c ,
for some a i > 0 , i = 1 , 2 , where | i ˙ c , r e f | μ i c , r e f , t 0 .
Proof. 
It follows from the errors i ˜ c , d e s = i c , r e f i c , d e s and λ ˜ c c = λ c c λ ^ c c and relationships (9) and (10) that
i ˜ ˙ c , d e s = λ c c 2 i ˜ c , d e s + λ ˜ c c 2 i ˜ c , d e s λ ^ c c 2 i ˜ c , d e s + i ˙ c , r e f , λ ˜ ˙ c c = γ c c ( i ˜ c , d e s 2 + σ c c λ ˜ c c ) , t 0 .
Thus, the positive definite function V A T = 1 2 i ˜ c , d e s 2 + 1 4 γ c c λ ˜ c c 2 can be written as
V ˙ A T = i ˜ c , d e s ( λ c c 2 i ˜ c , d e s + λ ˜ c c 2 i ˜ c , d e s ) + i ˜ c , d e s ( λ ^ c c 2 i ˜ c , d e s + i ˙ c , r e f ) λ ˜ c c 2 ( i ˜ c , d e s 2 + σ c c λ ˜ c c ) λ c c 2 i ˜ c , d e s 2 σ c c 2 λ ˜ c c 2 ( λ ^ c c 2 μ i c , r e f | i ˜ c , d e s | ) i ˜ c , d e s 2 α A T V A T , t 0 , | i ˜ c , d e s | 2 μ i c , r e f λ ^ c c ,
with α A T = min { λ c c , 2 σ c c λ c c } . This completes the proof based on the comparison principle in [29]. □
The results of Lemma 2 address the stability issue of the dynamic cut-off frequency update mechanism (9) and (10) with the positive definite function V A T . Considering the inequality (18), one can roughly conclude that lim t i c , d e s = i c , r e f , because the dynamic cut-off frequency magnification property (17) leads to 2 μ i c , r e f λ ^ c c 0 for some gain setting γ c c > 0 and σ c c > 0 .
The DOB dynamics (13) do not explicitly describe the disturbance estimation behavior, and their ambiguity can be clarified with additional analysis based on combining their output with the dynamic Equations (13) and (14). See Lemma 3 for details.
Lemma 3.
The DOB (13) and (14) estimate the lumped disturbance in accordance with the LPF dynamics:
d ^ ˙ i c = l i c ( d i c d ^ i c ) , t 0 .
Proof. 
By using the DOB dynamics (13), the DOB output (14) yields its dynamical relationship:
d ^ ˙ i c = z ˙ i c + l i c L 0 Δ i ˙ c = l i c ( d ^ i c l i c L 0 Δ i c ) l i c 2 L 0 Δ i c + l i c v s , 0 u + l i c L 0 Δ i ˙ c = l i c ( L 0 Δ i ˙ c + v s , 0 u d ^ i c ) = l i c ( d i c d ^ i c ) , t 0 ,
where the relationship (11) confirms the last equation. This completes the proof. □
The resultant dynamics (19) provide the error dynamics:
d ˜ ˙ i c = l i c d ˜ i c + d ˙ i c , t 0 ,
with d ˜ i c = d i c d ^ i c and | d ˙ i c | ϵ i c , t 0 , as will be considered in the subsequent analysis.
Before analyzing the controlled current error ( Δ i c ), Lemma 4 derives the closed-loop order reduction capability of the structured feedback gain structure, which leads to pole-zero cancellation. The dummy signal r = 0 (hence r ˙ = 0 ) is introduced in this analysis. See Lemma 4 for details.
Lemma 4.
The proposed controller (12) drives the current error Δ i c to satisfy
Δ i ˙ c = k c c Δ i c + 1 L 0 d ˜ i c + d ˜ i c , F ,
with the filtered signal d ˜ i c , F
d ˜ ˙ i c , F = a 1 d ˜ i c , F a 2 d ˜ i c , t 0 ,
for some a i > 0 , i = 1 , 2 .
Proof. 
After substituting (12) into (11), the additional derivative on both sides yields
L 0 Δ i ¨ c = b d L Δ i ˙ c + L 0 k c c ( r ˙ Δ i ˙ c ) + b d L k c c ( r Δ i c ) + d ˜ ˙ i c , t 0 ,
with the Laplace transform:
( L 0 s 2 + ( b d L + L 0 k c c ) s + b d L k c c ) Δ I c ( s ) = k c c ( L 0 s + b d L ) R ( s ) + s D ˜ i c ( s ) , s C ,
which shows that (after factorization ( s + k c c ) ( L 0 s + b d L ) = L 0 s 2 + ( b d L + L 0 k c c ) s + b d L k c c )
( s + k c c ) Δ I c ( s ) = k c c R ( s ) + 1 L 0 D ˜ i c ( s ) + D ˜ i c , F ( s ) ,
with D ˜ i c , F ( s ) = b d L L 0 2 s + b d L L 0 D ˜ i c ( s ) , s C . This completes the proof. □
Theorem 1 analyzes the convergence behavior of the controlled current error ( Δ i c = i c , d e s i c ) with a combination of closed-loop error trajectories from systems (20)–(22).
Theorem 1.
The closed-loop system depicted in Figure 3 ensures
| Δ i c | b 1 e b 2 t , t 0 , | d ˜ i c | 2 ϵ i c l i c ,
for some c i > 0 , i = 1 , 2 .
Proof. 
Defining the vector x c = Δ i c d ˜ i c , F d ˜ i c T , it follows from V Δ i c = 1 2 x c 2 , (20)–(22) that
V ˙ Δ i c Δ i c ( k c c Δ i c + 1 L 0 d ˜ i c + d ˜ i c , F ) + d ˜ i c , F ( a 1 d ˜ i c , F a 2 d ˜ i c ) l i c 2 d ˜ i c 2 ( l i c 2 ϵ i c | d ˜ i c | ) d ˜ i c 2 α Δ i c V Δ i c , t 0 , | d ˜ i c | 2 ϵ i c l i c ,
with α Δ i c = 2 λ m i n ( Q Δ i c ) and the positive definite matrix Q Δ i c = k c c 1 1 L 0 0 a 1 a 2 0 0 l i c 2 . This completes the proof based on the comparison principle in [29]. □
The inner loop control objective accomplishment is confirmed with Theorem 1 by roughly showing the convergence lim t i c = i c , d e s with the DOB gain setting: 2 ϵ i c l i c 0 (see the inequality (23)). However, there is still ambiguity with regard to the actual current error convergence lim t i c = i c , r e f , which is used to prove the entire closed-loop convergence lim t v d c = v d c , r e f . Theorem 2 addresses this issue based on the analysis results of Theorem 1 and Lemmas 1 and 4.
Theorem 2.
The closed-loop system depicted in Figure 3 guarantees
| i ˜ c | c 1 e c 2 t , t 0 , | i ˜ c | 2 μ i c , r e f λ ^ c c ,
for some c i > 0 , i = 1 , 2 , where | i ˙ c , r e f | μ i c , r e f , t 0 .
Proof. 
The current error i ˜ c satisfying i ˜ c = i ˜ c , d e s + Δ i c gives its dynamics (using (9) and (21)):
i ˜ ˙ c = λ ^ c c i ˜ c , d e s + i ˙ c , r e f k c c Δ i c + 1 L 0 d ˜ i c + d ˜ i c , F = λ ^ c c i ˜ c + c T x c + i ˙ c , r e f , t 0 ,
with c = ( λ ^ c c k c c ) 1 1 L 0 T , which makes the composite-type Lyapunov function candidate V c = 1 2 i ˜ c 2 + η V Δ i c become:
V ˙ c = i ˜ c ( λ ^ c c 2 i ˜ c + c T x c ) i ˜ c ( λ ^ c c 2 i ˜ c i ˙ c , r e f ) + η V ˙ Δ i c λ c c 4 i ˜ c 2 ( η α Δ i c 2 c ¯ 2 λ c c ) V Δ i c ( λ ^ c c 2 μ i c , r e f | i ˜ c | ) i ˜ c 2 ,
t 0 ; the dynamic cut-off frequency that lowers the boundedness (proven in Lemma 1) and the inequality (24) are used to obtain the inequality, and c c ¯ , t 0 . The constant η = 1 α Δ i c ( 2 c ¯ 2 λ c c + 1 ) yields the upper bound of V ˙ c :
V ˙ c α c V c , t 0 , | i ˜ c | 2 μ i c , r e f λ ^ c c , t 0 ,
where α c = min { λ c c 2 , 1 η } . This completes the proof based on the comparison principle in [29]. □
The boosting nature of the cut-off frequency ( λ ^ c c λ c c , t 0 ) in Lemma 1 provides the rationale for assuming that 2 μ i c , r e f λ ^ c c 0 by tuning the auto-tuner parameters γ c c and σ c c such that V ˙ c α c V c , t 0 . This is used in subsequent analysis. Figure 4 visualizes the reasoning process of the inner loop analysis.

4.2. Entire Loop

Before the convergence analysis of the entire closed-loop (to show that lim t v d c = v d c , d e s ), Lemma 5 derives the closed-loop order reduction caused by the collaboration between the active damping injection and the structured feedback gain structure, which leads to pole-zero cancellation. See Lemma 5 for details.
Lemma 5.
The proposed outer loop controller (16) drives the output voltage to satisfy
v ˙ d c = λ v c ( v d c , r e f v d c ) 1 C 0 i ˜ c + i ˜ c , F + f F ,
with the filtered signals
i ˜ ˙ c , F = δ 1 i ˜ c , F + δ 2 i ˜ c , f ˙ F = b d v C 0 f F + 1 C 0 f , t 0 ,
for some δ i > 0 , i = 1 , 2 .
Proof. 
After substituting the outer loop control law (16) into the output voltage dynamics (15), the additional derivative operation on both sides gives
C 0 v ¨ d c = ( b d v + C 0 λ v c ) v ˙ d c b d v λ v c v d c + C 0 λ v c v ˙ d c , r e f + b d v λ v c v d c , r e f i ˜ ˙ c + f ,
t 0 , with f = Δ d ˙ v d c denoting the time-varying rate of the AC component of disturbance d v d c = d v d c , 0 + Δ d v d c , which leads to d ˙ v d c = f . The corresponding Laplace transform results in
( C 0 s 2 + ( b d v + C 0 λ v c ) s + b d v λ v c ) V d c ( s ) = λ v c ( C 0 s + b d v ) V d c , r e f ( s ) s I ˜ c ( s ) + F ( s ) , s C ,
its equivalent form can be obtained based on pole-zero cancellation from the factorization ( C 0 s 2 + ( b d v + C 0 λ v c ) s + b d v λ v c ) = ( C 0 s + b d v ) ( s + λ v c ) :
( s + λ v c ) V d c ( s ) = λ v c V d c , r e f ( s ) 1 C 0 I ˜ c ( s ) + I ˜ c , F ( s ) + F F ( s ) , s C ,
with I ˜ c , F ( s ) = b d v C 0 2 s + b d v C 0 I ˜ c ( s ) and F F ( s ) = 1 C 0 s + b d v C 0 F ( s ) . The application of the inverse Laplace transform to both sides completes the proof. □
Finally, Theorem 3 provides an essential closed-loop property showing the control objective accomplishment. The two results of Lemma 5 and inequality V ˙ c α c V c , t 0 , (obtained from Theorem 2) play an essential role in proving this theorem.
Theorem 3.
The closed-loop system depicted in Figure 3 guarantees that
| Δ v d c | q 1 e q 2 t , t 0 , | f F | 2 f ¯ b d v ,
for some q i > 0 , i = 1 , 2 , where | f | f ¯ , t 0 .
Proof. 
Defining the error Δ v d c = v d c , d e s v d c , it holds that
Δ v ˙ d c = λ v c Δ v d c + 1 C 0 i ˜ c i ˜ c , F f F , t 0 ,
with the use of (26) and considering a composite-type Lyapunov function candidate for vector x v = Δ v d c i ˜ c , F f F T :
V v = 1 2 x v T P v x v + ζ V c , ζ > 0 , t 0 ,
with P v = diag { 1 , 1 , C 0 } ; its time derivative is given by (with (25), (27), and (28)):
V ˙ v = Δ v d c ( λ v c Δ v d c + 1 C 0 i ˜ c i ˜ c , F f F ) + i ˜ c , F ( δ 1 i ˜ c , F + δ 2 i ˜ c ) + f F ( b d v f F + f ) + ζ V ˙ c x v T Q v x v ( ζ α c 1 λ v c C 0 2 δ 2 2 δ 1 ) V c ( b d v 2 f ¯ | f F | ) f F 2 , t 0 ,
where Q v = λ v c 2 1 1 0 δ 1 2 0 0 0 b d v 2 and | f | f ¯ , t 0 . The coefficient ζ = 1 α c ( 1 λ v c C 0 2 + δ 2 2 δ 1 + 1 ) leads to
V ˙ v x v T Q v x v V c α v V v , t 0 , | f F | 2 f ¯ b d v ,
with α v = min { 2 λ m i n ( Q v ) λ m a x ( P v ) , 1 ζ } . This completes the proof based on the comparison principle in [29]. □
Theorem 3 roughly concludes that the proposed controller accomplishes the control objective (6) ( lim t v d c = v d c , d e s , exponentially, with the solution v d c , d e s to the desired system (7)) by setting the active damping coefficient b d v to satisfy 2 f ¯ b d v 0 such that V ˙ v α v V v , t 0 . The reasoning process for the inner loop analysis is visualized in Figure 5.

5. Experimental Results

Figure 6 presents the 3-kW bi-directional DC/DC converter testbed used to verify the feasibility of the proposed solution; A Texas Instrument (TI) digital signal processor (TI DSP28377) was used for feedback control at the constant input DC voltage level v s = 100 V (provided by the DC power supply) with the sampling and PWM periods of 0.1 ms. The inductor and output capacitor values were identified L = 1 mH and C = 700 µF. To consider the model-plant mismatch causing the lumped disturbances, their nominal values L 0 = 0.75 L and C 0 = 1.35 C were used for the implementation of the control law. A resistive load of R L = 20 Ω was initially connected to the output port to implement the load of the converter.
The inner and outer loops controlled by the proposed controller were tuned as: (inner loop) f c c = 5 Hz ( λ c c = 2 π f c c = 31.4 rad/s), γ c c = 1000 , σ c c = 5000 / γ c c , k c c = 5000 , b d , L = 0.1 , l i c = 1200 , (outer loop) f v c = 5 Hz ( λ v c = 2 π f v c = 31.4 rad/s), and b d , v = 3 .
A comparative investigation was conducted by replacing the proposed controller with a conventional PI controller reinforced by a DOB and the active damping term: (control) u = 1 v s , 0 ( k d , L i L + L 0 λ c c i ˜ c + k d , L λ c c 0 t i ˜ c d τ d ^ L ) , (DOB) z ˙ L = l i c z L l i c 2 L 0 i c l i c v s , 0 u , and d ^ L = z L + l i c L 0 i c . The design parameters are identical to those in the proposed solution.

5.1. Piece-Wise Constant Reference Tracking Mode

The initial output voltage reference v d c , r e f = 50 V was increased and decreased to 70 and 30 V in a sequential manner with an initial resistive load R L = 20 Ω . Figure 7 shows the controlled output voltages obtained using the proposed and conventional techniques. Unlike the conventional controller, the proposed controller successfully drives the output voltage to its reference value without any over/undershoots. Moreover, the proposed controller successfully assigns the desired tracking behavior to the resultant feedback system in accordance with the performance (5) achieved with the increased output voltage cut-off frequencies f v c = 5 , 15, and 30 Hz. The exponential convergence (6) (proven by Theorem 3) and nature of the current-loop cut-off frequency boosting (resulting in V ˙ c α c V c < 0 proven by Theorem 2) provide this advantage without the drawback of performance degradation. Notably, the advantage originates from the dynamic current cut-off frequency (boosting and restoration) presented on the right side of Figure 8. As expected, the proposed controller removes the unnecessary current oscillation and reduces the current overshoot level, as shown in Figure 9. The DOB responses are presented on the left side of Figure 8.

5.2. Constant Reference Regulation Mode

5.2.1. Transient Performance Comparison

This stage demonstrates the constant reference regulation performance at the output voltage level of 50 V with an abrupt variation in the resistive load (decreasing to R L = 4 Ω and restoring to R L = 20 Ω ). The three output voltage cut-off frequencies f v c = 5 , 15, and 30 Hz were applied to clarify the advantages of the proposed controller. As shown in Figure 10, the proposed controller can effectively attenuate the over/undershoot level and the performance deviations caused by the variation of the operating conditions. The removal of the current oscillation and overshoot can also be observed in Figure 11. As intended, the collaboration of two beneficial properties, namely, the cut-off frequency magnification (Lemma 1) and exponential current convergence (Theorem 1), resulted in this beneficial feature.

5.2.2. Steady-State Behavior Comparison

This stage shows the current ripple reduction effect from the proposed current cut-off frequency auto-tuner at the same operating mode of the previous subsection, except for the constant cut-off frequency for the conventional DOB-based controller. To secure the improved closed-loop performance, the current cut-off frequency (fixed) for the conventional controller was increased from its initial setting f c c = 5 to 190 Hz that is equal to the peak value of the dynamic current cut-off frequency shown in Figure 12. As presented in Figure 13, the increased current cut-off frequency successfully attenuates the over/undershoots but it involves the current ripple magnification in the steady-state operation unlike the proposed controller. The dynamic current cut-off frequency behavior shown in Figure 12 offers this beneficial current ripple reduction characteristics increasing the power efficiency for a long term operation.

5.3. Discussion

5.3.1. Computational Time

The proposed controller comprising novel subsystems, such as the auto-tuner (10) and target dynamics (9), requires additional computational time compared with that of the conventional DOB controller used for the comparison study in this section. To confirm this, the execution time for these two controllers was determined for 3000 randomly generated 3000 reference signals using the DSP28377, based on the pulse length for the whole control algorithm code. The proposed and conventional DOB controllers elapsed 33.87 and 30.75 µs, respectively, on an average. This implies that only additional 10 % of computational time is required for the proposed controller compared with that of the conventional DOB controller. On the basis of these comparisons for the performance and computational complexity, the proposed controller can be considered as an alternative to previous solutions without the need for additional hardware (compared with the full-state feedback results) under the use of 32-bit DSPs.

5.3.2. Quantitative Comparison

Section 5.1 and Section 5.2 present the qualitative differences between the closed-loop responses. To clarify the performance improvement, the metric function is adopted regarding the output voltage error integration during the operation time (for both the tracking and regulation modes), which is given by J c l : = 0 | v d c , r e f v d c | 2 d t . The table in Figure 14 presents the comparison result with the proposed technique achieving a 34 % performance enhancement owing to its improved controller structure and novel inner loop subsystems (leading to the beneficial closed-loop properties in Section 4).

6. Conclusions

This study developed a cascade-type output voltage controller governed by the dynamic current cut-off frequency from a real-time auto-tuner. The outer loop employs an active damping term to suppress the disturbance level and invokes closed-loop order reduction with pole-zero cancellation, which is provided by the particular design of the feedback gain structure. A significant admissible output voltage cut-off frequency range expansion caused by the dynamic current cut-off frequency behavior was observed in the experimental investigation. There are two future research branches: first, the expansions of the proposed solution to the multi-phase converter and multi-converter power synchronization applications and, second, the development of a systematic tuning factor design criteria through an optimization problem formulation subject to the linear/bi-linear matrix inequality(LMI/BMI) constraints.

Author Contributions

Conceptualization and methodology, S.-K.K.; software, validation, formal analysis, investigation, writing—original draft preparation, and writing—review and editing, S.L. and Y.K.; resources, supervision, project administration, and funding acquisition, Y.K. All authors have read and agreed to the published version of the manuscript.

Funding

This research was supported in part by the National Research Foundation of Korea (NRF) grant funded by the Korea government (Ministry of Science and ICT) (No. NRF-2021R1C1C1004380), was supported in part by the Technology Innovation Program(No. 2009316 and 20009552) funded By the Ministry of Trade, Industry & Energy(MOTIE, Korea), and was supported in part by Korea Agency for Infrastructure Technology Advancement (KAIA) funded by the Ministry of Land, Infrastructure and Transport (No. TL21HBST-B158067-01).

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Data sharing not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Qualitative comparison results.
Figure 1. Qualitative comparison results.
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Figure 2. DC/DC buck converter topology.
Figure 2. DC/DC buck converter topology.
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Figure 3. Proposed structure of cascade-type control system.
Figure 3. Proposed structure of cascade-type control system.
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Figure 4. Inner loop analysis.
Figure 4. Inner loop analysis.
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Figure 5. Result of entire loop analysis.
Figure 5. Result of entire loop analysis.
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Figure 6. Prototype 3-kW DC/DC power conversion hardware testbed.
Figure 6. Prototype 3-kW DC/DC power conversion hardware testbed.
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Figure 7. Comparison of output voltage control performance at f v c = 5 , 15, and 30 Hz, and pulse reference tracking mode of R L = 20 Ω .
Figure 7. Comparison of output voltage control performance at f v c = 5 , 15, and 30 Hz, and pulse reference tracking mode of R L = 20 Ω .
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Figure 8. DOB and auto-tuner responses at f v c = 5 , 15, and 30 Hz, and pulse reference tracking mode of R L = 20 Ω .
Figure 8. DOB and auto-tuner responses at f v c = 5 , 15, and 30 Hz, and pulse reference tracking mode of R L = 20 Ω .
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Figure 9. Inductor current response comparison at f v c = 5 , 15, and 30 Hz and pulse reference tracking mode of R L = 20 Ω .
Figure 9. Inductor current response comparison at f v c = 5 , 15, and 30 Hz and pulse reference tracking mode of R L = 20 Ω .
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Figure 10. Output voltage control performance comparison at f v c = 5 , 15, and 30 Hz, and constant reference regulation mode of v d c , r e f = 50 V.
Figure 10. Output voltage control performance comparison at f v c = 5 , 15, and 30 Hz, and constant reference regulation mode of v d c , r e f = 50 V.
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Figure 11. Inductor current response comparison at f v c = 5 , 15, and 30 Hz, and constant reference regulation mode of v d c , r e f = 50 V.
Figure 11. Inductor current response comparison at f v c = 5 , 15, and 30 Hz, and constant reference regulation mode of v d c , r e f = 50 V.
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Figure 12. Auto-tuner responses at f v c = 5 , 15, and 30 Hz, and pulse reference tracking mode of R L = 20 Ω .
Figure 12. Auto-tuner responses at f v c = 5 , 15, and 30 Hz, and pulse reference tracking mode of R L = 20 Ω .
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Figure 13. Output voltage and inductor current ripple level comparison at f v c = 30 Hz and constant reference regulation mode of v d c , r e f = 50 V.
Figure 13. Output voltage and inductor current ripple level comparison at f v c = 30 Hz and constant reference regulation mode of v d c , r e f = 50 V.
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Figure 14. Performance comparison result for tracking and regulation tasks.
Figure 14. Performance comparison result for tracking and regulation tasks.
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Lim, S.; Kim, S.-K.; Kim, Y. Active Damping Injection Output Voltage Control with Dynamic Current Cut-Off Frequency for DC/DC Buck Converters. Energies 2021, 14, 6848. https://doi.org/10.3390/en14206848

AMA Style

Lim S, Kim S-K, Kim Y. Active Damping Injection Output Voltage Control with Dynamic Current Cut-Off Frequency for DC/DC Buck Converters. Energies. 2021; 14(20):6848. https://doi.org/10.3390/en14206848

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Lim, Sun, Seok-Kyoon Kim, and Yonghun Kim. 2021. "Active Damping Injection Output Voltage Control with Dynamic Current Cut-Off Frequency for DC/DC Buck Converters" Energies 14, no. 20: 6848. https://doi.org/10.3390/en14206848

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