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Multivariable Deadbeat Control of Power Electronics Converters with Fast Dynamic Response and Fixed Switching Frequency

Department of Electrical and Electronic Engineering, Universidad Del Bío-Bío, Avenida Collao 1202, 4051381 Concepción, Chile
Department of Electrical and Electronic Engineering, University Park, University of Nottingham, Nottingham NG7 2RD, UK
Department of Electrical Computer and Biomedical Engineering, University of Pavia, Via A. Ferrata 5, 27100 Pavia, Italy
Department of Electrical Engineering, Universidad de Talca, Camino Los Niches Km. 1, 3340000 Curicó, Chile
Department of Electrical Engineering, Universidad de Concepción, Victor Lamas 1290, 4070386 Concepción, Chile
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Energies 2021, 14(2), 313;
Received: 30 November 2020 / Revised: 24 December 2020 / Accepted: 5 January 2021 / Published: 8 January 2021
(This article belongs to the Special Issue Advances in Electric Drives and Power Electronics Fields)


Power converters have turned into a critical and every-day solution for electric power systems. In fact, the incorporation of renewable energies has led towards the constant improvement of power converter topologies and their controls. In this context, over the last 10 years, model predictive control (MPC) is positioned as one the most studied and promising alternatives for power converter control. In voltage source inverters (VSI), MPC has only been applied in the inner current control loop, accelerating and improving its dynamic response, but as mentioned, has been limited only to the current control loop. The fastest of the MPC techniques is the Deadbeat (DB) control, and in this paper, it is proposed to employ DB control on the entire system, therefore accelerating the time response not only for the current loops, but also for voltage loops. At the same time, this avoids overshoots and overpower in order to protect the power converter, leading to the fastest dynamic response according to VSI capabilities. For renewable energies, fast-dynamics entails fast maximum power tracking and therefore, maximizes energy harvesting, or in other words, reduces the losses due to the control dynamics. Thus, this paper gives a clear procedure and key points for designing a DB control for all the variables based on a mathematical model, which is corroborated by simulations and the experimental results.

1. Introduction

Predictive control has been gaining increasing interest over the past ten years, in both research and industrial environments in the control of power electronics systems. The predictive control family includes trajectory-based and hysteresis-based control strategies, Model Predictive Control (MPC), and Deadbeat (DB) control. MPC is a strong and refined way to regulate the system dynamics subject to physical constraints [1]. It uses a mathematical model to estimate the evolution of system state variables in the future for several different control actions. The optimal control action is then selected by minimization of a cost function. Conventionally, the minimization of cost function needs to be performed at each sample time [1,2], resulting in a computationally demanding procedure to be computed in real time. Hence, more recent solutions involve the MPC problem being reformulated as a multi-parametric algorithm solved offline for all valid states, entailing a lookup table for the optimal solution depending upon the current actual value [3,4,5,6,7]. Due to there being an intrinsic finite set of valid states of power converter that can be applied, an MPC variation, appropriately named Finite Control Set MPC (FCS-MPC), has started to be widely employed [8,9,10]. In this strategy, several system state predictions are made for a finite series of control actions. The action which results in the minimization of a performance cost function is considered optimal and is thus applied to the converter. Thanks to the numerous benefits it can provide, such as the absence of a modulation technique, fast dynamic response, and easy enclosure of the system nonlinearities and constraints, this method has been successfully applied to several different power converter topologies, such as shunt active filters [11,12], matrix converters [13,14], and drive systems [15]. However, applying a single vector at each sampling time entails a variable switching frequency, increasing the nondeterministic ripple on the output voltages and currents, and hindering the passive filter design.
The lack of a modulator has its drawbacks, even considering the transient time performance of the system. For instance, under steady-state conditions when high controller bandwidth is not mandatory, large current ripples are induced due to the limited set of available control actions. In order to overcome this issue, fixed switching frequency MPC algorithms have been researched and published in the past few years [16,17,18,19,20,21]. Although they improve the steady state performance, in terms of the state variables ripple, they fail to achieve the same steady state performance of a classical pulse width modulation (PWM) or Space Vector Modulator (SVM).
Deadbeat control is of particular interest because of its fast dynamic performance, which is able to impose zero error with respect the references in a short finite time, speeding up the transient response. Compared to FCS-MPC, DB mixes fast dynamic performance together with a constant switching frequency and minimum steady state distortion thanks to the presence of a modulator. Because of these reasons, the DB controller is more frequently chosen over other controllers in power converter applications such as Uninterruptible Power Supplies (UPS) [22,23,24], PWM rectifiers, active filter controls [25,26], motor drive controls [27,28,29,30], and paralleled converter configurations [31]. Some other techniques also accelerate the dynamic behavior, where one of the most known methods is sliding mode control, which is capable of managing the inner loops with fast dynamic response, as shown in [32]. In fact, the time response can be specified considering a given initial condition; however, this technique has also been included for the inner control loop (current or power control loop).
In all previous applications, DB control has been used to control a single variable (most commonly, the control of currents) or more variables at the same time, linking all controlled terms through a linear relationship. To the author’s knowledge, no work has appeared in the literature using DB control for the full control of all variables in a power converter. Thus, this paper innovates in the application of developing a DB controller which manages all the control variables for a given power converter. All variables are, therefore, provided with the advantages of this fast-dynamic control, as well as avoiding overshoot, which is typical in these kinds of applications [33,34,35].
This paper therefore proposes a multivariable DB control for power electronics converters in order to regulate all system variables in a single predictive loop, from ac currents, to the dc voltage, and the active and reactive powers, [35,36,37,38]. As a case study, the full control of a standard three-phase grid connected converter has been chosen to demonstrate the proposed control approach and to validate its performance. Complementary to that presented in the literature [15,22,24,25,28,30,31,33,34,35,39,40], this multivariable DB control is designed to maximize all the dynamic responses and to ensure an excellent steady state behavior, whilst still maintaining the system variables within clear limits, to ensure the proper operation of the converter [41]. Fast-dynamics are of particular interest for renewable energies because they can reach the maximum power point faster and therefore, maximize the harvesting energy; in general, faster control on the power converter gives a degree of freedom for users when needed.
The final algorithm shall be shown to be simple and easy to implement and does not necessitate major computational requirements. Finally, the simulations and experimental results show the effectiveness and feasibility of the proposed control algorithm, corroborating the theoretical development.

2. System Modelling

2.1. Continuous Static Reference Frame Model

Considering the power converter diagram illustrated in Figure 1, modeling in the abc reference frame results in the following expression:
v s a b c = L s d i s a b c d t + R s i s a b c + v o a b c
Meanwhile, on the dc link side:
C d c d v d c d t = i s d c i L d c
where Ls and Rs are the inductor and resistor at the converter ac side and Cdc is the capacitor at the dc side. Furthermore, the power converter voltage related to the switches’ states is:
v o a b c = s a b c v d c
The dc side current is given by:
i s d c = s a b c , i s a b c
where , denotes the dot product and sabc represent the converter switching functions
The model can then be expressed in the αβ reference frame as:
v s α β = L s d i s α β d t + R s i s α β + s α β v d c
C d c d v d c d t = s α β , i s α β i L d c

2.2. Discrete Static Reference Frame Model

The implementation of predictive control is tied to a discrete representation of the model, leading to the definition of the future values of the variables in a discrete way and as a function of system dynamics and parameters. The Forward Euler Approximation is one of the most employed discretization methods to find the equivalent model. Using this approximation, the power converter model can be defined in discrete time as:
v s α β ( k ) = L s i s α β ( k + 1 ) i s α β ( k ) T s + R s i s α β ( k ) + v o α β ( k )
C d c v d c ( k + 1 ) v d c ( k ) T s = s α β ( k ) , i s α β ( k ) i L d c ( k )

3. Predictive Control Strategy

Once the power converter behavior is described by discrete equations, further predictions may be performed in order to gain knowledge about the future values of the state variables as a function of the past and present states of the system.

3.1. Power Converter Voltage

Considering the converter voltage voabc, as the control actuating variable, it can be generated as a function of the desired future value of the currents. Together, the source currents isabc and voltages vsabc provide the total power consumption, which in turn sets the power factor and the amount of active power drained by the load.
From Equation (7), the converter input voltage is computed as a function of the input current and its one time step future prediction isαβ(k + 1), the parameters of the filter, and the sampling time Ts:
v o α β ( k ) = v s α β ( k ) L s i s α β ( k + 1 ) i s α β ( k ) T s R s i s α β ( k )
where isαβ (k + 1) is the power converter current reference, vsαβ(k) the supply voltage, and voαβ(k) the converter injected voltage; Rs and Ls are the filter parameters. However, due to processing delays, the voltage voαβ cannot be calculated and applied at the same time k. Therefore, time delay compensation is mandatory. Subsequently, the voltage in Equation (9) is to be expressed as:
v o α β ( k + 1 ) = v s α β ( k + 1 ) L s i s α β ( k + 2 ) i s α β ( k + 1 ) T s R s i s α β ( k + 1 )
where the known variables isαβ(k + 1), vsαβ(k + 1) can be estimated by using the following procedure.
The supply voltage obeys a rotating trajectory which can be predicted under the assumption of low amplitude and low frequency variation such that:
v ^ s α β ( k + 1 ) = e j 2 π f T s v s α β ( k ) v s α β ( k + 1 )
where the phasor v ^ s α β ( k + 1 ) is obtained as a function of the source frequency f and Ts, thus the estimation of the source voltage is found to be
v ^ s α β ( k + 1 ) = [ v s α ( k ) cos ( ω T s ) v s β ( k ) sin ( ω T s ) v s α ( k ) sin ( ω T s ) + v s β ( k ) cos ( ω T s ) ]
Additionally, the current at time k + 1 can be expressed from Equation (7) as:
i ^ s α β ( k + 1 ) = ( 1 T s R s L s ) i s α β ( k ) + ( T s L s ) ( v s α β ( k ) v o α β ( k ) )

3.2. Current References as a Function of the Power Reference

Active and reactive power, drawn by the converter from the grid, are chosen as targets for the deadbeat control. These power components can be managed by controlling the currents isabc and the voltages vsabc. In fact, the power consumed by the topology is given by:
s p q ( k ) = p s ( k ) + j q s ( k ) = v s α β ( k ) i s * α β ( k )
v s α β ( k ) = v s α ( k ) + j v s β ( k )
i s * α β ( k ) = i s α ( k ) j i s β ( k )
Therefore, the current references can be set to meet the power reference s p q r e f ( k ) = p s r e f ( k ) + j q s r e f ( k ) by using the following expressions:
i s α , r e f ( k ) = 1 | v s α β ( k ) | 2 Re { v s α β ( k ) s p q * r e f ( k ) }
i s β , r e f ( k ) = 1 | v s α β ( k ) | 2 Im { v s α β ( k ) s p q * r e f ( k ) }
From Equation (10) it can be seen that the current reference needs to be forwarded by two sample periods. Therefore, Equations (17) and (18) need to also be computed two steps ahead, by replacing k by k + 2, as follows
i s α , r e f ( k + 2 ) = Re { v ^ s α β ( k + 2 ) s p q * r e f ( k + 2 ) } | v ^ s α β ( k + 2 ) | 2
i s β , r e f ( k ) = Im { v ^ s α β ( k + 2 ) s p q * r e f ( k + 2 ) } | v ^ s α β ( k + 2 ) | 2
where the estimation of the voltage vsabc(k + 2) can be found by assuming the frequency and amplitude as constant, as was mentioned in Equation (11), to find:
v ^ s α β ( k + 2 ) = [ v s α ( k ) cos ( 2 ω T s ) v s β ( k ) sin ( 2 ω T s ) v s α ( k ) sin ( 2 ω T s ) + v s β ( k ) cos ( 2 ω T s ) ]

3.3. Power Reference Calculation

The power reference is set in terms of active and reactive powers. The active power consumed by the power converter can be separated into three main parts:
dc load power consumption: This contribution represents what the power converter is supplying to the dc loads through the current iLdc. The related dc power is computed as:
p L ( k ) = v d c ( k ) i L d c ( k )
ac inductive filter losses: The filter included on the ac side has natural losses, associated to Rs, due to the non-ideality of the inductance, and can be calculated as:
p R L ( k ) = Re { ( v s α β ( k ) v o α β ( k ) ) i s * α β ( k ) } = | i s α β ( k ) | 2 R s
Power supplied to the dc capacitor: The dc link capacitor Cdc is charged/discharged in order to maintain the dc voltage to its reference. Therefore, this power is regulated by the dc voltage control. The energy on the dc capacitor at time t is given by:
e C d c ( t ) = 1 2 C d c ( v d c ( t ) ) 2
where the power can be found from Equation (24) deriving with respect to time as:
p C d c ( t ) = 1 2 C d c d ( v d c ( t ) ) 2 d t
Applying the Euler Approximation, the discretization of Equation (25) is given by:
p C d c ( k ) = 1 2 C d c ( v d c ( k + 1 ) ) 2 ( v d c ( k ) ) 2 T s
Therefore, the total amount of active power required by the power converter from the source, which represents the active power reference, is given by:
p s r e f ( k ) = p L ( k ) + p R L ( k ) + p C d c ( k )
However, the power reference is required to be at time k + 2, therefore all the terms in Equation (27) need to be considered two steps ahead; Equations (22), (23) and (26) therefore need to be recalculated at the sampling instant k + 2.
In order for Equation (22) to be approximated two steps ahead, vdc(k + 2) is required. An estimation of this voltage at k + 1 can be found solving Equation (8) as:
v ^ d c ( k + 1 ) = v d c ( k ) + T s C d c ( s α β ( k ) , i s α β ( k ) i L d c ( k ) )
The voltage vdc(k + 2) cannot be estimated from Equation (28) because this voltage would be based on the unknown switching states sαβ at time (k + 1), i.e., sαβ(k + 1). Thus, the estimation of the voltage vdc(k + 2) is obtained by interpolation as:
v ^ d c ( k + 2 ) = v ^ d c ( k + 1 ) + Δ v d c ( k + 1 )
with Δ v d c ( k + 1 ) = v ^ d c ( k + 1 ) v d c ( k ) .
On the other hand, as the current iLdc is considered as a disturbance and changes as a function of the load requirements, the estimation turns into a difficult task considering this as an uncertain future value. Therefore,
i L d c ( k + 2 ) i L d c ( k + 1 ) i L d c ( k )
Which, under any change on iLdc, will influence the control as a delay of two steps at most, with:
p L ( k + 2 ) = ( 2 v ^ d c ( k + 1 ) + v d c ( k ) ) i L d c ( k )
The power losses in Equation (23) are negligible when compared with the other power terms because Rs is close to zero. The prediction isαβ(k + 1) can therefore be found by using Equation (13) and the current isαβ(k + 2) can be found similarly as performed for the dc link voltage at time (k + 2) in Equation (29), where the interpolation can now define pRL(k + 2) to be:
p R L ( k + 2 ) = | i ^ s α β ( k + 2 ) | 2 R s
i ^ s α β ( k + 2 ) = 2 ( 1 T s R s L s ) i s α β ( k ) + 2 ( T s L s ) ( v s α β ( k ) v o α β ( k ) ) i s α β ( k )
Finally, the power related to the dc capacitor, which is also forwarded two steps ahead in Equation (26), needs two additional terms: (i) the voltage at k + 3 which is set as the voltage reference, and (ii) the voltage at k + 2, shown in Equation (29), where the final expression for this power is:
p C d c ( k + 2 ) = 1 2 C d c T s ( v d c , r e f ( k + 3 ) ) 2 1 2 T s C d c [ C d c T s ( v d c ( k ) ) 2 + s α β ( k ) , i s α β ( k ) i L d c ( k ) ] 2
On the other hand, the total reactive power reference can be imposed as:
q s r e f ( k + 2 ) = tan ( θ r e f ) p s r e f ( k + 2 )
where θref is the angle between the voltage and the current (capacitive or inductive) and may be defined by the power factor (pf) as:
θ r e f = ± arccos ( p f )
where the sign depends on whether an inductive or capacitive reactive power reference is imposed.

4. Multivariable Fast-Dynamic Deadbeat Control

The proposed power converter control is fast enough to reach the reference, theoretically, in three steps for the dc voltage and two steps for the current control. However, finalizing the dc voltage transients in three steps may demand an enormous amount of power in a short time, which cannot be achieved due to the power rating of the converter, the maximum current rating, and the natural saturation of the voabc due to the finite value of the dc link voltage vdc.
Particularly, the power associated to the dc voltage in Equation (26) (or Equation (34) which is defined in k + 2) may take an even larger value, due to the presence of noise on the sensing circuits. This is because the voltage is squared and divided by the sampling time Ts, which can be tens of microseconds. This operation may cause an excessive increase in the power demanded by the control, which can be beyond the rated values of the converter, and therefore, generate an inflated power reference, only due to the presence of noise.
Thus, two new conditions have been introduced to overcome these issues: (i) a noise rejection parameter and (ii) a maximum power limitation. The gain kCdc shall be introduced to reduce the noise effect on the power reference, altering Equation (34) to be:
p C d c ( k + 2 ) = 1 2 C d c T s k C d c ( v d c , r e f ( k + 3 ) ) 2 k C d c 2 T s C d c [ C d c T s ( v d c ( k ) ) 2 + s α β ( k ) , i s α β ( k ) i L d c ( k ) ] 2
leading to the final expression for active power reference as shown in Equation (38).
p s r e f ( k + 2 ) = 1 2 C d c T s k C d c ( v d c , r e f ( k + 3 ) ) 2 1 2 T s C d c k C d c [ C d c T s ( v d c ( k ) ) 2 + s α β ( k ) , i s α β ( k ) i L d c ( k ) ] 2 + ( v ^ d c ( k + 1 ) + Δ v d c ( k + 1 ) ) i L d c ( k ) + | 2 ( 1 T s R s L s ) i s α β ( k ) + 2 ( T s L s ) ( v s α β ( k ) v o α β ( k ) ) i s α β ( k ) | 2 R s
This new parameter can be observed to introduce a delay in the active power in relation to the capacitor response; in other words, this parameter increases the time response of this dc voltage control by transforming Equation (26) into:
p C d c ( k ) = 1 2 C d c ( v d c ( k + 1 ) ) 2 ( v d c ( k ) ) 2 T s 1 T m
where Tm > 1 represents the times in which the response is delayed; to speed up computations in the controller, this term is transformed into kCdc as follows:
k C d c = 1 T m
On the other hand, the total amount of power in Equation (27) is limited by adding a restriction according the power converter maximum power, which is turned into the following function in the control algorithm:
if ( | p s r e f ( k + 2 ) | > P max ) then : p s r e f ( k + 2 ) = sign ( p s r e f ( k + 2 ) ) P max
where Pmax represents the maximum rated power the converter.
The whole control scheme is shown in Figure 2, where the three active power terms are generated to give the total amount of consumed power and the reactive power as a function of the desired angle between the current and voltage.

5. Simulation and Experimental Results

The proposed control algorithm has been tested both by means of computer simulations and experimentally using a 2 kW three-phase voltage source rectifier prototype feeding a dc load, as in Figure 1. Key waveforms are presented to illustrate the control performance both in steady state and in transient conditions due to ac current and dc voltage reference changes, and the resultant regulation of active and reactive power. Table 1 reports the system parameters of the experimental prototype, which have also been used in the simulation tests, employing the space vector modulation technique to synthetize the power converter voltage.

5.1. Simulative Results

The proposed controller is simulated using MATLAB 2019 with PowerGui-Simulink tools, obtaining the results illustrated in Figure 3, where the power converter control, as expected, has the fastest possible response, limited only by the maximum power set by the user. The first column of Figure 3 shows the performance considering 5 kW as the maximum power the converter can bear; meanwhile, the second column of Figure 3 shows the response with 10 kW as the maximum permitted power. Figure 3 (a.1,2—first row) shows the dc link voltage response, where the voltage in Figure 3 (a.2) reaches the reference faster since the maximum power is double when compared with Figure 3 (a.1). Figure 3 (b.1,2—second row) shows the reactive power capabilities, where in both cases the angles between the voltage and current are imposed to be equal, although the amplitude in Figure 3 (b.2) is higher since the allowable power is higher with respect to Figure 3 (b.1). Figure 3 (c.1) shows the αβ current when the power is limited at 5 kW and Figure 3 (c.2) shows the αβ current when the power is limited at 10 kW. The last graphics—Figure 3 (d.1) for 5 kW limitation and Figure 3 (d.2) for 10 kW limitation—show the power control response, where the difference in the limitation of the power is clearly expressed, which changes the rapidness of each control. Thus, Figure 3 illustrates that the higher the power limitation is (Equation (41)), the faster the dynamic that is obtained.

5.2. Response under Model Uncertainties

The systems parameters can change in the course of time as well as the real parameters not being 100% accurate, leading to parametric uncertainty. Thus, the proposed controller was tested using parametric values, slightly adjusted with respect to the real parametric value, to highlight the uncertainty of the system.
Figure 4 shows the results considering model uncertainties. For all four tests, shown in Figure 4, a load increase of 100% is applied between 0.15 and 0.25 s, where the dc resistance goes from 250 to 125 Ω.
Figure 4 (a–d.1) show the system behavior when the inductances Ls are reduced to 50% from their original value, i.e., Ls changes from 4.75 to 2.375 mH, whilst the controller still considers Ls = 4.75 mH. The results show the control has good performance, despite the high noise presented due to the reduced inductance not being capable of properly mitigating the switching effects.
Figure 4 (a–d.2) show the increase in inductances Ls to 9.5 mH (twice the original value), whilst the control always considers Ls = 4.75 mH. The noise in this case is low because the filter is enlarged. The results show the control can cope with variation of this type and keep stability and reference tracking.
Figure 4 (a–d.3) and (a–d.4) show system performance against a variation on the resistance Rs of 50% and 200% from the original value, respectively. In both cases, the controller considers the original resistance value of Rs = 0.4 Ω. In both cases, the effectiveness of the proposed control strategy even under parametric uncertainty is demonstrated, keeping the rapidness of the dc link voltage and regulating the current in order to keep the phase shift between the voltage and current close to zero. In addition, in all cases, there is no overshoot on the dc link voltage response, being one of the most distinguished advantages of the proposal.
The parameters can be chosen carefully because a larger Ls inductor implies a reduction in noise in the current but also makes the control slower; therefore, the inductor can be selected by a procedure related to the allowed current ripple, the nominal current, and the switching frequency as reported in [42]. On the other hand, the capacitor affects the dc voltage dynamic, where larger capacitors help to maintain the voltage under disturbances as voltage sags/swells or changes on the current drained iLdc [43,44]. In Figure 5, there are results including different parameters in order to test the power converter control under different inductances and capacitors values, where, in this case, the control has the correct parameters into the algorithm. Figure 5 (1) shows the results where the inductance increases its values to 200% with respect to the nominal value listed in Table 1, where the noise in the current shows a moderate reduction but the power control shows a slower dynamic. In Figure 5 (2), the inductances are reduced to 50% with respect to the nominal value and the noise is higher but not as high as the noise shown in Figure 4 (1), because the controller has the correct parameter in the algorithm and therefore, the prediction error is reduced. When the capacitor is increased (Figure 5 (3)) or decreased (Figure 5 (4)), the dc voltage dynamic changes notoriously; therefore, this greatly increases its rapidness for the low Cdc value. However, the higher the value of the capacitor, the more effective rejection to disturbances achieved. Thus, there is an equilibrium that does not allow the capacitor to be reduced; in fact, if some imbalance appears, then the capacitor should be large enough to reduce the second order harmonic in the vdc which causes a third harmonic in the ac currents. Another interesting case is the H-Bridge topology, which is noted to include a second order voltage and which is mostly reduced by enlarging the dc capacitor [45].

5.3. Experimental Tests

The control algorithm has been experimentally tested using a proof-of-concept 2 kW prototype setup shown in Figure 6, to validate the theoretical control design on a real power converter. Results are illustrated in Figure 7, where four main tests have been performed.
Figure 7a,b show a dc voltage step response. Firstly, a dc voltage step is applied with a unity power factor (Figure 7a); then, it is also imposed with a 0.7 (inductive) power factor (Figure 7b). The results of these tests are obtained considering the maximum power rating of the converter as 2 kW. The results show a very fast dynamic with no overshoot, as expected from the designed controller and simulation results; the total transient time for the voltage step from 250 up to 270 V is about 70 ms.
Figure 7c illustrates the power factor control; the currents go from an inductive power factor of 0.7 to a unity power factor at 125 ms, and from the figure, the dynamics are almost instantaneous, about 100µs, as expected from a current DB control which needs two steps to reach the current reference, if no over-modulation is required.
Figure 7d presents a load impact test, from a power value close to zero up to 1.35 kW. The results show fast-dynamics and the good performance of this power converter control algorithm, where the current isabc is always maintained within certain boundaries that ensure not to exceed the maximum power, yet the power reference is reached in the shortest time, related to the current time response, i.e., about 100µs without over-modulation. In effect, the theoretical development says the voltage reference can be attained in three sample times; however, due to the amount of power required for this action, the time is enlarged to avoid damage to the power converter components. Therefore, the dc link voltage is reached in the shortest possible transient time to avoid exceeding the power converter limits.
The implementation was performed on a TMS320F6713 DSP using the uCube controller described in [46], with a total algorithm execution time of 20µs, which entails a minimum computational burden. This means that the proposed algorithm results in a very interesting choice with direct application in high-performance control systems. The proposed method also presents an additional advantage of a fast model-based control, which, however, employs a fixed switching frequency, with consequent simplification in measurements and filters design.

6. Conclusions

Predictive control has proved to be an interesting alternative for power converter controls. Within the predictive control family, deadbeat control is used for its fast dynamics, simplicity of implementation (once a system model is known), and for the possibility of being used in conjunction with a modulator, ensuring high steady state quality of the controlled signals and constant switching frequency. This work has proposed a multivariable DB control approach capable of controlling more than one converter variable, on both converter sides, in a single feedback loop. This approach retains the DB control feature of ensuring the fastest possible control action for all controlled variables, whilst still taking into account the variables’ nature, their intrinsic dynamics, and the circuit power limitation. Furthermore, the maximum power can be set easily and therefore, protect the power converter’s switches, filters, and circuit in general. The proposed strategy has also been tested under model uncertainty scenarios, demonstrating robustness and control effectiveness. In addition, the algorithm has low computational cost, obtaining a high performance with minimum digital effort and permits simple modulation techniques to be employed, such as SPWM, which facilitates filtering design. The theory has been corroborated by use of simulations and experimental results to highlight the feasibility of the proposed strategy and its capacity to be included in industrial implementations.

Author Contributions

Conceptualization, J.A.R., D.N.D. and P.Z.; methodology J.A.R., D.N.D., A.F., P.Z. and J.A.R., J.A.M.; software, formal analysis and investigation, J.A.R., D.N.D. and C.R.B.; writing—original draft preparation, J.A.R., D.N.D., and P.Z.; writing—review and editing, J.A.R., D.N.D., P.Z., A.F., J.J.S., and J.A.M.; visualization, J.A.R., J.A.M., and C.R.B.; funding acquisition and supervision, J.A.R. All authors have read and agreed to the published version of the manuscript.


The authors wish to thank the financial support from the Chilean Government through the Project CONICYT/FONDECYT/INACH/INICIACION/11170407, the Project CONICYT/FONDECYT/1191028, and the Project 2060119 IF/R from Universidad del Bío-Bío.

Conflicts of Interest

The authors declare no conflict of interest.


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Figure 1. Power Converter System.
Figure 1. Power Converter System.
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Figure 2. Converter control algorithm.
Figure 2. Converter control algorithm.
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Figure 3. Simulated Results, (a) dc voltage and reference, (b) vsα voltage and isα current, (c) isαβ currents, (d) active ps and reactive qs power; (1) ps max = 5 kW, (2) ps max = 10 kW.
Figure 3. Simulated Results, (a) dc voltage and reference, (b) vsα voltage and isα current, (c) isαβ currents, (d) active ps and reactive qs power; (1) ps max = 5 kW, (2) ps max = 10 kW.
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Figure 4. Model uncertainties, (a) dc voltage and reference, (b) vsα voltage and isα current, (c) isαβ currents, (d) active ps and reactive qs power, with (1) inductances decrease to 50%, (2) inductances increase to 200%, (3) resistances decrease to 50%, (4) resistances increase to 200%.
Figure 4. Model uncertainties, (a) dc voltage and reference, (b) vsα voltage and isα current, (c) isαβ currents, (d) active ps and reactive qs power, with (1) inductances decrease to 50%, (2) inductances increase to 200%, (3) resistances decrease to 50%, (4) resistances increase to 200%.
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Figure 5. Different parameters, (a) dc voltage and reference, (b) vsα voltage and isα current, (c) isαβ currents, (d) active ps and reactive qs power, (e) load current iLdc, with (1) inductances increase to 200%, (2) inductances decrease to 50%, (3) capacitor increases to 200%, (4) capacitor decreases to 50%.
Figure 5. Different parameters, (a) dc voltage and reference, (b) vsα voltage and isα current, (c) isαβ currents, (d) active ps and reactive qs power, (e) load current iLdc, with (1) inductances increase to 200%, (2) inductances decrease to 50%, (3) capacitor increases to 200%, (4) capacitor decreases to 50%.
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Figure 6. Experimental Setup.
Figure 6. Experimental Setup.
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Figure 7. Experimental Results, (a) dc voltage step up with unitary power factor, (b) dc voltage step up with power factor of 0.7(inductive), (c) change on the power factor, (d) load step up from 0 (A) to 4.7 (A).
Figure 7. Experimental Results, (a) dc voltage step up with unitary power factor, (b) dc voltage step up with power factor of 0.7(inductive), (c) change on the power factor, (d) load step up from 0 (A) to 4.7 (A).
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Table 1. Parameters.
Table 1. Parameters.
vs (grid nominal voltage value)230 V, rms
vdc (dc link nominal voltage)700 V
Rs (filter resistance)0.4 Ω
Ls (filter inductance)4.75 mH
Cdc (dc link capacitor)2.2 mF
fs (grid frequency)50 Hz
Ts (controller sampling time)50 µs
fsw (switching frequency)20 kHz
Tm (controller parameter)25 p.u.
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MDPI and ACS Style

Rohten, J.A.; Dewar, D.N.; Zanchetta, P.; Formentini, A.; Muñoz, J.A.; Baier, C.R.; Silva, J.J. Multivariable Deadbeat Control of Power Electronics Converters with Fast Dynamic Response and Fixed Switching Frequency. Energies 2021, 14, 313.

AMA Style

Rohten JA, Dewar DN, Zanchetta P, Formentini A, Muñoz JA, Baier CR, Silva JJ. Multivariable Deadbeat Control of Power Electronics Converters with Fast Dynamic Response and Fixed Switching Frequency. Energies. 2021; 14(2):313.

Chicago/Turabian Style

Rohten, Jaime A., David N. Dewar, Pericle Zanchetta, Andrea Formentini, Javier A. Muñoz, Carlos R. Baier, and José J. Silva. 2021. "Multivariable Deadbeat Control of Power Electronics Converters with Fast Dynamic Response and Fixed Switching Frequency" Energies 14, no. 2: 313.

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