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Review

Multilevel Inverter: A Survey on Classical and Advanced Topologies, Control Schemes, Applications to Power System and Future Prospects

1
Department of EEE, Siksha ‘O’ Anusandhan (Deemed to be University), Bhubaneswar 751030, India
2
National Institute of Technology, Delhi 110040, India
3
Department of ECE, Siksha ‘O’ Anusandhan (Deemed to be University), Bhubaneswar 751030, India
4
Department of Electrical Engineering, Faculty of Engineering, Aswan University, Aswan 81542, Egypt
5
Department of Electrical Engineering, University of Jaén, EPS Linares, 23700 Jaén, Spain
*
Author to whom correspondence should be addressed.
Energies 2021, 14(18), 5773; https://doi.org/10.3390/en14185773
Submission received: 19 July 2021 / Revised: 5 September 2021 / Accepted: 7 September 2021 / Published: 13 September 2021
(This article belongs to the Topic Application of Innovative Power Electronic Technologies)

Abstract

:
In recent years, multilevel inverters (MLIs) have emerged to be the most empowered power transformation technology for numerous operations such as renewable energy resources (RERs), flexible AC transmission systems (FACTS), electric motor drives, etc. MLI has gained popularity in medium- to high-power operations because of numerous merits such as minimum harmonic contents, less dissipation of power from power electronic switches, and less electromagnetic interference (EMI) at the receiving end. The MLI possesses many essential advantages in comparison to a conventional two-level inverter, such as voltage profile enhancement, increased efficiency of the overall system, the capability of high-quality output generation with the reduced switching frequency, decreased total harmonic distortions (THD) without reducing the power of the inverter and use of very low ratings of the device. Although classical MLIs find their use in various vital key areas, newer MLI configurations have an expanding concern to the limited count of power electronic devices, gate drivers, and isolated DC sources. In this review article, an attempt has been made to focus on various aspects of MLIs such as different configurations, modulation techniques, the concept of new reduced switch count MLI topologies, applications regarding interface with renewable energy, motor drives, and FACTS controller. Further, deep insights for future prospective towards hassle-free addition of MLI technology towards more enhanced application for various fields of the power system have also been discussed. This article is believed to be extremely helpful for academics, researchers, and industrialists working in the direction of MLI technology.

1. Introduction

Recently, the MLI has been regarded as state of the art technology for power conversion from DC to AC in the fields of generation, transmission, distribution, and employment of electrical energy. They have been innovated as an competent solution for wide range of power applications such as RER [1,2,3,4,5,6], FACTS [7,8,9,10], high-voltage direct current (HVDC) [11,12,13,14], static compensators (STATCOMs) [15,16,17,18], unified power flow controllers (UPFCs) [19,20,21], dynamic voltage restorers (DVRs) [22,23], active filters (AFs) [24,25], motor drives used for traction/transportation [26,27,28,29,30,31,32,33], marine propulsion [34,35,36,37,38], conveyors [39,40], mine hoists [41], magnetic resonance imaging system (MRI) [42] and induction heating power supply [43]. The conventional two-level inverters fail to operate in the medium voltage range due to the semiconductor’s blockage voltage limitation. However, MLIs play a key role in medium-voltage and high-power operations.
Further, for the same power ratings, MLIs have merit over a two-level inverter in terms of reduced harmonic contents of line-to-line voltage that are fed to load with respect to its level of switching frequencies [44]. The primary reasons behind the MLI serving as a vital revolution in the era of industrialization for potent performance are as follows: (i) compatible in design; (ii) capability of operating at higher current and voltage due to its modular structure; (iii) lesser voltage derivatives on power electronic switches as the voltage stress gets divided across the switches at various levels; (iv) easy interface with RER and motor drives where the load sharing is brought about by DC link; (v) enhanced power quality performance with low harmonic content and better electromagnetic compatibility; (vi) produces lower common-mode voltage; (vii) ability of transformer-less operation; (viii) enhanced efficiency level due to switching at fundamental frequency thus decreasing losses due to conduction and switching; (ix) draws input current with fewer distortions and (x) uses various control approaches and reduced switching states for achieving fault-tolerant operation. Table 1 highlights the primary differences between a traditional two-level inverter and the MLI.
The basic principle behind MLI is that it consists of one or more DC sources and an array of low-rated power semiconductor switches for generating an output voltage with a stepped voltage waveform to achieve higher power levels [45,46]. The main objective of MLI is to synthesize an approximately sine wave of voltage with various steps by using the appropriate switching signal of the power electronic switches with the help of different direct current voltage sources such as batteries, supercapacitors, fuel cells, solar panels, etc. [47]. The number of levels of the output waveform can be increased for attaining pure sinusoidal voltage without the use of heavy transformers and passive filters [47,48]. The most traditional MLI topologies, according to their structure, are classified into three types (i) neutral point clamped (NPC); (ii) flying capacitor (FC), and (iii) cascaded H-bridge (CHB) [49]. The three-level NPC type of MLI is widely used in the application of motor drive. The FC type of MLI uses balancing capacitors on phase buses to generate multilevel output voltage waves clamped by capacitors instead of diodes. The CHB is extensively used as it’s more flexible due to its modular configuration and uses the least number of semiconductor switches for a particular level of operation. It generally comprises an array of H-bridge cells for synthesizing a required voltage from numerous isolated DC sources [50]. However, the classical MLIs undergo a crucial shortcoming: the increase in the count of driving circuits and devices in proportion to the number of levels makes the control circuit very complicated. The increased number of device components, in turn, reduces the overall stability of the system. Consequently, many authors have investigated new configurations intending to optimize the utilization of components and enhance the output voltage waveform [51].
Amongst the different topologies developed are the cascaded H-bridge, hybrid series and parallel sources (HSPSs), criss-cross, packed-U cells, and cascaded-bipolar switched cells have been reported by many researchers and have acquired worldwide consideration. Authors in [49] have researched the classical Voltage Source Inverter (VSI) development for the MLI application. Consequently, the research has been expanded to investigate the performance of numerous control approaches to improve the operation of MLIs and optimize their performance with various topologies. The modulation methods in MLIs have been endorsed by their range of switching frequencies. Nevertheless, the high-frequency modulation methods are restricted in the medium voltage range because the losses incurred during switching reduce the inverter component values and the system’s overall efficiency.
The SPWM approach is implemented in industrial applications to lower the harmonic content on the output voltage waveform. Space vector modulation (SVM) technique possesses remarkable performance in 3-level MLI topologies. Other techniques involving modulation methods at a low switching frequency that have attained more demand in a broader field of function are Staircase modulation, space vector control (SVC), and selective harmonic elimination (SHE) [39]. A detailed study of these techniques has been discussed further in this article. Figure 1 illustrates the summary of the review methodology adopted in the present research work.
The significant contributions of this research paper include:
(1)
More than 260 recent research articles have been critically reviewed, and a detailed literature summary about the evolution, classification of the MLI topologies, various modulation techniques, and application have been presented.
(2)
A detailed discussion concerning the various types of conventional MLI techniques has been carried out.
(3)
An extensive valuation of a wide range of possible new reduced switch count MLI topologies has been explored and presented in-depth.
(4)
A clear idea of the different modulation techniques required for MLI has been apprehended.
(5)
Further, this research paper also highlights a thorough knowledge of MLI novel applications in various fields of power system networks such as renewable energy interface, FACTS controller, and motor drives based on a comprehensive research survey.
(6)
Finally, this article also elaborately discusses the issues faced by the present MLI technology and suggests some more in-depth vital points to be adopted in the future for further better application in the electric power grid network.
(7)
This comprehensive article is alleged to serve as a good guidance for enhancing the understanding of readers, academics, and industrialists for researching in the area of MLI concerning the proper choice of topology for definite application, accurate selection of parameters, switching, control schemes, and application in other power system fields.
The entire research article is structured into seven major sections. Section 2 addresses the development of MLI Topologies. A thorough classification of MLI topologies in terms of classical versus new reduced switch count topology and single versus multiple DC sources is projected in Section 3. Section 4 represents the detailed categorization of various modulation schemes depending upon the switching frequency. The novel applications of MLI after a rigorous survey of literature on MLI are highlighted in Section 5. The key points to be dealt with seriously for further enhancement in MLI technology in the future have been meticulously discussed in the Section 6. Finally, the conclusion from the entire study is presented in Section 7.

2. Development of MLI Topologies

An outlook on the development of various topologies of MLI is depicted in Figure 2. A thorough study of this evolution has been discussed in this section. CHB was first developed by Baker and Bannister [52] in the 1970s, which possessed the capability of generating multilevel voltage using different DC source voltage [53,54,55]. The next advancement in MLI topology was the NPC inverter, first evolved by Nabae et al. [56] in the 1980s [57,58,59]. In the 1990s, Meynard and Foch [60] and Lavieville et al. [61] developed the FC type of MLI. These three classical types of MLI-based topologies were regarded as the foundation of most MLI inverters presented in the modern era. The next invention was the modular multilevel converter (MMC), primarily applied in industrialization [62,63]. In 2000 [64], a generalized MLI named P2 was introduced. Authors in [65] have proposed active neutral point clamped (ANPC) topology. Many other new MLI configurations with application-based approaches have been proposed and conferred in the recent past. Authors have also focused on developing a new reduced switch count topology of MLI [66,67]. The new topology of MLI can be categorized as (i) symmetric type based on the use of equal DC sources [68,69,70,71,72,73,74,75,76,77,78,79,80]; (ii) asymmetric type based on the use of unequal DC sources [69,70,81,82,83,84,85]; (iii) having inherent negative level [68,69,70,81,82,83,84,85]; (iv) without inherent negative level [72,73,74,75,76,77,78,79,80]; (v) use of capacitors links with single sources [81,82,83,84,85,86]; (vi) regenerative configuration for operation as both an inverter and a rectifier [73,74,75] and (vii) hybrid approach of NPC, FC and CHB [84,85,86,87].

3. Classical and New Reduced Switch Count MLI Topologies

The concept of MLIs was first introduced in 1975 [52] and then pursued by combative work to develop numerous topologies based on modifying the configuration regarding arrangements of power electronic semiconductor switches and DC sources. Research was also conducted to achieve greater power by the series combination of switches using DC sources with a small voltage range to convert power and synthesize voltage. The most frequently used voltage sources which could be configured in one (single) and more (multiple) units are RER, batteries, and capacitors. The broad categorization of MLI on several DC sources used and their structure is given in Figure 3. In addition, a comprehensive survey of the literature yields various classifications of MLI based on different strategies as suggested by many researchers.
Nevertheless, this research article is an attempt to broadly classify all possible types of MLIs depending upon the structure of DC source (either single or multiple units) used. The multiple uses of capacitors can produce multiple voltage levels. Table 2 summarizes the significant advantages and disadvantages of various MLI configurations.

3.1. Single DC Source

This type of topology is extensively endorsed in the industrial field, considering its simple structure, high efficiency, and power rendering [88]. The different categories of MLIs using a single DC source are discussed below [89].

3.1.1. Neutral Point Clamped Multilevel Inverter (NPC-MLI)

Nabae, Takashi, and Akagi in 1981 proposed the diode clamped multilevel inverter (DC-MLI), also termed NPC-MLI [56]. These inverters have been broadly adopted on account of their immense proficiency in high-power and medium-voltage operations with comparatively high efficiency. It is a three-level structure with two diodes that clamp the switching voltage to half the supply voltage magnitude. Further, it guarantees equal sharing of the supply voltage among the two halves of the switches being held at these points consisting of a neutral point between them. The middle voltage level is termed the neutral point. This topology employs multiple capacitor banks in series for providing multiple DC voltage levels, as illustrated in Figure 4.
The major benefits of this topology are: (i) the capacity demand of the converter is minimized as all of the phases share a common DC bus; (ii) enhanced capability of reducing the THD; (iii) the capability of the capacitors to be pre-charged as a group; (iv) provides higher efficiency and (v) the number of switches, clamping diodes and capacitors can be enhanced to obtain higher voltage levels. However, this topology faces some demerits such as: (i) implementation cost can be increased as additional reactors are needed for mitigation of elevated voltage levels and THD of current as this topology uses fundamental frequency for switching; (ii) although voltage level can be increased by enhancing the number of capacitors and clamping diodes it increases the complexity of the overall configuration; (iii) due to deviation in the switching characteristics, the voltage at the neutral point fluctuates which creates difficulty in the static and dynamic sharing of the voltage across the switching units and (iv) due to imbalance in capacitor voltage and over-voltage issues, the actual application of this topology are confined to three-level only. NPC-MLI finds its application in the following ways: static VAR compensation (SVC), variable-speed motor drives, high voltage system interconnections, and be assimilated with high voltage AC/DC transmission system [90,91,92,93,94,95].

3.1.2. Flying Capacitor Multilevel Inverter (FC-MLI)

In 1992, Meynard and Foch [60] and Lavieville et al. [61] proposed the FC-MLI topology to mitigate the issue of static and dynamic sharing of the voltage across semiconductor switches as built in the NPC-MLI topology. The main architecture of FC-MLI is identical to NPC-MLI. Nevertheless, here the clamping diodes are replaced by capacitors, as illustrated in Figure 5. This topology is termed FC. In FC, capacitors that replaced the diodes of the DC-MLI are autonomous (flying) as compared to the other capacitors present in the total configuration. The voltage on every capacitor varies from that of the adjacent capacitor. This MLI topology possesses numerous advantages as compared to NPC-MLI, such as: (i) improved stability of the FC is attained by the redundancy of switching within the phase; (ii) capability in controlling both the active and reactive power; (iii) it has transformer-less working and (iv) more flexible in synthesizing voltage by using capacitors instead of clamping diodes.
Although this topology marks the issues of the NPC, it also has some disadvantages such as: (i) the proper charging and discharging control of capacitors is restricted due to an increase in the voltage levels; (ii) the increment in the number of the capacitor leads to increased cost, reduced lifetime and system becomes bulky; (iii) increase in the number of levels leads to increase the number of capacitors thus limiting its operation to maximum 3–5 level; (iv) complexity in start-up and same level pre-charging of all the capacitors; (v) high switching losses due to operation at high frequency and (vi) large numbers of levels creates packaging issues. The major attractive applications of FC-MLI includes [39,60,94]: (i) static var generation; (ii) AC motor drives; (iii) active filter operations; (iv) switched converters; (v) sinusoidal current rectifier and (vi) converters with THD-reducing capacities.

3.1.3. Active Neutral Point Clamped Multilevel Inverter (ANPC-MLI)

Bruckner et al. [68,96] have proposed the ANPC-MLI topology. This inverter helps to overcome the insufficient and uneven losses which are shared between the outer and inner switches. It was possible by placing power switches rather than normal diodes [97]. Figure 6 demonstrates the nine-level ANPC inverter with the combination of NPC and FC-based MLI topologies [97]. In this configuration, the number of the two-level inverter can be found out by (n − 1)/2, where ‘n’ is the number of output levels of the inverter. So, four number of two-level inverters were cascaded to obtain a nine-level inverter. In Figure 6, switches ‘Sw’1 to ‘Sw8’ and capacitors ‘C1’ to ‘C3’ belong to the first part, whereas the switches ‘Sw17’ to ‘Sw24’ and capacitors ‘C7’ to ‘C9’ belong to the second part of the MLI. Switches ‘Sw9’ to ‘Sw16’ and capacitors ‘C4’ to ‘C6’ belong to part three, used for connecting the inverter to the load.

3.1.4. Modular Multilevel Converter (MMC)

The MMC was first proposed in 2001 by Lesnicar and Marquardt in a German patent [62], and later in 2002, it was employed for a wide-scale power range [98]. MMC offers numerous merits in comparison to other available topologies such as [99,100]: (1) large range of voltage operation by cascading cells; (2) independent PQ control; (3) negligible losses; (4) high modularity; (5) low switching frequency; (6) output almost sinusoidal so does not need AC filters; (7) mechanical structure is simple; (8) voltage and current quality generated is high and (9) high reliability, availability, and efficiency. Therefore, they are often preferred for medium to high voltage applications because of their high-quality output and modular structure.
Over recent years, MMC has been successfully operated as an efficient power converter in numerous power system applications such as HVDC system [101,102,103,104], FACTS devices [105,106,107], energy storage devices [108,109,110], electric vehicles [111,112], motor drives [113,114,115], active power filters [116,117] and renewable energy [118,119,120,121]. Presently, the primary vital concerns of MMC include capacitor voltage balancing (CVB) and circulating current suppression (CCS). Authors in [122] have reported an efficient CVB method for MMC using the carrier-based phase shift pulse width modulation method for designing a flexible mission profile emulator for the test of MMC under various working conditions. In [123], a step up non-isolated DC-DC MMC having self-voltage balancing and soft-switching has been discussed. Researchers in [124] and [125] have proposed a sensorless switch clamp MMC for voltage balancing and inter-cluster voltage balancing control for MMC during unbalanced grid voltage. CVB control strategy for MMC has been reported in [126,127]. A novel voltage balancing control with dv/dt reduction for 10-kV SiC MOSFET-based medium voltage MMC has been proposed in [128]. Authors have also carried out hardware implementation based on the peak current mode switching cycle control for CVB of MMCs [129]. Numerous techniques have been designed and implemented for the voltage balancing of MMCs, as reported in the literature [130,131,132,133,134]. The CCS in MMC has been carried out efficiently through various techniques as proposed by several researchers [135,136,137]. In [138], authors have analyzed effective ways of CVB and CCS for a three-phase four-wire split capacitor DSTATCOM. Authors have applied various methods such as fuzzy logic controller [139,140], predictive control method [141], dead beat control [142], sliding mode approach [143], and frequency adaptive spatial repetitive [144] for suppressing the circulating current harmonics in an MMC. Many other methods have been studied and incorporated for efficient CCS of MMC [145,146,147,148,149].
The basic circuit of the three-phase MMC is illustrated in Figure 7, which consists of a DC voltage source, three phases (legs) with two arms per leg (upper and lower arm), each arm consisting of series connections of several (N) sub modules (SM) producing a multilevel voltage signal at its output terminal and a series inductor for smoothening and filtering the circuits. Different types of SM topologies are reported in the literature [99,100]. Recently, authors have proposed MMC basing on interleaved half-bridge submodules [150]. Some of the basic configurations are illustrated in Figure 8. Half-bridge SM, full-bridge SM, single clamped, and double clamped and shown in Figure 8A, Figure 8B, Figure 8C, and Figure 8D, respectively.

3.2. Multiple DC Source

Authors in [33,90,93] have proposed MLI topologies with multiple sources (DC) as the use of a single source (DC) is limited for achieving greater voltage levels. In this section, various topologies of MLI with multiple DC sources are discussed in detail.

3.2.1. Basic Multiple DC Source Topology

Cascaded H-bridge Multilevel Inverter (CHB-MLI)

Baker and Bannister [52] proposed the first patent on this topology which was considered to be a viable substitute to previously described topologies as it requires a significantly fewer number of power devices. This topology was termed CHB-MLI, which constitutes the series connection of H-bridges with separate DC sources. Numerous series-connected H-bridge structures generate the multilevel stepped waveform. By cascading the general H-bridge cell, the resultant CHB-MLI can form an unlimited number of levels theoretically. This property of CHB-MLI allows modulation. The advancement of the technique for eminence follows the trade-off for high power medium voltage operations, which have now reached the level of megawatt by industries. It is an effective solution to voltage imbalance found in the NPC and FC configurations due to its modular structure. CHB generally comprises power conversion cells, each of which is supplied by an isolated DC source on the DC side, obtained from batteries, ultracapacitors, fuel cells, and series connected on the AC side [151]. A schematic diagram of the CHB topology has been shown in Figure 9.
The advantages of CHB-MLI topology are as follows: (i) easy modulation, control, protection, and maintenance during failure due to compatible structure; (ii) capable of handling higher voltages and absence of voltage imbalance; (iii) ability to eliminate common-mode voltages by proper selection of modulation scheme; (iv) generates almost sinusoidal output and hence almost requires no output filter; (v) less component requirement being equated to other topologies; (vi) no requirement of flying capacitors or clamping diodes and (vii) uniform distribution of load power amidst all switching devices [152]. However, despite several merits, this topology faces some serious drawbacks such as: (i) requirement of numerous separate DC sources and ii) need of many DC link voltage controllers. Various fields of application of this topology include RER interface, motor drives, electric vehicle drives, laminators, blowers, fans, conveyors, DC power source utilization, frequency link systems, and power factor compensators [39,56,153,154,155].

Hybridized Cascaded H-bridge Multilevel Inverter (HCHB-MLI)

HCHB-MLI was first introduced by Odeh and Nnadi [156], as illustrated in Figure 10. HCHB-MLI signifies that the inverter is employed with: (i) various semiconductor device technology; (ii) various amplitude and characteristics of DC sources; and (iii) combination of many modulation strategies [157]. Figure 10 depicts a nine-level HCHB-MLI, which consists of two DC sources. Two five-level hybrid inverters are interconnected for providing nine-level of voltages per cycle. This topology is quite identical to the earlier discussed CHB-MLI topology. However, the significant difference between HCHB and CHB topology are: (i) in HCHB, each H-bridge cell is added with an auxiliary switch for the harmonic profile improvement of output waveforms; (ii) the number of devices required in this HCHB topology is comparatively significantly less in comparison to the CHB topology for the same level of output voltage waveform [158] and (iii) with the operational and switching activities, HCHB topology possesses double RMS output voltage, voltage steps quantity and reduced number of DC sources. However, the major demerit is that it cannot be employed for high voltage applications.

3.2.2. New Reduced Switch Count Topology

Topologies with H-bridge broadly consist of asymmetric and symmetric types.

H-bridge Topologies

(i)
Asymmetric H-bridge Topology
Asymmetric MLI is usually CHB-MLI type in which the value of the voltage of any one DC source varies dynamically [159,160]. The main merits include: (i) generation of output voltage waveform with minimum THDs [39,161,162]; (ii) requires reduced number of semiconductor devices in comparison to symmetric topology [163]; (iii) needs only 12 switching units to attain seven, nine, fifteen and twenty-one levels [164]; (iv) operates with reduced dimension and cost of the inverter [165] and (v) enhanced reliability due to operation with fewer semiconductor switches and capacitors [166]. Asymmetric topologies with H-bridge have been further classified into two types, and the details are highlighted below [167].
A.
Cascaded H-bridge based Multiple Level DC Links Inverter
Gui Jia Su et al. [72] proposed this topology which comprises the CHB with multiple level DC links (MLDCL). Figure 11 represents an MLDCL inverter consisting of 2 input DC sources. The circuit comprises of ‘n’ number of half-bridge units in cascade, and each unit has one DC source with two switches connected in series. A stepped DC voltage waveform is produced with the help of these cascaded units, which are also known as level-generation parts. A full multilevel AC waveform is generated using the H-bridge by changing the polarity of the output voltage. MLDCL topology utilizes only fewer semiconductor switches to generate the same output voltage level [39]. Major applications of this configuration include: (i) permanent magnet (PM) motor drives with low range of power (<100 kW); (ii) metal oxide semiconductor field effect transistors (MOSFETs); (iii) insulated gate bipolar transistors (IGBTs) and (iv) solar and fuel cell integration [168,169].
B.
Switched Series/Parallel Sources based Multilevel Inverter (SSPS-MLI)
Hinago and Koizumi [170] proposed the SSPS-MLI topology. It is comprised of two major units; the “level-generation” unit, where a staircase voltage waveform with positive polarity is generated, and the “polarity-generation” unit, where the staircase DC voltage waveform gets converted to AC voltage as depicted in Figure 12. This configuration possesses the primary merit of generating more output voltage levels using very few numbers of switches in contrast to other conventional MLI topologies. Therefore, SSPS-MLI can be applied in the areas of: (i) electric vehicle where a single unit of the battery can be composed of several series-connected battery cells [171]; (ii) vehicle drive system to meet voltage or power need by a possible combination of two or more sources either in series or in parallel and (iii) traction purposes by possible joining of multiple sources in various flexible configuration [168,172].
(ii)
Symmetric H-bridge Topology
This family of MLI usually consists of inverters where the magnitude of all the isolated supply DC sources to each of the H-bridge cells is identical. The symmetric H-bridge topology is further classified into different types. This section throws light on each of the Symmetric H-bridge topologies in specific.
A.
T-type Multilevel Inverter
A novel T-type configuration with a five-level single phase inverter was first proposed by Gerardo Ceglia et al. [80,81,82]. The primary benefit of it is that the designed configuration reduces the use of more switches. A T-type inverter topology is depicted in Figure 13 below. Compared with other traditional topologies, T-type topology delivers an extraordinary improvement regarding the lower count of switches used and lower layout complexity. Further, almost 40–50% reduction in power switch count is achieved without diodes or capacitors [173]. This configuration has an H-bridge and an auxiliary bidirectional switch for controlling the connection of the supply from the DC sources to generate the staircase output voltage. However, this topology fails to render switching states to have all essential levels, as in the asymmetric H-bridge topologies [80].
B.
Nilkar Multilevel Inverter (N-MLI)
Nilkar et al. proposed the Nilkar inverter topology [174]. The basic module of N-MLI is comprised of two identical DC voltage sources with four semiconductors switching units for generating a staircase DC voltage waveform with positive polarity, which is further connected to an H-bridge consisting of 4 switching devices as demonstrated in Figure 14. The H-bridge helps in alternating the polarity of voltage for producing a complete sinusoidal alternating output signal. This topology renders many advantages, such as: (i) operates with significantly less number of switches; (ii) THD is effectively lessened in comparison to other available classical MLI topologies, and (iii) batteries and capacitors can be used as the DC voltage source. This topology can be used for various RER’s (such as solar and fuel cell) interface and medium to high voltage applications in industries.
C.
Crisscross Cascaded Multilevel Inverter (CCHB-MLI)
In [175], Khosroshahi proposed a CCHB-MLI topology consisting of the basic units in cascade. Figure 15 shows a CCHB inverter configuration comprising of two sources of DC voltage and a combination of one-way and two-way switches. It has two units; the first is the level generation unit, and the second is the polarity generation unit. The level-generation unit has two power switches, namely Sw2 and Sw3, which are unidirectional. The other switches Sw1 and Sw4, are bidirectional conducting and blocking switches, respectively. The four power switches P1, P2, P3, and P4 constitute the polarity-generation part. The benefits of this topology are: (i) usage of the reduced number of semiconductor switches; (ii) limited use of isolated DC voltage sources as compared to other classical topologies; and (iii) low cost and volume as compared to CHB-MLI [51].
D.
Reversing Voltage Multilevel Inverter (RV-MLI)
Reversing voltage MLI topology was first suggested by Najafi et al. in [78,176]. In this topology, the sinusoidal output voltage is produced in both level generation and polarity generation stages. The positive and negative polarity of voltages is generated in the level generation and polarity generation stage, respectively, as shown in Figure 16. By duplicating the centre stage operation with any number of levels can be possible, so application to three phases can also be extended. It has flexibility in the switching sequence and needs very few components for its work. Therefore, it can be useful in the areas of applications such as FACTS and HVDC. However, operation using different DC sources is not possible in this topology, as it is practically impossible to combine additive and subtractive DC sources.
E.
Series Connected Switched Sources Multilevel Inverter (SCSS-MLI)
In this topology, the basic concept lies in the series connection of sources by the switches [76,77]. Figure 17 shows SCSS based MLI configuration. Here the poles of the voltage sources with lower magnitude are being associated with semiconductors. They are also in contact with the voltage poles with a higher magnitude of the upstream source. The link can synthesize a DC voltage with multiple levels, which take into account both the polarities with the help of the H-bridge. This structure also helps in reducing the number of switches for the symmetrical structure of the inverter. Nevertheless, the main shortcomings of this topology are: (i) power semiconductor used must be of the same rating; (ii) load sharing is impossible as input stage requires various configurations and (iii) high rated switches need to be switched with the minimum possible frequency.
F.
Multilevel Module Based Multilevel Inverter (MLM-MLI)
Babaei in [79] suggested the MLM-MLI topology, which comprises the level generation part and the polarity generation part. Figure 18 illustrates an MLM-MLI with four DC input sources. With the increase in output voltage level, this configuration can operate with the reduced number of DC voltage sources, semiconductor switches, transistors, and power diodes. The major demerit is that it fails for application in an asymmetric configuration. However, it can be used for high power quality applications that use an ample number of DC voltage sources [79].
G.
Two Switch Enabled Level Generation Based Multilevel Inverter (2SELG-MLI)
Babaei in [83] discovered the level-generation based MLI Topology with two switches and seven input levels, as shown in Figure 19. This topology has two different stages, a level-generation stage and a polarity-generation stage. The name ‘Two Switch’ justifies that this configuration needs only two number of conducting switches in the level generation stage for synthesizing any level of voltage. However, this inverter fails to work in asymmetric topology. The major disadvantage is that as the level generation stage fails to realize the zero level of its own, the operation with a fundamental switching frequency becomes impossible [168].
H.
H-bridge and two-level Power Modules Based Multilevel Inverter (HBTPM-MLI)
In [177], Suroso and Noguchi presented HBTPM-MLI. An HBTPM based inverter configuration has been illustrated in Figure 20, which consists of 4 input DC sources (VDC1 to VDC4). Semiconductor switches are used to interconnect the terminals with a source of low potential. Further, the proceeding source is attached to a high potential terminal using power switches. Switches P1 to P4 are for the polarity generation stage, and switches ‘Sw1′ to ‘Sw6′ form the level generation unit. The structure is simple, but it fails to synthesize various levels of the voltage waveform at the bus end. However, this topology fails to operate in asymmetric configuration for further reducing the count of the switch.

Topologies without H-bridge

Topologies without H-bridge can be either asymmetric or symmetric type. However, mostly they are of a symmetric type.
(i)
Asymmetric Topology without H-bridge
This category of MLI consists of numerous DC voltage sources, among which at least one differs dynamically. They do not consist of H-bridge cells or units.
(ii)
Symmetric Topology without H-bridge
In this topology, the magnitude of all the isolated supply DC sources are identical, but they do not form an H-bridge configuration. In this section, different types of symmetric topology without H-bridge structure have been reviewed.
A.
Cross Connected Sources Based Multilevel Inverter (CCS-MLI)
Authors in [69] have introduced the CCS-MLI topology comprising input DC sources isolated for every cell, as depicted in Figure 21. In this topology, a switch connects the two different terminals of two different sources and vice-versa. It requires a minimum number of switches for its operation and is usually active where isolated DC sources are present [51].
B.
Packed U Cell Multilevel Inverter (PUC-MLI)
A novel MLI topology was offered by Youssef Ounejjar et al. and was named “PUC” [178,179,180,181,182]. The circuit of PUC-MLI is represented in Figure 22, which constitutes ten power semiconductor switches and four DC sources. Every individual U-cell has a single DC input level and two switching units [168]. The main advantage of this technology is that the maximum voltage-producing switch can be operated at the minimum frequency. Further, it allows easy change in the voltage level number, reduces stress on the switch, and enhances the overall converter operation.
C.
Cascaded Bipolar Switched Cells Multilevel Inverter (CBSC-MLI)
Babaei et al. in [71] have introduced this topology, as shown in Figure 23. The circuit comprises 4 DC sources and 10 bidirectional power semiconductor switches capable of generating voltage levels in both positive and negative polarities. Every bidirectional switch needs two IGBTs and is equal to the number of gate drive circuits. This concept helps in decreasing the operational cost and overall complexity of the circuit. The major shortcoming is that this topology is that it cannot work with an asymmetric configuration.
D.
Mokhberdoran Multilevel Inverter (M-MLI)
This topology is named after Mokhberdoran as in [183]. The basic circuit of M-MLI is illustrated in Figure 24, which comprises of two symmetric DC voltage sources, six switches, and eight diodes. Here to obtain a higher level of voltage, the basic units are cascaded in series [51]. The topology is such designed that it utilises a significantly fewer number of switching devices. The entire operation is divided into two parts depending upon frequency, such as low and high. This enhances the efficacy of the configuration. The structure is modular, and the cost of this unit is also minimum. Mokhberdoran technology usually finds its application in high power operations [183].
E.
Babaei Multilevel Inverter (B-MLI)
Figure 25 illustrates the B-MLI topology as proposed in [70,184]. The key elements are composed of six unidirectional switches and two symmetrical DC voltage sources. For increasing the output voltage level, the circuit developed can be reproduced by connecting in series [51].

4. MLI Control and Modulation Schemes

Modulation techniques play a principal role in governing the overall efficiency parameters such as harmonic reduction and switching losses used to control the inverter and turn the entire system [185]. They also have the responsibility to synthesize reference control signals to maintain all voltage sources balanced. The major purpose of modulation is to generate a staircase DC voltage signal, nearest a reference signal that is generally sinusoidal in a steady state [186]. The modulation process usually involves a variety of single or multiple attributes of a carrier signal waveform with a modulating waveform. Modulation is also referred to as a strategy to control the switching action by changing the characteristics of a particular signal (carrier signal) using another signal (reference signal). Every family of MLI has a selected appropriate modulation scheme for optimizing the circuit working and achieving the target criteria. Following are the major important factors basing on which a particular modulation technique is chosen for a particular MLI family: (i) total generated harmonics; (ii) level of distortion; (iii) frequency of switching; (iv) amount of losses and (v) response speed. The MLI modulation methods have the following needs to be fulfilled before operation: (i) quality of voltage should be high; (ii) should have modular structure; (iii) switching of multiple voltage levels simultaneously is not permitted; (iv) power devices should operate with minimum frequency; (v) load sharing should be uniform among the power modules; (vi) algorithm used for control should be easy and simple and (vii) cost of implementation must be minimum [51].
The modulation index also has a vital role in all control schemes. Modulation also depends upon modulation ratio (either over or under modulation), and the THD varies accordingly. Multiple techniques are proposed by authors in the literature depending upon the switching frequency, either fundamental or high frequency [187,188]. However, low losses are found when switched at fundamental or low frequency. A thorough survey of various modulation methods is highlighted in this section below. Figure 26 illustrates the various control and modulation schemes for MLI. Table 3 lists the merits and demerits of different modulation schemes discussed in this review article.

4.1. Fundamental Switching Frequency Pulse Width Modulation (FSF-PWM) Techniques

These techniques generate a staircase waveform performing single or multiple commutations of the power electronic switches [189,190]. Here, an increased number of levels is obtained by adding extra units without creating any complexity in the generation of the switching signals. Moreover, due to switching at low frequency, the losses incurred are very less. Various FSF-PWM methods have been discussed below.

4.1.1. Sine Property

It is a modern method for calculating the firing angle that is to be provided to the switching units [191,192,193]. Calculation of firing angle is easy on adopting this technique. The firing angle is generally obtained in degrees and has the provision of appropriate conversion to any other unit of time such as ‘seconds’ for the easy performance of simulations.

4.1.2. Selective Harmonic Elimination

Researchers in 1973 suggested a voltage control and harmonic elimination theory known as SHE. This technique is utilized for eliminating the most dominant selected lower order harmonics [194,195,196,197]. In SHE, there is a possibility of lowering the THD and the size of the output filter. As the switching angles are pre-determined off-line, it is assumed to be an open-loop modulation method [198,199]. Authors have also reported that many Fourier equations are utilized for calculating the firing angle for the switching purpose [195]. Selection of correct values of the firing angle for the Fourier series equation, the odd harmonics can be limited for any level of MLI. A microcontroller device is then used to supply these firing angles to the switches. Thus, it does not require a closed-loop controller for its implementation.
The vital functions of the SHE are: (i) maintaining the fundamental component of the waveform; (ii) harmonic reduction individually; (iii) decrease in THD, and (iv) lower switching losses. However, a major drawback of the SHE technique is that it requires the design of massive passive filters to limit the lower-order harmonics [196]. To counteract the above-cited issue of the SHE method, a novel technique known as selective harmonic mitigation (SHM) has been proposed in the literature by researchers [200]. In the SHM method, switching angles are calculated to reduce the individual harmonic distortion without the grid code limits. SHM is also an open-loop control technique and an offline procedure for calculating the switching angles and cost function that can be minimized using a search algorithm [201]. Numerous solutions can be utilized to solve the non-linear equation of MLI, such as: (i) iterative numerical methods [202]; (ii) artificial intelligence-based methods [203], and (iii) resultant theory [204]. A new technique for the SHE method named Groebner Bases Theory Method has been developed [205,206]. This method has been carried out with a three-level inverter. This method has the advantage of finding the most accurate switching angles as no initial value for iteration is required.
Recently numerous evolutionary algorithms based on SHE techniques for MLI are reported in the literature [207,208,209,210,211,212,213,214,215,216,217,218]. Authors in [185,207] have implemented a genetic algorithm (GA) to minimize low-count switch MLI distortions. In [208,209], the output voltage regulation and improvement of the harmonic profile are carried out by particle swarm optimization (PSO) technique. Additionally, PSO is used in [210,211] for the control of THD. The ant colony system (ACS) algorithm was incorporated in [212] for removing the harmonic content of a 3-phase inverter with a unipolar output voltage waveform. Researchers have used bee algorithm (BA) for ninety-seven-level CHB-MLI [213]. THD reduction is brought about by bacterial foraging algorithm (BFA) in CHB-MLI. In [215], a clonal search algorithm (CSA) has been reported for a three-phase inverter. The harmonics in the line voltage of an inductor motor are eliminated using the evolutionary programming algorithm (EPA) as in [216]. Authors in [217,218] have suggested using the differential evolution (DE) algorithm for a 3-phase inverter to enhance the level of output voltage, improve the harmonic profile for rapid convergence and better efficiency.

4.1.3. Space Vector/Nearest Vector Control (SVC/NVC)

The space vector control (SVC) is also known as nearest vector control (NVC). It is reported as an alternative to SHE and can operate at a low switching frequency. Like SHE, it does not generate the average value of the required load voltage for every switching time interval. The major function of the SVC technique is to select a vector closest to the reference vector for minimizing the distance between them or the space error [187]. However, in SVC, the lower distortions produced due to switching at low frequency are usually not eliminated like in the SHE technique. The NVC technique is very simple and applicable for higher output voltage levels as the higher density of vectors can generate only small errors about the reference vector. Authors in [219] have discussed the principle of an eleven-level inverter with SVC control. Recently the SVC finds its implementation in numerous MLIs, including both classical as well as newly proposed reduced switch count technology. In [220], a five-level MLI configuration with quasi Z-source has been designed in which the NVC has been utilized as the control scheme.

4.1.4. Staircase with a Fixed Time Step Control Scheme

Staircase with a fixed time step control scheme generates the output voltage signal is generated from uniform time steps within each level. The main merit is that the structure is simple and hence makes the inverter control very easy. The major drawback is that the output voltage profile consists of lower order harmonics and thus increases the THD. The waveform is divided into equal time intervals similar to the number of levels to find equal switching instants. In this control scheme, the inverter input voltage can be controlled, but the output voltage is not controllable.

4.2. High Switching Frequency Pulse Width Modulation (HSF-PWM) Techniques

The HSF-PWM techniques are usually employed for high switching frequency applications in the order of kHz and consist of many commutations per cycle [39]. A detailed classification of each type of this technique has been deliberated in this section.

4.2.1. Multi-Carrier Pulse Width Modulation (MC-PWM) Techniques

In this technique, only a single modulating sinusoidal signal is produced using multiple triangular carriers. Usually, the number of employed carriers is ‘(n-1)’, where ‘n’ is the level of the inverter [39]. The MC-PWM techniques are further categorized into two types: (i) carrier disposition PWM and (ii) phase shifted PWM. The basic diagrams containing modulating and carrier signals for carrier disposition and phase shifted PWM methods have been reported by numerous authors in the literature [221,222].

Carrier Disposition Pulse Width Modulation (CD-PWM) Techniques

In this scheme, the reference waveform is produced by comparing the amplitude of the carrier waveform to a reference waveform amplitude. It is further classified into three various types [223]. The details of each are highlighted in this section.
(i)
Phase Disposition (PD) Method
The important feature of the phase voltage spectrum of a PD Method is the initial distortion of the carrier. Therefore, this method generates a very good performance of the line voltage. Generally, all the carrier signals have equal amplitude and frequency and lie in one phase. PD method is usually used for asymmetric MLI, and with the increase in the number of voltage levels, the harmonic contents are decreased [224].
(ii)
Phase Opposition Disposition (POD) Method
In this modulation scheme, the in-phase components are the positive carrier signals, whereas the carrier signals with negative polarity are 180° out of phase.
(iii)
Alternative Phase Opposition Disposition (APOD) Method
This method involves all the carriers to be in phase opposition by 180° to the nearest carriers [224].

Phase-Shifted Pulse Width Modulation (PS-PWM) Technique

In the PS-PWM method, the multiple carriers are phase-shifted accordingly. It requires ‘(m−1)’ triangular carriers for an ‘m’-level inverter. This triangular carrier possesses identical frequency and amplitude; however, adjacent carriers have a definite phase shift between them [225]. The gate signals of the MLI switches are produced with the help of the on/off state of some logic circuit switches [224].

4.2.2. Hybrid Pulse Width Modulation (H-PWM) Technique

The low-frequency and high-frequency modulation techniques are combined to form H-PWM. This control scheme is applied for CHB-MLI having a varying magnitude of DC sources. This method majorly aims to lower the inverter’s losses by reducing the switching frequency of the higher power units. The lower power unit is controlled by using the unipolar pulse width modulation method [224].

4.2.3. High and Low Carrier Cells and Alternative Phase Opposition Pulse Width Modulation (HLCCAPO-PWM) Technique

HLCCAPO-PWM is a modification of the PD method. Here two different carrier groups are introduced by dividing them as per each carrier period. The method renders the use of higher modulation frequency by reducing the switching losses effectively. Further, this technique also reduces the dissipation of energy as the energy shifts from the lower to higher-order harmonics. It mostly finds its application in hybrid clamped MLI.

4.2.4. Space Vector Pulse Width Modulation (SV-PWM) Technique

The SV-PWM technique consists of many vector states that are utilized for modulation of the reference waveform. This method is usually based on the digital modulation method for generating PWM voltages under a known voltage [226]. Here the values of the control algorithm are directly taken from the control system [227]. However, this scheme fails to operate with a large number of levels as identifying sectors and selecting switching sequences are very crucial. Generally, for an ‘n’-level inverter, ‘(n − 1)2′ vector combination per sector, six sectors, and ‘n3′ switching sequences are required [228]. Reduction in the common-mode voltage, losses due to switching, and the control of the DC link voltages can be brought about by appropriate selection of modulation vector and switching combinations. Generation of a particular voltage level takes place by redundancy switching states.
Various authors have reported in the literature the application of this technique in numerous areas. In [229], a space vector hysteresis current control (SVHCC) scheme has been implemented. The SVHCC has been used with a recent MLI configuration, as suggested in [230]. The use of SVC is also projected in [231] for a T-type MLI system that implements a fault-tolerant control scheme. Amit Kumar Gupta et al. in [232] addressed a simple SV-PWM method for MLI operation in the over-modulation range. In [233], Mohan M. Renge suggested a technique for reducing common-mode voltage at the output of MLI that used the 3-D SV-PWM technique.
Better values of fundamental voltage ratio and harmonic elimination are achieved in this technique as compared to the sinusoidal PWM method. In addition, the maximum peak value of the output voltage is almost 15% more in SV-PWM than in the triangular carrier-based modulation method. Although the requirement of a look up table and identification of sectors for determining the switching intervals for all sectors make the SV-PWM technique complex, the microprocessor and digital signal processing units serve as a better solution for preparing the preparation of the process the algorithm.

5. Applications of MLI Topologies and Control Schemes

This section throws light on the detailed application of various MLI topologies and control schemes in different fields of power system networks, such as (i) integration of RERs to grid; (ii) FACTS devices, and (iii) electric motor drives. Table 4 provides a brief idea of the application of various MLI topologies in numerous power system domains.

5.1. Grid Integration of RERs

The control schemes for RERs integration are categorized as (1) time and (2) frequency domain schemes. Fast Fourier Transformation is usually not employed because of more computational time and delay in computing reference signals [234]. On the other hand, p-q theory and d-q theory based on time-domain control algorithms are highly adopted due to lesser computation time in deriving the instantaneous compensating current or voltage signals. The DC quantities are assumed to be the fundamental components in the d-q algorithm. Furthermore, authors in [80] have studied the sensorless control of voltage waveform in packed U-cell topology to reduce control complexity and redundancy switching state. This operation keeps the capacitor voltage constant at half the magnitude of the DC source. Figure 27 depicts the controller for adjusting the amplitude and the phase shift of the current injected from the inverter to the grid.
In [235,236,237], researchers have addressed the use of a solar-based MLI for enhancement in the waveform quality and reduction in issues on power quality. For a three-level NPC-MLI, instantaneous power theory control is studied for generating the perfect reference signal. Here, two control loops are defined, one for controlling the DC bus voltage and the other for controlling the current. Source active power and load reactive power are computed using the fuzzy logic controller (FLC), and in the α-β reference frame, the p-q theory was used to find the reference current [238]. Authors in [239] have proposed a digital proportional integral (PI) Controller to inject the current from the photovoltaic source to the utility grid to achieve maximum dynamic operation with minimum harmonics. Figure 28 describes the block diagram of the control part of the above study, which comprises maximum power point tracking (MPPT) control and inverter control.
The authors have introduced the dual-loop control method for a three-level inverter, as demonstrated in Figure 29. Here, two loops are present, the outside loop controlling the DC bus voltage and the current being controlled by the inner loop [240]. In NPC-MLI, the predictive control method is utilized to balance the DC link voltage. As suggested by authors in [241], a dual loop d-q controller is used to control the active and reactive power distribution. Different topologies of MLI in various combinations are interfaced with RERs for grid-tied applications [242,243,244,245,246,247,248]. In the recent past, the MLI topologies are also applied for application in the areas of marine [245] and microgrid [246,249].

5.2. FACTS Device

STATCOM is considered to be a vital controller among all other types of available FACTS devices. The most appropriate topology for STATCOMs operation is the CHB-MLI for direct connection to medium voltage networks [250]. It does not need injecting active power for a normal range of operation [251]. In [17,252], authors have reported that CHB-MLI can be placed in series to achieve the operational voltage without using a transformer. A reactive current reference control scheme is proposed to enhance the transient operation of STATCOM, as depicted in Figure 30. In Figure 30, the phase locked loop (PLL) block is utilized to determine the reference phase angle of the grid voltage. The STATCOM output voltage and current are transformed into d-q reference frame vectors by adopting Park’s Transformation. The feedback operation is preferred by the controller and produces the switching pulses with a proper modulation index.
Researchers have suggested a novel hybrid control method for STATCOM application for delta CHB-MLI subjected to an unbalanced condition [253]. A current control method is proposed for every phase individually to control every link’s active and reactive power independently. The hybrid control approach consists of four different parts as follows: (i) PLL; (ii) active current reference; (iii) reactive current reference; and (iv) instantaneous current tracking. The PLL determines the phase angle of the system. However, the compensation model is used to calculate the amplitude of the voltage, which lags the phase of reactive current by 90°. The overall value of phase current can be obtained by summing up the active and reactive current reference [254].
DVR plays a vital role in eliminating voltage-related problems like sudden rise or fall of voltage, spikes, swell, etc. It injects a voltage to prevent any disturbance in the load side voltage and is connected in series with the source side voltage [255]. The use of MLI in DVR enhances the capability of voltage injection to the maximum that can be applied for medium voltage application without using a transformer [256]. Here, the grid voltage and reference voltage comparison yield the reference value for the DVR output voltage (voltage sag value). PI controller is utilized to regulate the voltage level of the load and output voltage of the boost converter having a feedback control. The reference signal of MLI can be calculated by dividing the control output by the DC link voltage. The transformation ratio of the boost converter can be computed by its duty cycle. A crucial issue in DVR is the transformer’s magnetic saturation, which causes the production of a large inrush current. Authors in [257] have suggested a novel modulation scheme called direct magnetizing flux linkage control for preventing the transformer from getting saturated, as illustrated in Figure 31. The overall modulation approach is divided into three loops depending upon their functions.
Loop 1 is called the flux linkage loop for tracking the flux linkage command. For attenuating the DC flux, linkage loop two, known as the integral feedback loop, is present. Loop 3 is utilized for tracking the compensation voltage command. To limit the linkage of flux, a flux linkage limiter is added between loop two and loop 3. Researchers in [258,259] have discussed the importance of MLI for unified power quality controller (UPQC) operations. A CHB-MLI is applied for DVR operation in [260].

5.3. Motor Drives

The basic necessity for an extraordinary function of an electric motor drive unit is its accurate torque control. A deep insight into the present literature reveals that control of field and torque for an induction machine serve as the two most remarkable control schemes [261]. In [262], authors have stated that direct control of torque can be directly switched on to an inverter without needing the regulation of stator current. However, the torque and flux generating units are separately controlled for field control. In [263], a recent control scheme is proposed for IM by CHB-MLI prone to a faulted condition. The block diagram of rotor flux linkage-oriented control as used in [263] is demonstrated in Figure 32. In [264,265,266], artificial neural network control [267] is used in IM to improve performance parameters. In addition to that, a reduced switch count MLI topology was executed with IM control for enhancing the quality of power, thereby lowering the THD of the output voltage.

6. Future Work

MLIs undoubtedly have been the state of art and technology for power conversion from DC to AC, electrical energy employment, and a wide range of power applications in the present era. However, some of the major shortcomings in the implementation of MLI technology can be listed: (i) cost of manufacturing enhances as the number of switching devices used is more and (ii) addition of power electronic units may lead to the incorporation of more gate driving circuits, voltage and frequency control methods and complicated switching techniques making the control unit more complicated.
In order to cope up with the above issues, researchers are opting out ways for a trade-off among the increased levels and complications in the design and working. Intending to assist the hassle-free integration of MLI technology in the present era, this comprehensive review has suggested some vital points that can be adopted in the future for further possible enhanced application of MLI technology in the various field of power systems.
(1)
More research on contemporary topologies regarding the use of less power electronic interfaces, low cost, enhanced reliability, and efficiency should be developed.
(2)
Studies on designing a less complex inverter should be carried out.
(3)
Semiconductors with a large bandgap can be adopted for considerable increment in the switching frequency, thus facilitating the use of the smaller size of switching units.
(4)
The control and modulation schemes for MLI implementation should be further enhanced with more robust, modular, and fault-tolerance capability.
(5)
More in-depth work in the area of numerical methods for the solution of non-linear equations of MLI needs to be undertaken.
(6)
Extensive study is also required to balance the rise in temperature of the semiconductor devices used in the MLIs.
(7)
Integration of faster microprocessor units with the ability to work with high-level inverters and faster switching device applications should be adopted.
(8)
Building up more robust modulation schemes to assure uniformity in the rise of temperature of all devices and reduction in the complication of the controllers.
(9)
Design of reduced capacitor size by undertaking new voltage balancing methods needs to be used in MLI to enhance inverter’s power density.
(10)
Setting up of resonant converters basing on single DC source MLIs is recommended.

7. Conclusions

The upgradation and advancement of different industries and academic research globally have led to an increased demand for high energy-based efficient converters. The MLIs have attained tremendous demand due to their inherent merits and play a significant role in DC/AC conversion operations for both high/medium voltage and high power applications. In this regard, this review article attempts to critically survey the evolution of MLIs, which would serve as a prominent guideline for the researchers working in this area. This comprehensive paper throws light on the traditional MLI topologies, new reduced switch count topologies, various control approaches, applications of MLI to renewable energy interface, FACTS devices, and motor drives in detail. A thorough review of the literature reveals that the recently developed reduced switch count MLI topologies possesses many merits over the classical techniques in terms of better clarity of output waveform, low modularity, reduced number of switches, occupies minimum space, ease of control, and cost effectiveness.
Further, for easy analysis, a precise comparison among all the categories of MLI about advantages and shortcomings has been tabulated. This research article also projects a thorough idea about all conventional and newly adopted modulation techniques for different MLI topologies. This review also serves as a major objective to understand the vital role played by MLI in the areas of application for renewable energy, FACTS devices, and electric motor drives. The article’s primary focus is the suggested key points to be incorporated in future research work to integrate the MLI technology more efficiently. The article is promising for obtaining maximum useful knowledge to the academicians, pursuing research in MLI field, in the fact of the suitable configuration selection for definite operation, proper schemes of switching and control, parameter selection and manifests real-time application to other sectors of the power system.

Author Contributions

Conceptualization, S.C and T.D; methodology, S.C.; validation, M.B., S.K. and F.J.; formal analysis, S.C and F.Z; investigation, S.C and M.B.; resources, S.K. and F.J.; writing—original draft preparation, S.C.; writing—review and editing, S.C, and T.D.; supervision, F.J.; All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

NA.

Informed Consent Statement

NA.

Data Availability Statement

Authors may provide data on due request.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Diaz, M.; Cardenas, R.; Espinoza, M.; Rojas, F.; Mora, A.; Clare, J.C.; Wheeler, P. Control of Wind Energy Conversion Systems Based on the Modular Multilevel Matrix Converter. IEEE Trans. Ind. Electron. 2017, 64, 8799–8810. [Google Scholar] [CrossRef]
  2. Wang, M.; Hu, Y.; Zhao, W.; Wang, Y.; Chen, G. Application of modular multilevel converter in medium voltage high power permanent magnet synchronous generator wind energy conversion systems. IET Renew. Power Gener. 2016, 10, 824–833. [Google Scholar] [CrossRef]
  3. Liu, Y.; Ge, B.; Abu-Rub, H.; Peng, F.Z. An Effective Control Method for Quasi-Z-Source Cascade Multilevel Inverter-Based Grid-Tie Single-Phase Photovoltaic Power System. IEEE Trans. Ind. Inform. 2013, 10, 399–407. [Google Scholar] [CrossRef]
  4. Ng, C.H.; Parker, M.A.; Ran, L.; Tavner, P.J.; Bumby, J.R.; Spooner, E. A multilevel modular converter for a large, light weight wind turbine generator. IEEE Trans. Power Electron. 2008, 23, 1062–1074. [Google Scholar] [CrossRef] [Green Version]
  5. Islam, R.; Guo, Y.; Zhu, J. A High-Frequency Link Multilevel Cascaded Medium-Voltage Converter for Direct Grid Integration of Renewable Energy Systems. IEEE Trans. Power Electron. 2013, 29, 4167–4182. [Google Scholar] [CrossRef]
  6. Debnath, S.; Saeedifard, M. A New Hybrid Modular Multilevel Converter for Grid Connection of Large Wind Turbines. IEEE Trans. Sustain. Energy 2013, 4, 1051–1064. [Google Scholar] [CrossRef]
  7. Chivite-Zabalza, J.; Izurza-Moreno, P.; Madariaga, D.; Calvo, G.; Rodríguez, M.A. Voltage Balancing control in 3-Level Neutral-Point Clamped Inverters Using Triangular Carrier PWM Modulation for FACTS Applications. IEEE Trans. Power Electron. 2013, 28, 4473–4484. [Google Scholar] [CrossRef]
  8. Ara, A.L.; Kazemi, A.; Niaki, S.A.N. Multiobjective Optimal Location of FACTS Shunt-Series Controllers for Power System Operation Planning. IEEE Trans. Power Deliv. 2011, 27, 481–490. [Google Scholar] [CrossRef]
  9. Hao, Q.; Ooi, B.-T. Tap for Classical HVDC Based on Multilevel Current-Source Inverters. IEEE Trans. Power Deliv. 2010, 25, 2626–2632. [Google Scholar] [CrossRef]
  10. Soto, D.; Green, T. A comparison of high-power converter topologies for the implementation of FACTS controllers. IEEE Trans. Ind. Electron. 2002, 49, 1072–1080. [Google Scholar] [CrossRef] [Green Version]
  11. Nami, A.; Liang, J.; Dijkhuizen, F.; Demetriades, G.D. Modular Multilevel Converters for HVDC Applications: Review on Converter Cells and Functionalities. IEEE Trans. Power Electron. 2014, 30, 18–36. [Google Scholar] [CrossRef]
  12. Ghat, M.B.; Shukla, A. A new H-bridge hybrid modular converter (HBHMC) for HVDC application: Operating modes, control, and voltage balancing. IEEE Trans. Power Electron. 2017, 33, 6537–6554. [Google Scholar] [CrossRef]
  13. Jung, J.-J.; Cui, S.; Lee, J.-H.; Sul, S.-K. A New Topology of Multilevel VSC Converter for a Hybrid HVDC Transmission System. IEEE Trans. Power Electron. 2016, 32, 4199–4209. [Google Scholar] [CrossRef]
  14. Feldman, R.; Tomasini, M.; Amankwah, E.; Clare, J.; Wheeler, P.; Trainer, D.R.; Whitehouse, R.S. A Hybrid Modular Multilevel Voltage Source Converter for HVDC Power Transmission. IEEE Trans. Ind. Appl. 2013, 49, 1577–1588. [Google Scholar] [CrossRef]
  15. Sajadi, R.; Iman-Eini, H.; Bakhshizadeh, M.K.; Neyshabouri, Y.; Farhangi, S. Selective Harmonic Elimination Technique with Control of Capacitive DC-Link Voltages in an Asymmetric Cascaded H-Bridge Inverter for STATCOM Application. IEEE Trans. Ind. Electron. 2018, 65, 8788–8796. [Google Scholar] [CrossRef] [Green Version]
  16. Babu, N.N.V.S.; Fernandes, B.G. Cascaded Two-Level Inverter-Based Multilevel STATCOM for High-Power Applications. IEEE Trans. Power Deliv. 2014, 29, 993–1001. [Google Scholar] [CrossRef]
  17. Haw, L.K.; Dahidah, M.S.A.; Almurib, H. SHE–PWM Cascaded Multilevel Inverter with Adjustable DC Voltage Levels Control for STATCOM Applications. IEEE Trans. Power Electron. 2014, 29, 6433–6444. [Google Scholar] [CrossRef]
  18. Liu, Y.; Luo, F. Trinary hybrid multilevel inverter used in STATCOM with unbalanced voltages. IEE Proc. Electr. Power Appl. 2005, 152, 1203–1222. [Google Scholar] [CrossRef]
  19. Liu, Y.; Yang, S.; Wang, X.; Gunasekaran, D.; Karki, U.; Peng, F.Z. Application of Transformer-Less UPFC for Interconnecting Two Synchronous AC Grids with Large Phase Difference. IEEE Trans. Power Electron. 2015, 31, 6092–6103. [Google Scholar] [CrossRef]
  20. Peng, F.Z.; Liu, Y.; Yang, S.; Zhang, S.; Gunasekaran, D.; Karki, U. Transformer-Less Unified Power-Flow Controller Using the Cascade Multilevel Inverter. IEEE Trans. Power Electron. 2016, 31, 5461–5472. [Google Scholar] [CrossRef]
  21. Wang, J.; Peng, F. Unified Power Flow Controller Using the Cascade Multilevel Inverter. IEEE Trans. Power Electron. 2004, 19, 1077–1084. [Google Scholar] [CrossRef]
  22. Rao, G.S.; Raju, S.S. Multilevel Inverter-Based Power Quality Improvement in Grid-Connected DVR System. In Micro-Electronics and Telecommunication Engineering; Springer: Singapore; pp. 361–366. [CrossRef]
  23. Dinesh, T. Performance Improvement of Constant Current Controller Based T-type DVR Multilevel Inverter for Solar PV Integrated with Grid. Turk. J. Comput. Math. Educ. (TURCOMAT) 2021, 12, 1465–1470. [Google Scholar]
  24. Hoon, Y.; Radzi, M.A.M.; Hassan, M.K.; Mailah, N.F. Operation of Three-Level Inverter-Based Shunt Active Power Filter under Nonideal Grid Voltage Conditions with Dual Fundamental Component Extraction. IEEE Trans. Power Electron. 2017, 33, 7558–7570. [Google Scholar] [CrossRef]
  25. Shu, Z.; Lin, H.; Ziwei, Z.; Yin, X.; Zhou, Q. Specific order harmonics compensation algorithm and digital implementation for multi-level active power filter. IET Power Electron. 2017, 10, 525–535. [Google Scholar] [CrossRef]
  26. Quraan, M.; Tricoli, P.; Arco, S.D.; Piegari, L. Efficiency Assessment of Modular Multilevel Converters for Battery Electric Vehicles. IEEE Trans. Power Electron. 2016, 32, 2041–2051. [Google Scholar] [CrossRef]
  27. Ali, M.; Mansoor, M.; Tang, H.; Rana, A. Analysis of a seven-level asymmetrical hybrid multilevel converter for traction systems. IET Power Electron. 2017, 10, 1878–1888. [Google Scholar] [CrossRef]
  28. Youssef, M.Z.; Woronowicz, K.; Aditya, K.; Azeez, N.A.; Williamson, S.S. Design and Development of an Efficient Multilevel DC/AC Traction Inverter for Railway Transportation Electrification. IEEE Trans. Power Electron. 2015, 31, 3036–3042. [Google Scholar] [CrossRef]
  29. Pereda, J.; Dixon, J. 23-Level Inverter for Electric Vehicles Using a Single Battery Pack and Series Active Filters. IEEE Trans. Veh. Technol. 2012, 61, 1043–1051. [Google Scholar] [CrossRef]
  30. Khoucha, F.; Lagoun, S.M.; Marouani, K.; Kheloui, A.; Benbouzid, M.E.H. Hybrid Cascaded H-Bridge Multilevel-Inverter Induction-Motor-Drive Direct Torque Control for Automotive Applications. IEEE Trans. Ind. Electron. 2009, 57, 892–899. [Google Scholar] [CrossRef] [Green Version]
  31. Du, Z.; Ozpineci, B.; Tolbert, L.; Chiasson, J.N. DC–AC Cascaded H-Bridge Multilevel Boost Inverter with No Inductors for Electric/Hybrid Electric Vehicle Applications. IEEE Trans. Ind. Appl. 2009, 45, 963–970. [Google Scholar] [CrossRef]
  32. Carpita, M.; Marchesoni, M.; Pellerin, M.; Moser, D. Multilevel Converter for Traction Applications: Small-Scale Prototype Tests Results. IEEE Trans. Ind. Electron. 2008, 55, 2203–2212. [Google Scholar] [CrossRef]
  33. Tolbert, L.; Peng, F.Z.; Cunnyngham, T.; Chiasson, J. Charge balance control schemes for cascade multilevel converter in hybrid electric vehicles. IEEE Trans. Ind. Electron. 2002, 49, 1058–1064. [Google Scholar] [CrossRef] [Green Version]
  34. Bucknall, R.W.G.; Ciaramella, K.M. On the Conceptual Design and Performance of a Matrix Converter for Marine Electric Propulsion. IEEE Trans. Power Electron. 2009, 25, 1497–1508. [Google Scholar] [CrossRef]
  35. Apsley, J.; Gonzalez-Villasenor, A.; Barnes, M.; Smith, A.; Williamson, S.; Schuddebeurs, J.D.; Norman, P.J.; Booth, C.; Burt, G.; McDonald, J.R. Propulsion Drive Models for Full Electric Marine Propulsion Systems. IEEE Trans. Ind. Appl. 2009, 45, 676–684. [Google Scholar] [CrossRef]
  36. Gritter, D.; Kalsi, S.; Henderson, N. Variable speed electric drive options for electric ships. In Proceedings of the IEEE Electric Ship Technologies Symposium, Philadelphia, PA, USA, 27 July 2005; pp. 347–354. [Google Scholar] [CrossRef]
  37. Corzine, K.A.; Lu, S. Comparison of hybrid propulsion drive schemes. In Proceedings of the IEEE Electric Ship Technologies Symposium, Philadelphia, PA, USA, 27 July 2005; pp. 355–362. [Google Scholar] [CrossRef]
  38. Shuai, L.; Corzine, K. Multilevel multi-phase propulsion drives. In Proceedings of the IEEE Electric Ship Technologies Symposium, Philadelphia, PA, USA, 27 July 2005; pp. 363–370. [Google Scholar] [CrossRef]
  39. Rodriguez, J.; Lai, J.; Peng, F.Z. Multilevel inverters: A survey of topologies, controls, and applications. IEEE Trans. Ind. Electron. 2002, 49, 724–738. [Google Scholar] [CrossRef] [Green Version]
  40. Rodriguez, J.; Pontt, J.; Alzarnora, G.; Becker, N.S.; Einenkel, O.; Weinstein, A.J. Novel 20-MW downhill conveyor system using three-level converters. IEEE Trans. Ind. Electron. 2002, 49, 1093–1100. [Google Scholar] [CrossRef]
  41. Kouro, S.; Rebolledo, J.; Rodríguez, J. Reduced switching-frequency-modulation algorithm for high-power multilevel inverters. IEEE Trans. Ind. Electron. 2007, 54, 2894–2901. [Google Scholar] [CrossRef]
  42. Sabate, J.; Garces, L.J.; Szczesny, P.M.; Li, Q.; Wirth, W.F. High-power high-fidelity switching amplifier driving gradient coils for MRI systems. In Proceedings of the 2004 IEEE 35th Annual Power Electronics Specialists Conference, Aachen, Germany, 20–25 June 2004; Volume 1, pp. 261–266. [Google Scholar] [CrossRef]
  43. Yue, Y.; Xu, Q.; Luo, A.; Guo, P.; He, Z.; Li, Y. Analysis and control of tundish induction heating power supply using modular multilevel converter. IET Gener. Transm. Distrib. 2018, 12, 3452–3460. [Google Scholar] [CrossRef]
  44. Siahbalaee, J.; Sanaie, N. Comparison of conventional and new cascaded multilevel inverter topologies based on novel indices. ISA Trans. 2021. [Google Scholar] [CrossRef] [PubMed]
  45. Islam, M.; Mekhilef, S.; Hasan, M. Single phase transformerless inverter topologies for grid-tied photovoltaic system: A review. Renew. Sustain. Energy Rev. 2015, 45, 69–86. [Google Scholar] [CrossRef] [Green Version]
  46. Chamarthi, P.K.; Al-Durra, A.; El-Fouly, T.H.M.; Al Jaafari, K.A. A Novel Three-Phase Transformerless Cascaded Multilevel Inverter Topology for Grid-Connected Solar PV Applications. IEEE Trans. Ind. Appl. 2021, 57, 2285–2297. [Google Scholar] [CrossRef]
  47. Kazmierkowski, M.P.; Franquelo, L.G.; Rodriguez, J.; Perez, M.A.; Leon, J.I. High-performance motor drives. IEEE Ind. Electron. Mag. 2011, 5, 6–26. [Google Scholar] [CrossRef] [Green Version]
  48. Kouro, S.; Malinowski, M.; Gopakumar, K.; Pou, J.; Franquelo, L.G.; Wu, B.; Rodriguez, J.; Perez, M.A.; Leon, J.I. Recent Advances and Industrial Applications of Multilevel Converters. IEEE Trans. Ind. Electron. 2010, 57, 2553–2580. [Google Scholar] [CrossRef]
  49. Khoucha, F.; Lagoun, M.S.; Kheloui, A.; Benbouzid, M.E.H. A Comparison of Symmetrical and Asymmetrical Three-Phase H-Bridge Multilevel Inverter for DTC Induction Motor Drives. IEEE Trans. Energy Convers. 2010, 26, 64–72. [Google Scholar] [CrossRef] [Green Version]
  50. Ali, A.I.M.; Sayed, M.A.; Takeshita, T. Isolated single-phase single-stage DC-AC cascaded transformer-based multilevel inverter for stand-alone and grid-tied applications. Int. J. Electr. Power Energy Syst. 2020, 125, 106534. [Google Scholar] [CrossRef]
  51. Agrawal, R.; Jain, S. Comparison of reduced part count multilevel inverters (RPC-MLIs) for integration to the grid. Int. J. Electr. Power Energy Syst. 2017, 84, 214–224. [Google Scholar] [CrossRef]
  52. Baker, R.H.; Bannister, L.H. Electric Power Converter. U.S. Patent 3,867,643, 18 February 1975. [Google Scholar]
  53. Mcmurray, W. Fast Response Stepped-Wave Switching Power Converter Circuit. U.S. Patent 3,581,212, 25 May 1971. [Google Scholar]
  54. Dickerson, J.A.; Ottaway, G.H. Transformerless Power Supply with Line to Load Isolation. U.S. Patent No. 3,596,369, 3 August 1971. [Google Scholar]
  55. Peng, F.Z.; Lai, J.-S.; McKeever, J.; VanCoevering, J. A multilevel voltage-source inverter with separate DC sources for static VAr generation. IEEE Trans. Ind. Appl. 1996, 32, 1130–1138. [Google Scholar] [CrossRef] [Green Version]
  56. Akira, N.; Takahashi, I.; Akagi, H. A new neutral-point-clamped PWM inverter. IEEE Trans. Ind. Appl. 1981, 5, 518–523. [Google Scholar]
  57. Baker, R.H. High-Voltage Converter Circuit. U.S. Patent 4,203,151, 13 May 1980. [Google Scholar]
  58. Baker, R.H. Bridge Converter Circuit. U.S. Patent 4,270,163, 26 May 1981. [Google Scholar]
  59. Rodriguez, J.; Bernet, S.; Steimer, P.K.; Lizama, I.E. A survey on neutral-point-clamped inverters. IEEE Trans. Ind. Electron. 2009, 57, 2219–2230. [Google Scholar] [CrossRef]
  60. Meynard, T.; Foch, H. Multi-level conversion: High voltage choppers and voltage-source inverters. In Proceedings of the PESC’92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, Toledo, Spain, 29 June–3 July 1992; Volume 1, pp. 397–403. [Google Scholar] [CrossRef]
  61. Lavieville, J.; Carrere, P.; Meynard, T. Electronic Circuit for Converting Electrical Energy, and a Power Supply Installation Making Use Thereof. U.S. Patent 5,668,711, 16 September 1997. [Google Scholar]
  62. Marquardt, R. Stromrichterschaltungen mit Verteilten Energiespeichern. German Patent DE10103031A1, 24 January 2001. [Google Scholar]
  63. Rainer, M.; Lesnicar, A.; Hildinger, J. Modulares Stromrichterkonzept für Netzkupplungsanwendung bei Hohen Spannungen; ETG-Fachtagung: Bad Nauheim, Germany, 2002; p. 114. [Google Scholar]
  64. Peng, F.Z. A generalized multilevel inverter topology with self voltage balancing. IEEE Trans. Ind. Appl. 2001, 37, 611–618. [Google Scholar] [CrossRef]
  65. Barbosa, P.; Steimer, P.; Meysenc, L.; Winkelnkemper, M.; Steinke, J.; Celanovic, N. Active neutral-point-clamped multilevel converters. In Proceedings of the IEEE 36th Power Electronics Specialists Conference, Dresden, Germany, 16 June 2005; pp. 2296–2301. [Google Scholar]
  66. Omer, P.; Kumar, J.; Surjan, B.S. A Review on Reduced Switch Count Multilevel Inverter Topologies. IEEE Access 2020, 8, 22281–22302. [Google Scholar] [CrossRef]
  67. Siddique, M.D.; Iqbal, A.; Memon, M.A.; Mekhilef, S. A New Configurable Topology for Multilevel Inverter with Reduced Switching Components. IEEE Access 2020, 8, 188726–188741. [Google Scholar] [CrossRef]
  68. Bruckner, T.; Bernet, S.; Guldner, H. The Active NPC Converter and Its Loss-Balancing Control. IEEE Trans. Ind. Electron. 2005, 52, 855–868. [Google Scholar] [CrossRef]
  69. Gupta, K.K.; Jain, S. A Novel Multilevel Inverter Based on Switched DC Sources. IEEE Trans. Ind. Electron. 2013, 61, 3269–3278. [Google Scholar] [CrossRef]
  70. Babaei, E.; Laali, S.; Alilu, S. Cascaded Multilevel Inverter with Series Connection of Novel H-Bridge Basic Units. IEEE Trans. Ind. Electron. 2014, 61, 6664–6671. [Google Scholar] [CrossRef]
  71. Babaei, E. A Cascade Multilevel Converter Topology with Reduced Number of Switches. IEEE Trans. Power Electron. 2008, 23, 2657–2664. [Google Scholar] [CrossRef]
  72. Su, G. Multilevel DC-link inverter. IEEE Trans. Ind. Appl. 2005, 41, 848–854. [Google Scholar] [CrossRef]
  73. Mudadla, D.; Rao, G.R.; Sandeep, N. Novel asymmetrical multilevel inverter topology with reduced number of switches for photovoltaic applications. In Proceedings of the 2015 International Conference on Computation of Power, Energy,, Information and Communication (ICCPEIC), Melmaruvathur, India, 22–23 April 2015; pp. 123–128. [Google Scholar] [CrossRef]
  74. Gautam, S.P.; Kumar, L.; Gupta, S. A modified structure for symmetrical and asymmetrical configuration of multilevel inverter. In Proceedings of the IECON 2015-41st Annual Conference of the IEEE Industrial Electronics Society, Yokohama, Japan, 9–12 November 2015; pp. 1430–1435. [Google Scholar] [CrossRef]
  75. Kashif, M.F.; Rashid, A.K. A multilevel inverter topology with reduced number of switches. In Proceedings of the 2016 International Conference on Intelligent Systems Engineering (ICISE), Islamabad, Pakistan, 15–17 January 2016; pp. 268–271. [Google Scholar]
  76. Kang, S.H.; Lee, F.S. A new structure of H-bridge multilevel inverter. In Proceedings of the Annual Fall Conference of Power Electronics (KIPE Conference), Goyang, Korea, 31 October 2008; pp. 388–390. [Google Scholar]
  77. Choi, W.; Kang, F. H-bridge based multilevel inverter using PWM switching function. In Proceedings of the INTELEC 2009-31st International Telecommunications Energy Conference, Incheon, Korea, 18–22 October 2009; pp. 1–5. [Google Scholar]
  78. Najafi, E.; Yatim, A.H. Design and Implementation of a New Multilevel Inverter Topology. IEEE Trans. Ind. Electron. 2011, 59, 4148–4154. [Google Scholar] [CrossRef]
  79. Ebrahimi, J.; Babaei, E.; Gharehpetian, G.B. A New Multilevel Converter Topology with Reduced Number of Power Electronic Components. IEEE Trans. Ind. Electron. 2011, 59, 655–667. [Google Scholar] [CrossRef]
  80. Ceglia, G.; Guzman, V.; Sanchez, C.; Ibanez, F.; Walter, J.; Gimenez, M. A New Simplified Multilevel Inverter Topology for DC–AC Conversion. IEEE Trans. Power Electron. 2006, 21, 1311–1319. [Google Scholar] [CrossRef]
  81. Martins, G.; Pomilio, J.A.; Buso, S.; Spiazzi, G. Three-Phase Low-Frequency Commutation Inverter for Renewable Energy Systems. IEEE Trans. Ind. Electron. 2006, 53, 1522–1528. [Google Scholar] [CrossRef]
  82. Rahim, N.A.; Chaniago, K.; Selvaraj, J. Single-Phase Seven-Level Grid-Connected Inverter for Photovoltaic System. IEEE Trans. Ind. Electron. 2010, 58, 2435–2443. [Google Scholar] [CrossRef]
  83. Farhadi-Kangarlu, M.; Babaei, E. A Generalized Cascaded Multilevel Inverter Using Series Connection of Submultilevel Inverters. IEEE Trans. Power Electron. 2012, 28, 625–636. [Google Scholar] [CrossRef]
  84. Narimani, M.; Wu, B.; Zargari, N.R. A Novel Five-Level Voltage Source Inverter with Sinusoidal Pulse Width Modulator for Medium-Voltage Applications. IEEE Trans. Power Electron. 2015, 31, 1959–1967. [Google Scholar] [CrossRef]
  85. Le, Q.A.; Lee, D.-C. A Novel Six-Level Inverter Topology for Medium-Voltage Applications. IEEE Trans. Ind. Electron. 2016, 63, 7195–7203. [Google Scholar] [CrossRef]
  86. Kumari, M.; Siddique, M.D.; Sarwar, A.; Tariq, M.; Mekhilef, S.; Iqbal, A. Recent trends and review on switched-capacitor-based single-stage boost multilevel inverter. Int. Trans. Electr. Energy Syst. 2021, 31, e12730. [Google Scholar] [CrossRef]
  87. Kaarthik, R.S.; Kshirsagar, A.; Gopakumar, K. Generation of Higher Number of Voltage Levels by Stacking Inverters of Lower Multilevel Structures with Low Voltage Devices for Drives. IEEE Trans. Power Electron. 2017, 32, 52–59. [Google Scholar] [CrossRef]
  88. Panda, K.P.; Bana, P.R.; Panda, G. A Switched-Capacitor Self-Balanced High-Gain Multilevel Inverter Employing a Single DC Source. IEEE Trans. Circuits Syst. II Express Briefs 2020, 67, 3192–3196. [Google Scholar] [CrossRef]
  89. Yeganeh, M.S.O.; Davari, P.; Chub, A.; Mijatovic, N.; Dragicevic, T.; Blaabjerg, F. A Single-Phase Reduced Component Count Asymmetrical Multilevel Inverter Topology. IEEE J. Emerg. Sel. Top. Power Electron. 2021, 1. [Google Scholar] [CrossRef]
  90. Tolbert, L.; Peng, F.; Habetler, T. Multilevel inverters for electric vehicle applications. In Proceedings of the Power Electronics in Transportation (Cat. No.98TH8349), Dearborn, MI, USA, 22–23 October 1998; pp. 79–84. [Google Scholar] [CrossRef] [Green Version]
  91. Bendre, A.; Krstic, S.; Meer, J.; Venkataramanan, G. Comparative evaluation of modulation algorithms for neutral point clamped converters. In Proceedings of the Conference Record of the 2004 IEEE Industry Applications Conference, Seattle, WA, USA, 3–7 October 2004; Volume 2, pp. 798–805. [Google Scholar] [CrossRef] [Green Version]
  92. Joos, G.; Huang, X.; Ooi, B.-T. Direct-coupled multilevel cascaded series VAr compensators. IEEE Trans. Ind. Appl. 1998, 34, 1156–1163. [Google Scholar] [CrossRef]
  93. Çolak, I.; Kabalci, E. A review on inverter topologies and developments. In Proceedings of the Electrics, Electronics and Computer Engineering Symposium, Bursa, Turkey, 26–30 November; 2008. [Google Scholar]
  94. Purkait, P.; Sriramakavacham, R.S. A New Generalized Space Vector Modulation Algorithm for Neutral-point-clamped Multilevel Converters. PIERS Online 2006, 2, 330–335. [Google Scholar] [CrossRef] [Green Version]
  95. Sadigh, A.K.; Hosseini, S.H.; Sabahi, M.; Gharehpetian, G.B. Double Flying Capacitor Multicell Converter Based on Modified Phase-Shifted Pulsewidth Modulation. IEEE Trans. Power Electron. 2009, 25, 1517–1526. [Google Scholar] [CrossRef]
  96. Bruckner, T.; Bemet, S. Loss balancing in three-level voltage source inverters applying active NPC switches. In Proceedings of the IEEE 32nd Annual Power Electronics Specialists Conference (IEEE Cat. No. 01CH37230), Vancouver, Canada, 17–21 June 2001; Volume 2, pp. 1135–1140. [Google Scholar] [CrossRef]
  97. Barbosa, P.; Steimer, P.; Steinke, J.; Winkelnkemper, M.; Celanovic, N. Active-neutral-point-clamped (ANPC) multilevel converter technology. In Proceedings of the 2005 European Conference on Power Electronics and Applications, Dresden, Germany, 11–14 September 2005; pp. 1–10. [Google Scholar]
  98. Lesnicar, A.; Marquardt, R. An innovative modular multilevel converter topology suitable for a wide power range. In Proceedings of the 2003 IEEE Bologna Power Tech Conference Proceedings, Bologna, Italy, 23–26 June 2004; Volume 3, pp. 1–6. [Google Scholar] [CrossRef]
  99. Pérez, M.; Ceballos, S.; Konstantinou, G.; Pou, J.; Aguilera, R. Modular Multilevel Converters: Recent Achievements and Challenges. IEEE Open J. Ind. Electron. Soc. 2021, 2, 224–239. [Google Scholar] [CrossRef]
  100. Kurtoğlu, M.; Eroğlu, F.; Arslan, A.O.; Vural, A.M. Recent contributions and future prospects of the modular multilevel converters: A comprehensive review. Int. Trans. Electr. Energy Syst. 2018, 29, e2763. [Google Scholar] [CrossRef]
  101. Vozikis, D.; Adam, G.; Rault, P.; Despouys, O.; Holliday, D. Enhanced Modular Multilevel Converter for HVdc Applications: Assessments of Dynamic and Transient Responses to ac and dc Faults. IEEE J. Emerg. Sel. Top. Power Electron. 2020, 1. [Google Scholar] [CrossRef] [Green Version]
  102. Tian, Y.; Wickramasinghe, H.R.; Pou, J.; Konstantinou, G. Loss distribution and characterization of MMC sub-modules for HVDC applications. Int. Trans. Electr. Energy Syst. 2021, e13042. [Google Scholar] [CrossRef]
  103. Yu, P.; Fu, W.; Wang, L.; Zhou, Z.; Wang, G.; Zhang, Z. Reliability-Centered Maintenance for Modular Multilevel Converter in HVDC Transmission Application. IEEE J. Emerg. Sel. Top. Power Electron. 2020, 9, 3166–3176. [Google Scholar] [CrossRef]
  104. Martinez-Rodrigo, F.; de Pablo, S.; de Lucas, L.C.H. Current control of a modular multilevel converter for HVDC applications. Renew. Energy 2015, 83, 318–331. [Google Scholar] [CrossRef]
  105. Sanz, I.; Moranchel, M.; Bueno, E.J.; Rodriguez, F.J. Analysis of medium voltage modular multilevel converters for FACTS applications. In Proceedings of the IECON 2016-42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, Italy, 24–27 October 2016; pp. 6459–6464. [Google Scholar] [CrossRef]
  106. Bhesaniya, M.M.; Shukla, A. Current Source Modular Multilevel Converter: Detailed Analysis and STATCOM Application. IEEE Trans. Power Deliv. 2015, 31, 323–333. [Google Scholar] [CrossRef]
  107. Vural, A.M.; Wirsiy, E.N. Three-phase modular multilevel converter based unified power flow controller. Eng. Sci. Technol. Int. J. 2019, 23, 299–306. [Google Scholar] [CrossRef]
  108. Liang, G.; Tafti, H.D.; Farivar, G.G.; Pou, J.; Townsend, C.D.; Konstantinou, G.; Ceballos, S. Analytical Derivation of Intersubmodule Active Power Disparity Limits in Modular Multilevel Converter-Based Battery Energy Storage Systems. IEEE Trans. Power Electron. 2020, 36, 2864–2874. [Google Scholar] [CrossRef]
  109. Mo, R.; Li, H. Hybrid Energy Storage System with Active Filter Function for Shipboard MVDC System Applications Based on Isolated Modular Multilevel DC/DC Converter. IEEE J. Emerg. Sel. Top. Power Electron. 2016, 5, 79–87. [Google Scholar] [CrossRef]
  110. Xu, Y.; Zhang, Z.; Wang, G.; Xu, Z. Modular Multilevel Converter with Embedded Energy Storage for Bidirectional Fault Isolation. IEEE Trans. Power Deliv. 2021, 1. [Google Scholar] [CrossRef]
  111. Hariri, R.; Sebaaly, F.; Kanaan, H.Y. A Review on Modular Multilevel Converters in Electric Vehicles. In Proceedings of the IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society, Singapore, 18–21 October 2020. [Google Scholar]
  112. Quraan, M.; Abu-Khaizaran, M.; Sa’Ed, J.; Hashlamoun, W.; Tricoli, P. Design and control of battery charger for electric vehicles using modular multilevel converters. IET Power Electron. 2020, 14, 140–157. [Google Scholar] [CrossRef]
  113. Zhou, S.; Li, B.; Wang, J.; Xu, D. A Modified Modular Multilevel Converter for Motor Drives Capable of High-Torque Operation at Zero/Low Motor Speeds. IEEE Trans. Circuits Syst. II Express Briefs 2021, 68, 2493–2497. [Google Scholar] [CrossRef]
  114. Chakraborty, S.; Maiti, S.; Bharadwaj, C.A. A Novel AC/AC Modular Multilevel Converter for Medium Voltage Variable Frequency Vector Controlled Induction Motor Drives. In Proceedings of the 2020 IEEE International Conference on Power Electronics, Smart Grid and Renewable Energy (PESGRE2020), Cochin, India, 2–4 January 2020; pp. 1–6. [Google Scholar] [CrossRef]
  115. Diab, M.; Adam, G.P.; Williams, B.W.; Massoud, A.; Ahmed, S. Quasi two-level PWM operation of a nine-arm modular multilevel converter for six-phase medium-voltage motor drives. In Proceedings of the 2018 IEEE Applied Power Electronics Conference and Exposition (APEC), San Antonio, TX, USA, 4–8 March 2018; pp. 1641–1648. [Google Scholar] [CrossRef] [Green Version]
  116. Madi, A.I.; Hamad, M.S.; Hamdy, R.A.R.; El-Arabawy, I.F. Hybrid active power filter with modular multilevel converter. In Proceedings of the 2017 Nineteenth International Middle East Power Systems Conference (MEPCON), Cairo, Egypt, 19–21 December 2017; pp. 1100–1105. [Google Scholar]
  117. Jia, G.; Chen, M.; Tang, S.; Zhang, C.; Zhao, B. A Modular Multilevel Converter with Active Power Filter for Submodule Capacitor Voltage Ripples and Power Losses Reduction. IEEE Trans. Power Electron. 2020, 35, 11401–11417. [Google Scholar] [CrossRef]
  118. António-Ferreira, A.; Collados-Rodríguez, C.; Gomis-Bellmunt, O. Modulation techniques applied to medium voltage modular multilevel converters for renewable energy integration: A review. Electr. Power Syst. Res. 2018, 155, 21–39. [Google Scholar] [CrossRef] [Green Version]
  119. Shahnazian, F.; Adabi, J.; Pouresmaeil, E.; Catalão, J.P. Interfacing modular multilevel converters for grid integration of renewable energy sources. Electr. Power Syst. Res. 2018, 160, 439–449. [Google Scholar] [CrossRef] [Green Version]
  120. Basu, T.S.; Maiti, S. A Hybrid Modular Multilevel Converter for Solar Power Integration. IEEE Trans. Ind. Appl. 2019, 55, 5166–5177. [Google Scholar] [CrossRef]
  121. Novakovic, B.; Nasiri, A. Modular Multilevel Converter for Wind Energy Storage Applications. IEEE Trans. Ind. Electron. 2017, 64, 8867–8876. [Google Scholar] [CrossRef]
  122. Wang, W.; Ma, K.; Cai, X. Efficient Capacitor Voltage Balancing Method for Modular Multilevel Converter Under Carrier-Phase-Shift Pulsewidth Modulation. IEEE Trans. Power Electron. 2020, 36, 1553–1562. [Google Scholar] [CrossRef]
  123. Sun, C.; Zhang, X.; Cai, X. A Step-Up Nonisolated Modular Multilevel DC–DC Converter with Self-Voltage Balancing and Soft Switching. IEEE Trans. Power Electron. 2020, 35, 13017–13030. [Google Scholar] [CrossRef]
  124. Tashakor, N.; Kilictas, M.; Fang, J.; Goetz, S.M. Switch-Clamped Modular Multilevel Converters with Sensorless Voltage Balancing Control. IEEE Trans. Ind. Electron. 2020, 68, 9586–9597. [Google Scholar] [CrossRef]
  125. Oghorada, O.J.K.; Zhang, L.; Han, H.; Esan, A.B.; Mao, M. Inter-cluster voltage balancing control of a delta connected modular multilevel cascaded converter under unbalanced grid voltage. Prot. Control. Mod. Power Syst. 2021, 6, 1–11. [Google Scholar] [CrossRef]
  126. Luo, W.; Ma, Y.; Zheng, C. Selection-based capacitor voltage balancing control for modular multilevel converters. J. Power Electron. 2021, 1–12. [Google Scholar] [CrossRef]
  127. Guo, L.; Sun, Y.; Jin, N. A Capacitor Voltage Balancing Control Strategy for Modular Multilevel Converter. Electr. Power Components Syst. 2020, 48, 1410–1420. [Google Scholar] [CrossRef]
  128. Ji, S.; Zhang, L.; Huang, X.; Palmer, J.; Wang, F.; Tolbert, L.M. A Novel Voltage Balancing Control with dv/dt Reduction for 10-kV SiC MOSFET-Based Medium Voltage Modular Multilevel Converter. IEEE Trans. Power Electron. 2020, 35, 12533–12543. [Google Scholar] [CrossRef]
  129. Zhou, S.; Wen, B.; Wang, J.; Burgos, R.; Boroyevich, D. Design and Hardware Implementation of the Peak Current Mode Switching Cycle Control for Voltage Balancing of Modular Multilevel Converters. In Proceedings of the 2021 IEEE Applied Power Electronics Conference and Exposition (APEC), Phoenix, AZ, USA, 21–25 March 2021; pp. 1134–1139. [Google Scholar] [CrossRef]
  130. Kumar, M.A.; Gopi, A.K.; Biswas, J.; Barai, M. A Voltage Balancing Scheme for Modular Multilevel Converter Based on Charge Variation in Each Cycle. IEEE J. Emerg. Sel. Top. Ind. Electron. 2021, 2, 173–183. [Google Scholar] [CrossRef]
  131. Wang, C.; Hu, S.; Peng, H.; He, L.; Fan, S. Modulation Coordinated Voltage Balance Strategy for a Dual-T-Type Modular Multilevel Converter. IEEE J. Emerg. Sel. Top. Power Electron. 2021, 1. [Google Scholar] [CrossRef]
  132. Pourgharibshahi, H.; Jafarishiadeh, S.; Mahmoudi, H.; Zargarzadeh, H.; Ahmadi, R. Novel single-armed modular multilevel converter for reducing total converter capacitance. IET Power Electron. 2020, 14, 760–774. [Google Scholar] [CrossRef]
  133. Shu, H.; Lei, S.; Tian, X. A New Topology of Modular Multilevel Converter with Voltage Self-Balancing Ability. IEEE Access 2019, 7, 184786–184796. [Google Scholar] [CrossRef]
  134. Wang, Z.; Lin, H.; Ma, Y. Improved capacitor voltage balancing control for multimode operation of modular multilevel converter with integrated battery energy storage system. IET Power Electron. 2019, 12, 2751–2760. [Google Scholar] [CrossRef]
  135. Kadandani, N.B.; Dahidah, M.; Ethni, S.; Muhammad, M. Lifetime and reliability improvements in modular multilevel converters using controlled circulating current. J. Power Electron. 2021, 1–10. [Google Scholar] [CrossRef]
  136. Kadandani, N.B.; Dahidah, M.; Ethni, S. Review of Circulating Current Control Methods in Modular Multilevel Converter. Bayero J. Eng. Technol. (BJET) 2021, 16, 62–75. [Google Scholar]
  137. Huber, J.E.; Kolar, J.W. Modular Multilevel Converter Circulating Current Control with Single Active Filter Module per Phase. In Proceedings of the 2021 22nd IEEE International Conference on Industrial Technology (ICIT), Valencia, Spain, 10–12 March 2021; Volume 1, pp. 433–439. [Google Scholar] [CrossRef]
  138. Lin, L.; He, J.; Xu, C. Analysis on Circulating Current and Split Capacitor Voltage Balance for Modular Multilevel Converter Based Three-phase Four-wire Split Capacitor DSTATCOM. J. Mod. Power Syst. Clean Energy 2021, 9, 657–667. [Google Scholar] [CrossRef]
  139. Praveena, K.; Swarnasri, K. Circulating current harmonics suppression with fuzzy controller in modular multi-level inverter. Mater. Today: Proc. 2021. [Google Scholar] [CrossRef]
  140. Narayana, T.S.; Dahiya, R. DC-link voltage compensation with fuzzy-based MMC to mitigate the low-order circulating current. Int. J. Ambient. Energy 2021, 1–10. [Google Scholar] [CrossRef]
  141. Wang, L.; Zhang, L.; Xiong, Y.; Ma, R. Low-frequency suppression strategy based on predictive control model for modular multilevel converters. J. Power Electron. 2021, 1–9. [Google Scholar] [CrossRef]
  142. Chen, X.; Liu, J.; Song, S.; Ouyang, S. Circulating Harmonic Currents Suppression of Level-Increased NLM Based Modular Multilevel Converter with Deadbeat Control. IEEE Trans. Power Electron. 2020, 35, 11418–11429. [Google Scholar] [CrossRef]
  143. Uddin, W.; Zeb, K.; Adil Khan, M.; Ishfaq, M.; Khan, I.; Kim, H.-J.; Park, G.S.; Lee, C. Control of Output and Circulating Current of Modular Multilevel Converter Using a Sliding Mode Approach. Energies 2019, 12, 4084. [Google Scholar] [CrossRef] [Green Version]
  144. Kolluri, S.; Gorla, N.B.Y.; Panda, S.K. Capacitor Voltage Ripple Suppression in a Modular Multilevel Converter Using Frequency-Adaptive Spatial Repetitive-Based Circulating Current Controller. IEEE Trans. Power Electron. 2020, 35, 9839–9849. [Google Scholar] [CrossRef]
  145. Chakraborty, R.; Dey, A. Circulating Current Control of Modular Multilevel Converter with Reduced Conduction Loss for Medium-Voltage Applications. IEEE Trans. Ind. Electron. 2020, 68, 9014–9023. [Google Scholar] [CrossRef]
  146. Deng, F.; Heng, Q.; Liu, C.; Lyu, Y.; Wang, Q.; Liu, D.; Zhu, R. Circulating current suppression for MMC-HVDC systems with asymmetric arm impedance. CSEE J. Power Energy Syst. 2021, 7, 530–540. [Google Scholar]
  147. Zhang, M.; Shen, Y.; Sun, H.; Guo, R. MMC-HVDC circulating current suppression method based on improved proportional resonance control. Energy Rep. 2020, 6, 863–871. [Google Scholar] [CrossRef]
  148. Isik, S.; Alharbi, M.; Bhattacharya, S. Optimized Circulating Current Control Method based on Proportional Resonant and Proportional Integral Controllers for Modular Multi-level Converter Applications. In Proceedings of the 2020 IEEE Energy Conversion Congress and Exposition (ECCE), Detroit, MI, USA, 11–15 October 2020; pp. 5709–5715. [Google Scholar] [CrossRef]
  149. Qin, F.; Gao, F.; Wang, X.; Niu, D. Circulating Current Control Method for Nine-Arm Modular Multilevel Converter. In Proceedings of the 2020 IEEE 9th International Power Electronics and Motion Control Conference (IPEMC2020-ECCE Asia), Nanjing, China, 31 May–3 June 2020; pp. 699–703. [Google Scholar]
  150. Viatkin, A.; Ricco, M.; Mandrioli, R.; Kerekes, T.; Teodorescu, R.; Grandi, G. Modular Multilevel Converters Based on Interleaved Half-Bridge Submodules. In Proceedings of the 2021 22nd IEEE International Conference on Industrial Technology (ICIT), Valencia, Spain, 10–12 March 2021; Volume 1, pp. 440–445. [Google Scholar] [CrossRef]
  151. Prasad, H.; Rao, R.K.; Kumar, S.K. Cascaded Operation of Hybrid Multilevel Inverter with Optimum Switching Angle Control for Power Quality Enhancement. In Microelectronics, Electromagnetics and Telecommunications; Springer: Singapore, 2021; pp. 21–31. [Google Scholar] [CrossRef]
  152. Kalpana, K.; Nirmala, M. A Novel 31 Level Cascaded H-Bridge Inverter. In Proceedings of the 2021 International Conference on Advance Computing and Innovative Technologies in Engineering (ICACITE), Greater Noida, India, 4–5 March 2021; pp. 228–233. [Google Scholar]
  153. Panagis, P.; Stergiopoulos, F.; Marabeas, P.; Manias, S. Comparison of state of the art multilevel inverters. In Proceedings of the 2008 IEEE Power Electronics Specialists Conference, Rhodes, Greece, 15–19 June 2008; pp. 4296–4301. [Google Scholar] [CrossRef]
  154. Hochgraf, C.; Lasseter, R.; Divan, D.; Lipo, T. Comparison of multilevel inverters for static var compensation. In Proceedings of the 1994 IEEE Industry Applications Society Annual Meeting, Denver, CO, USA, 2–6 October 1994; Volume 2, pp. 921–928. [Google Scholar]
  155. Kuhn, H.; Ruger, N.E.; Mertens, A. Control Strategy for Multilevel Inverter with Non-ideal DC Sources. In Proceedings of the 2007 IEEE Power Electronics Specialists Conference, Orlando, FL, USA, 17–21 June 2007; pp. 632–638. [Google Scholar] [CrossRef]
  156. Odeh, C.I.; Nnadi, D.B.N. Single-phase 9-level hybridised cascaded multilevel inverter. IET Power Electron. 2013, 6, 468–477. [Google Scholar] [CrossRef]
  157. Choi, N.S.; Cho, J.G.; Cho, G.H. A general circuit topology of multilevel inverter. In Proceedings of the PESC’91 Record 22nd Annual IEEE Power Electronics Specialists Conference, Cambridge, MA, USA, 24–27 June 1991; pp. 96–103. [Google Scholar] [CrossRef]
  158. Halim, W.A.; Rahim, N.A.; Azri, M. Generalized Selective Harmonic Elimination Modulation for Transistor-Clamped H-Bridge Multilevel Inverter. J. Power Electron. 2015, 15, 964–973. [Google Scholar] [CrossRef]
  159. Sarwer, Z.; Siddique, M.D.; Iqbal, A.; Sarwar, A.; Mekhilef, S. An improved asymmetrical multilevel inverter topology with reduced semiconductor device count. Int. Trans. Electr. Energy Syst. 2020, 30. [Google Scholar] [CrossRef]
  160. Ponraj, R.P.; Sigamani, T.; Subramanian, V. A Developed H-Bridge Cascaded Multilevel Inverter with Reduced Switch Count. J. Electr. Eng. Technol. 2021, 16, 1445–1455. [Google Scholar] [CrossRef]
  161. Jinghua, Z.; Zhengxi, L. Research on hybrid modulation strategies based on general hybrid topology of multilevel inverter. In Proceedings of the 2008 International Symposium on Power Electronics, Electrical Drives, Automation and Motion, Ischia, Italy, 11–13 June 2008; pp. 784–788. [Google Scholar] [CrossRef]
  162. Manjrekar, M.D.; Lipo, T.A. A hybrid multilevel inverter topology for drive applications. In Proceedings of the APEC’98 Thirteenth Annual Applied Power Electronics Conference and Exposition, Anaheim, CA, USA, 15–19 February 1998; Volume 2, pp. 523–529. [Google Scholar]
  163. Dhanamjayulu, C.; Arunkumar, G.; Pandian, B.J.; Padmanaban, S. Design and implementation of a novel asymmetrical multilevel inverter optimal hardware components. Int. Trans. Electr. Energy Syst. 2019, 30. [Google Scholar] [CrossRef]
  164. Manjrekar, M.; Steimer, P.; Lipo, T. Hybrid multilevel power conversion system: A competitive solution for high-power applications. IEEE Trans. Ind. Appl. 2000, 36, 834–841. [Google Scholar] [CrossRef] [Green Version]
  165. Bin Arif, M.S.; Sarwer, Z.; Siddique, M.D.; Ayob, S.M.; Iqbal, A.; Mekhilef, S. Asymmetrical multilevel inverter topology with low total standing voltage and reduced switches count. Int. J. Circuit Theory Appl. 2021, 49, 1757–1775. [Google Scholar] [CrossRef]
  166. Colak, I.; Kabalcı, E.; Keven, G. Asymmetrical multilevel inverter topologies. In Multilevel Inverters; Academic Press: Cambridge, MA, USA, 2021; pp. 181–215. [Google Scholar] [CrossRef]
  167. Kakar, S.; Ayob, S.B.M.; Iqbal, A.; Nordin, N.M.; Bin Arif, M.S.; Gore, S. New Asymmetrical Modular Multilevel Inverter Topology with Reduced Number of Switches. IEEE Access 2021, 9, 27627–27637. [Google Scholar] [CrossRef]
  168. Gupta, K.K.; Ranjan, A.; Bhatnagar, P.; Sahu, L.K.; Jain, S. Multilevel Inverter Topologies with Reduced Device Count: A Review. IEEE Trans. Power Electron. 2015, 31, 135–151. [Google Scholar] [CrossRef]
  169. Siddique, M.D.; Rawa, M.; Mekhilef, S.; Shah, N.M. A new cascaded asymmetrical multilevel inverter based on switched dc voltage sources. Int. J. Electr. Power Energy Syst. 2021, 128, 106730. [Google Scholar] [CrossRef]
  170. Hinago, Y.; Koizumi, H. A Single-Phase Multilevel Inverter Using Switched Series/Parallel DC Voltage Sources. IEEE Trans. Ind. Electron. 2009, 57, 2643–2650. [Google Scholar] [CrossRef]
  171. Poorfakhraei, A.; Narimani, M.; Emadi, A. A Review of Multilevel Inverter Topologies in Electric Vehicles: Current Status and Future Trends. IEEE Open J. Power Electron. 2021, 2, 155–170. [Google Scholar] [CrossRef]
  172. Poorfakhraei, A.; Narimani, M.; Emadi, A. A Review of Modulation and Control Techniques for Multilevel Inverters in Traction Applications. IEEE Access 2021, 9, 24187–24204. [Google Scholar] [CrossRef]
  173. Amir, A.; Amir, A.; Selvaraj, J.; Rahim, N.A. Grid-connected photovoltaic system employing a single-phase T-type cascaded H-bridge inverter. Sol. Energy 2020, 199, 645–656. [Google Scholar] [CrossRef]
  174. Nilkar, M.; Babaei, E.; Sabahi, M. A new single-phase cascade multilevel inverter topology using four-level cells. In Proceedings of the 20th Iranian Conference on Electrical Engineering (ICEE2012), Tehran, Iran, 15–17 May 2012; pp. 348–353. [Google Scholar] [CrossRef]
  175. Khosroshahi, M.T. Crisscross cascade multilevel inverter with reduction in number of components. IET Power Electron. 2014, 7, 2914–2924. [Google Scholar] [CrossRef]
  176. Najafi, E.; Yatim, A.H.M.; Samosir, A.S. A new topology -Reversing Voltage (RV)—for multi level inverters. In Proceedings of the 2008 IEEE 2nd International Power and Energy Conference, Johor Bahru, Malaysia, 1–3 December 2008; pp. 604–608. [Google Scholar] [CrossRef]
  177. Noguchi, T.; Suroso. A multilevel voltage-source inverter using H-bridge and two-level power modules with a single power source. In Proceedings of the 2011 IEEE Ninth International Conference on Power Electronics and Drive Systems, Singapore, 5–8 December 2011; pp. 262–266. [Google Scholar] [CrossRef]
  178. Ounejjar, Y.; Al-Haddad, K. A novel high energetic efficiency multilevel topology with reduced impact on supply network. In Proceedings of the 2008 34th Annual Conference of IEEE Industrial Electronics, Orlando, FL, USA, 10–13 November 2008; pp. 489–494. [Google Scholar] [CrossRef]
  179. Ounejjar, Y.; Al-Haddad, K. A new high power efficiency cascaded U cells multilevel converter. In Proceedings of the 2009 IEEE International Symposium on Industrial Electronics, Seoul, Korea, 5–8 July 2009; pp. 483–488. [Google Scholar] [CrossRef]
  180. Ounejjar, Y.; Al-Haddad, K.; Grégoire, L. Novel three phase seven level PWM converter. In Proceedings of the 2009 IEEE Electrical Power & Energy Conference (EPEC), Montreal, QC, Canada, 22–23 October 2009; pp. 1–6. [Google Scholar]
  181. Ounejjar, Y.; Al-Haddad, K. Multilevel hysteresis controller of the novel seven-level packed U cells converter. SPEEDAM 2010 2010, 186–191. [Google Scholar] [CrossRef]
  182. Ounejjar, Y.; Al-Haddad, K.; Grégoire, L.-A. Packed U Cells Multilevel Converter Topology: Theoretical Study and Experimental Validation. IEEE Trans. Ind. Electron. 2010, 58, 1294–1306. [Google Scholar] [CrossRef]
  183. Mokhberdoran, A.; Ajami, A. Symmetric and Asymmetric Design and Implementation of New Cascaded Multilevel Inverter Topology. IEEE Trans. Power Electron. 2014, 29, 6712–6724. [Google Scholar] [CrossRef]
  184. Babaei, E.; Alilu, S.; Laali, S. A New General Topology for Cascaded Multilevel Inverters with Reduced Number of Components Based on Developed H-Bridge. IEEE Trans. Ind. Electron. 2013, 61, 3932–3939. [Google Scholar] [CrossRef]
  185. El-Naggar, K.; Abdelhamid, T.H. Selective harmonic elimination of new family of multilevel inverters using genetic algorithms. Energy Convers. Manag. 2008, 49, 89–95. [Google Scholar] [CrossRef]
  186. Perez, M.A.; Bernet, S.; Rodriguez, J.; Kouro, S.; Lizana, R. Circuit Topologies, Modeling, Control Schemes, and Applications of Modular Multilevel Converters. IEEE Trans. Power Electron. 2014, 30, 4–17. [Google Scholar] [CrossRef]
  187. Rodriguez, J.; Moran, L.; Correa, P.; Silva, C. A vector control technique for medium-voltage multilevel inverters. IEEE Trans. Ind. Electron. 2002, 49, 882–888. [Google Scholar] [CrossRef]
  188. Song, B.-M.; Kim, J.; Lai, J.-S.; Seong, K.-C.; Kim, H.-J.; Park, S.-S. A multilevel soft-switching inverter with inductor coupling. IEEE Trans. Ind. Appl. 2001, 37, 628–636. [Google Scholar] [CrossRef]
  189. Sirisukprasert, S.; Lai, J.; Liu, T.-H. Optimum harmonic reduction with a wide range of modulation indexes for multilevel converters. IEEE Trans. Ind. Electron. 2002, 49, 875–881. [Google Scholar] [CrossRef] [Green Version]
  190. Rodriguez, J.; Moran, L.; Pontt, J.; Correa, P.; Silva, C. A high-performance vector control of an 11-level inverter. IEEE Trans. Ind. Electron. 2003, 50, 80–85. [Google Scholar] [CrossRef]
  191. Karthikeyan, V.; Kumar, A.R.; Jamuna, V. A new multilevel inverter with BCD topology and reduction of harmonics using sine property. Arch. Des Sci. 2013, 66, 712–719. [Google Scholar]
  192. Deepa, T.; Kumar, A.R. A new asymmetric multilevel inverter with reduced number of switches and reduction of harmonics using Sine Property. In Proceedings of the 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT), Nagercoil, India, 18–19 March 2016; pp. 1–8. [Google Scholar] [CrossRef]
  193. Tahunguriya, S.; Kumar, A.R.; Deepa, T. Multilevel inverter with reduced number of switches and reduction of harmonics. Middle East J. Sci. Res. 2016, 24, 184–191. [Google Scholar]
  194. Turnbull, F.G. Selected harmonic reduction in static DC—AC inverters. IEEE Trans. Commun. Electron. 1964, 83, 374–378. [Google Scholar] [CrossRef]
  195. Patel, H.S.; Hoft, R.G. Generalized Techniques of Harmonic Elimination and Voltage Control in Thyristor Inverters: Part I—Harmonic Elimination. IEEE Trans. Ind. Appl. 1973, IA-9, 310–317. [Google Scholar] [CrossRef]
  196. Patel, H.S.; Hoft, R.G. Generalized Techniques of Harmonic Elimination and Voltage Control in Thyristor Inverters: Part II—Voltage Control Techniques. IEEE Trans. Ind. Appl. 1974, IA-10, 666–673. [Google Scholar] [CrossRef]
  197. Chenchireddy, K.; Jegathesan, V. A Review Paper on the Elimination of Low-Order Harmonics in Multilevel Inverters Using Different Modulation Techniques. In Inventive Communication and Computational Technologies. Lecture Notes in Networks and Systems; Ranganathan, G., Chen, J., Rocha, Á., Eds.; Springer: Singapore, 2020; Volume 145, pp. 961–971. [Google Scholar] [CrossRef]
  198. Rai, M.; Tripathi, R.K. A novel multilevel inverter topology with selective harmonic elimination technique. In Proceedings of the 2014 International Conference on Power, Control and Embedded Systems (ICPCES), Allahabad, India, 26–28 December 2014; pp. 1–6. [Google Scholar] [CrossRef]
  199. Alamri, B.; Sallama, A.; Darwish, M. Optimum SHE for cascaded H-bridge multilevel inverters using: NR-GA-PSO, comparative study. In Proceedings of the 11th IET International Conference on AC and DC Power Transmission, Birmingham, UK, 10–12 February 2015; pp. 1–10. [Google Scholar]
  200. Siddique, M.D.; Mekhilef, S.; Padmanaban, S.; Memon, M.A.; Kumar, C. Single-Phase Step-Up Switched-Capacitor-Based Multilevel Inverter Topology with SHEPWM. IEEE Trans. Ind. Appl. 2020, 57, 3107–3119. [Google Scholar] [CrossRef]
  201. Franquelo, L.G.; Napoles, J.; Guisado, R.C.P.; Leon, J.I.; Aguirre, M.A. A Flexible Selective Harmonic Mitigation Technique to Meet Grid Codes in Three-Level PWM Converters. IEEE Trans. Ind. Electron. 2007, 54, 3022–3029. [Google Scholar] [CrossRef]
  202. Sun, J.; Beineke, S.; Grotstollen, H. Optimal PWM based on real-time solution of harmonic elimination equations. IEEE Trans. Power Electron. 1996, 11, 612–621. [Google Scholar] [CrossRef]
  203. Kato, T. Sequential homotopy-based computation of multiple solutions for selected harmonic elimination in PWM inverters. IEEE Trans. Circuits Syst. I Regul. Pap. 1999, 46, 586–593. [Google Scholar] [CrossRef]
  204. Chiasson, J.; Tolbert, L.; McKenzie, K.; Du, Z. Elimination of harmonics in a multilevel converter using the theory of symmetric polynomials and resultants. IEEE Trans. Control. Syst. Technol. 2005, 13, 216–223. [Google Scholar] [CrossRef]
  205. Yang, K.; Yuan, Z.; Yuan, R.; Yu, W.; Yuan, J.; Wang, J. A Groebner Bases Theory-Based Method for Selective Harmonic Elimination. IEEE Trans. Power Electron. 2014, 30, 6581–6592. [Google Scholar] [CrossRef]
  206. Yang, K.; Zhang, Q.; Yuan, R.; Yu, W.; Yuan, J.; Wang, J. Selective Harmonic Elimination with Groebner Bases and Symmetric Polynomials. IEEE Trans. Power Electron. 2015, 31, 2742–2752. [Google Scholar] [CrossRef]
  207. Ponraj, R.P.; Sigamani, T. A novel design and performance improvement of symmetric multilevel inverter with reduced switches using genetic algorithm. Soft Comput. 2020, 25, 4597–4607. [Google Scholar] [CrossRef]
  208. Barkat, S.; Berkouk, E.M.; Boucherit, M.S. Particle swarm optimization for harmonic elimination in multilevel inverters. Electr. Eng. 2009, 91, 221–228. [Google Scholar] [CrossRef]
  209. Memon, M.A.; Siddique, M.D.; Saad, M.; Mubin, M. Asynchronous Particle Swarm Optimization-Genetic Algorithm (APSO-GA) based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter. IEEE Trans. Ind. Electron. 2021. [Google Scholar] [CrossRef]
  210. Taghizadeh, H.; Hagh, M.T. Harmonic Elimination of Cascade Multilevel Inverters with Nonequal DC Sources Using Particle Swarm Optimization. IEEE Trans. Ind. Electron. 2010, 57, 3678–3684. [Google Scholar] [CrossRef]
  211. Sadoughi, M.; Zakerian, A.; Pourdadashnia, A.; Farhadi-Kangarlu, M. Selective Harmonic Elimination PWM for Cascaded H-bridge Multilevel Inverter with Wide Output Voltage Range Using PSO Algorithm. In Proceedings of the 2021 IEEE Texas Power and Energy Conference (TPEC), College Station, TX, USA, 2–5 February 2021; pp. 1–6. [Google Scholar] [CrossRef]
  212. Sundareswaran, K.; Jayant, K.; Shanavas, T.N. Inverter Harmonic Elimination through a Colony of Continuously Exploring Ants. IEEE Trans. Ind. Electron. 2007, 54, 2558–2565. [Google Scholar] [CrossRef]
  213. Kavousi, A.; Vahidi, B.; Salehi, R.; Bakhshizadeh, M.K.; Farokhnia, N.; Fathi, S.H. Application of the Bee Algorithm for Selective Harmonic Elimination Strategy in Multilevel Inverters. IEEE Trans. Power Electron. 2011, 27, 1689–1696. [Google Scholar] [CrossRef]
  214. Salehi, R.; Vahidi, B.; Farokhnia, N.; Abedi, M. Harmonic Elimination and Optimization of Stepped Voltage of Multilevel Inverter by Bacterial Foraging Algorithm. J. Electr. Eng. Technol. 2010, 5, 545–551. [Google Scholar] [CrossRef] [Green Version]
  215. Lou, H.; Mao, C.; Wang, D.; Lu, J. PWM optimisation for three-level voltage inverter based on clonal selection algorithm. IET Electr. Power Appl. 2007, 1, 870–878. [Google Scholar] [CrossRef]
  216. Jegathesan, V.; Jerome, J. Elimination of lower order harmonics in Voltage Source Inverter feeding an induction motor drive using Evolutionary Algorithms. Expert Syst. Appl. 2011, 38, 692–699. [Google Scholar] [CrossRef]
  217. Salam, Z.; Bahari, N. Selective harmonics elimination PWM (SHEPWM) using Differential Evolution approach. In Proceedings of the 2010 Joint International Conference on Power Electronics, Drives and Energy Systems & 2010 Power India, New Delhi, India, 20–23 December 2010; pp. 1–5. [Google Scholar] [CrossRef]
  218. Hiendro, A. Multiple Switching Patterns for SHEPWM Inverters Using Differential Evolution Algorithms. Int. J. Power Electron. Drive Syst. (IJPEDS) 2011, 1, 94–103. [Google Scholar] [CrossRef]
  219. Kouro, S.; Bernal, R.; Miranda, H.; Silva, C.; Rodriguez, J. High-Performance Torque and Flux Control for Multilevel Inverter Fed Induction Motors. IEEE Trans. Power Electron. 2007, 22, 2116–2123. [Google Scholar] [CrossRef]
  220. Banaei, M.R.; Oskouei, A.B.; Dehghanzadeh, A. Extended switching algorithms based space vector control for five-level quasi-Z-source inverter with coupled inductors. IET Power Electron. 2014, 7, 1509–1518. [Google Scholar] [CrossRef]
  221. Singh, S.; Agnihotri, A.; Bind, S.; Kumar, S. Matlab Simulation Study and Comparison of Different Multiple Carrier PWM Schemes for Multi Level CHB Inverter. In Proceedings of the 2020 IEEE First International Conference on Smart Technologies for Power, Energy and Control (STPEC), Nagpur, India, 25–26 September 2020; pp. 1–6. [Google Scholar] [CrossRef]
  222. Venkatakrishna, A.; Somanatham, R.; Reddy, M.S. Phase shifted and level shifted PWM based cascaded multilevel inverter fed induction motor drive. Int. J. Curr. Eng. Technol. 2020, 4, 350–354. [Google Scholar]
  223. Odeh, C.I.; Lewicki, A.; Morawiec, M. A Single-Carrier-Based Pulse-Width Modulation Template for Cascaded H-Bridge Multilevel Inverters. IEEE Access 2021, 9, 42182–42191. [Google Scholar] [CrossRef]
  224. Chandwani, H.B.; Matnani, M.K. A review of modulation techniques for hybrid multilevel inverter. In Proceedings of the 2012 1st International Conference on Emerging Technology Trends in Electronics, Communication & Networking, Surat, India, 19–21 December 2012; pp. 1–7. [Google Scholar]
  225. Vivek, G.; Kumar, Y.V.P. Improved Harmonic Profile of Multilevel Inverter Topology with Shifted Carrier Modulation Technique. In Intelligent Computing in Control and Communication. Lecture Notes in Electrical Engineering; Sekhar, G.C., Behera, H.S., Nayak, J., Naik, B., Pelusi, D., Eds.; Springer: Singapore, 2021; Volume 702, pp. 191–201. [Google Scholar] [CrossRef]
  226. Silva, C.; Cordova, L.A.; Lezana, P.; Empringham, L. Implementation and Control of a Hybrid Multilevel Converter with Floating DC Links for Current Waveform Improvement. IEEE Trans. Ind. Electron. 2010, 58, 2304–2312. [Google Scholar] [CrossRef]
  227. Mekhilef, S.; Kadir, M.N.A.; Salam, Z. Digital Control of Three Phase Three-Stage Hybrid Multilevel Inverter. IEEE Trans. Ind. Inform. 2012, 9, 719–727. [Google Scholar] [CrossRef]
  228. Massoud, A.; Finney, S.; Williams, B. Mapped hybrid spaced vector modulation for multilevel cascaded-type voltage source inverters. IET Power Electron. 2008, 1, 318–335. [Google Scholar] [CrossRef]
  229. Bharatiraja, C.; Jeevananthan, S.; Latha, R.; Mohan, V. Vector selection approach-based hexagonal hysteresis space vector current controller for a three phase diode clamped MLI with capacitor voltage balancing. IET Power Electron. 2016, 9, 1350–1361. [Google Scholar] [CrossRef]
  230. Sanjeevan, A.R.; Kaarthik, R.S.; Gopakumar, K.; Rajeevan, P.; Leon, J.I.; Franquelo, L.G. Reduced common-mode voltage operation of a new seven-level hybrid multilevel inverter topology with a single DC voltage source. IET Power Electron. 2016, 9, 519–528. [Google Scholar] [CrossRef]
  231. Choi, U.-M.; Blaabjerg, F.; Lee, K.-B. Reliability Improvement of a T-Type Three-Level Inverter with Fault-Tolerant Control Strategy. IEEE Trans. Power Electron. 2014, 30, 2660–2673. [Google Scholar] [CrossRef]
  232. Colak, I.; Kabalci, E.; Bayindir, R. Review of multilevel voltage source inverter topologies and control schemes. Energy Convers. Manag. 2011, 52, 1114–1128. [Google Scholar] [CrossRef]
  233. Renge, M.M.; Suryawanshi, H. Three-Dimensional Space-Vector Modulation to Reduce Common-Mode Voltage for Multilevel Inverter. IEEE Trans. Ind. Electron. 2009, 57, 2324–2331. [Google Scholar] [CrossRef]
  234. Mondol, H.; Tur, M.R.; Biswas, S.P.; Hosain, K.; Shuvo, S.; Hossain, E. Compact Three Phase Multilevel Inverter for Low and Medium Power Photovoltaic Systems. IEEE Access 2020, 8, 60824–60837. [Google Scholar] [CrossRef]
  235. Alexander, A.; Thathan, M. Modelling and analysis of modular multilevel converter for solar photovoltaic applications to improve power quality. IET Renew. Power Gener. 2015, 9, 78–88. [Google Scholar] [CrossRef]
  236. Ujwala, G. Reduced Switch Multilevel Inverter Topologies and Modulation Techniques for Renewable Energy Applications. Turk. J. Comput. Math. Educ. (TURCOMAT) 2021, 12, 4659–4670. [Google Scholar]
  237. Bughneda, A.; Salem, M.; Richelli, A.; Ishak, D.; Alatai, S. Review of Multilevel Inverters for PV Energy System Applications. Energies 2021, 14, 1585. [Google Scholar] [CrossRef]
  238. Tsengenes, G.; Nathenas, T.; Adamidis, G. A three-level space vector modulated grid connected inverter with control scheme based on instantaneous power theory. Simul. Model. Pr. Theory 2012, 25, 134–147. [Google Scholar] [CrossRef]
  239. Ravi, A.; Manoharan, P.; Anand, J.V. Modeling and simulation of three phase multilevel inverter for grid connected photovoltaic systems. Sol. Energy 2011, 85, 2811–2818. [Google Scholar] [CrossRef]
  240. Tsengenes, G.; Adamidis, G. Investigation of the behavior of a three phase grid-connected photovoltaic system to control active and reactive power. Electr. Power Syst. Res. 2011, 81, 177–184. [Google Scholar] [CrossRef]
  241. Liu, L.; Li, H.; Xue, Y.; Liu, W. Decoupled Active and Reactive Power Control for Large-Scale Grid-Connected Photovoltaic Systems Using Cascaded Modular Multilevel Converters. IEEE Trans. Power Electron. 2014, 30, 176–187. [Google Scholar] [CrossRef]
  242. Sun, X.; Wang, B.; Zhou, Y.; Wang, W.; Du, H.; Lu, Z. A Single DC Source Cascaded Seven-Level Inverter Integrating Switched-Capacitor Techniques. IEEE Trans. Ind. Electron. 2016, 63, 7184–7194. [Google Scholar] [CrossRef]
  243. Karasani, R.R.; Borghate, V.B.; Meshram, P.; Suryawanshi, H.M.; Sabyasachi, S. A Three-Phase Hybrid Cascaded Modular Multilevel Inverter for Renewable Energy Environment. IEEE Trans. Power Electron. 2016, 32, 1070–1087. [Google Scholar] [CrossRef]
  244. Coppola, M.; Di Napoli, F.; Guerriero, P.; Iannuzzi, D.; Daliento, S.; Del Pizzo, A. An FPGA-Based Advanced Control Strategy of a GridTied PV CHB Inverter. IEEE Trans. Power Electron. 2015, 31, 806–816. [Google Scholar] [CrossRef]
  245. Muller, N.; Kouro, S.; Malinowski, M.; Rojas, C.; Jasinski, M.T.; Estay, G. Medium-Voltage Power Converter Interface for Multigenerator Marine Energy Conversion Systems. IEEE Trans. Ind. Electron. 2016, 64, 1061–1070. [Google Scholar] [CrossRef]
  246. Wang, L.; Zhang, D.; Wang, Y.; Wu, B.; Athab, H.S. Power and Voltage Balance Control of a Novel Three-Phase Solid-State Transformer Using Multilevel Cascaded H-Bridge Inverters for Microgrid Applications. IEEE Trans. Power Electron. 2015, 31, 3289–3301. [Google Scholar] [CrossRef]
  247. Prabaharan, N.; Palanisamy, K. Modeling and Analysis of a Quasi-linear Multilevel Inverter for Photovoltaic Application. Energy Procedia 2016, 103, 256–261. [Google Scholar] [CrossRef]
  248. Kumar, N.; Saha, T.K.; Dey, J. Sliding-Mode Control of PWM Dual Inverter-Based Grid-Connected PV System: Modeling and Performance Analysis. IEEE J. Emerg. Sel. Top. Power Electron. 2015, 4, 435–444. [Google Scholar] [CrossRef]
  249. Choudhury, S. A comprehensive review on issues, investigations, control and protection trends, technical challenges and future directions for Microgrid technology. Int. Trans. Electr. Energy Syst. 2020, 30, 1–16. [Google Scholar] [CrossRef]
  250. Maheswari, K.; Bharanikumar, R.; Arjun, V.; Amrish, R.; Bhuvanesh, M. A comprehensive review on cascaded H-bridge multilevel inverter for medium voltage high power applications. Mater. Today: Proc. 2020, 45, 2666–2670. [Google Scholar] [CrossRef]
  251. Liang, Y.; Nwankpa, C. A new type of STATCOM based on cascading voltage-source inverters with phase-shifted unipolar SPWM. IEEE Trans. Ind. Appl. 1999, 35, 1118–1123. [Google Scholar] [CrossRef]
  252. Haw, L.K.; Dahidah, M.S.A.; Almurib, H. A New Reactive Current Reference Algorithm for the STATCOM System Based on Cascaded Multilevel Inverters. IEEE Trans. Power Electron. 2014, 30, 3577–3588. [Google Scholar] [CrossRef]
  253. Humayun, M.; Khan, M.M.; Hassan, M.U.; Zhang, W. Analysis of hybrid switches symmetric flying capacitor multilevel inverter based STATCOM. Int. J. Electr. Power Energy Syst. 2021, 131, 107054. [Google Scholar] [CrossRef]
  254. Chunyan, Z.; Zhao, L. Advanced compensation mode for cascade multilevel static synchronous compensator under unbalanced voltage. IET Power Electron. 2015, 8, 610–617. [Google Scholar] [CrossRef]
  255. Dargahi, V.; Sadigh, A.K.; Pahlavani, M.R.A.; Shoulaei, A. DC (direct current) voltage source reduction in stacked multicell converter based energy systems. Energy 2012, 46, 649–663. [Google Scholar] [CrossRef]
  256. Marei, M.; Eltantawy, A.B.; El-Sattar, A.A. An energy optimized control scheme for a transformerless DVR. Electr. Power Syst. Res. 2012, 83, 110–118. [Google Scholar] [CrossRef]
  257. Gao, S.; Lin, X.; Ye, S.; Lei, H.; Kang, Y. Transformer inrush mitigation for dynamic voltage restorer using direct flux linkage control. IET Power Electron. 2015, 8, 2281–2289. [Google Scholar] [CrossRef]
  258. González, S.A.; Valla, M.I. UPQC implemented with cascade asymmetric multilevel converters. Electr. Power Syst. Res. 2015, 124, 144–151. [Google Scholar] [CrossRef]
  259. Yang, S.; Liu, Y.; Wang, X.; Gunasekaran, D.; Karki, U.; Peng, F.Z. Modulation and Control of Transformerless UPFC. IEEE Trans. Power Electron. 2015, 31, 1050–1063. [Google Scholar] [CrossRef]
  260. Galeshi, S.; Iman-Eini, H. Dynamic voltage restorer employing multilevel cascaded H-bridge inverter. IET Power Electron. 2016, 9, 2196–2204. [Google Scholar] [CrossRef] [Green Version]
  261. Kumar, N. Bharath. Design and Analysis of Different Multi-Level Inverter Topologies For Single Phase Im Drive. Turk. J. Comput. Math. Educ. (TURCOMAT) 2021, 10, 4104–4117. [Google Scholar]
  262. Holmes, D.G.; McGrath, B.; Parker, S.G. Current Regulation Strategies for Vector-Controlled Induction Motor Drives. IEEE Trans. Ind. Electron. 2011, 59, 3680–3689. [Google Scholar] [CrossRef]
  263. Mora, A.; Lezana, P.; Juliet, J. Control Scheme for an Induction Motor Fed by a Cascade Multicell Converter Under Internal Fault. IEEE Trans. Ind. Electron. 2014, 61, 5948–5955. [Google Scholar] [CrossRef]
  264. Zhou, D.; Zhao, J.; Liu, Y. Predictive Torque Control Scheme for Three-Phase Four-Switch Inverter-Fed Induction Motor Drives with DC-Link Voltages Offset Suppression. IEEE Trans. Power Electron. 2014, 30, 3309–3318. [Google Scholar] [CrossRef]
  265. Fu, X.; Li, S. A Novel Neural Network Vector Control Technique for Induction Motor Drive. IEEE Trans. Energy Convers. 2015, 30, 1428–1437. [Google Scholar] [CrossRef]
  266. Chen, Y.; Liu, T.; Hsiao, C.; Lin, C. Implementation of adaptive inverse controller for an interior permanent magnet synchronous motor adjustable speed drive system based on predictive current control. IET Electr. Power Appl. 2015, 9, 60–70. [Google Scholar] [CrossRef]
  267. Liu, J.; Sun, Y.; Li, Y.; Fu, C. Theoretical harmonic analysis of cascaded H-bridge inverter under hybrid pulse width multilevel modulation. IET Power Electron. 2016, 9, 2714–2722. [Google Scholar] [CrossRef]
Figure 1. A summary of the review methodology adopted in the present research work.
Figure 1. A summary of the review methodology adopted in the present research work.
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Figure 2. An outlook on the development of various MLI topologies.
Figure 2. An outlook on the development of various MLI topologies.
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Figure 3. Overall classification of MLI.
Figure 3. Overall classification of MLI.
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Figure 4. Topology of neutral point clamped multilevel inverter.
Figure 4. Topology of neutral point clamped multilevel inverter.
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Figure 5. Topology of flying capacitor multilevel inverter.
Figure 5. Topology of flying capacitor multilevel inverter.
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Figure 6. Topology of active neutral point clamped multilevel inverter.
Figure 6. Topology of active neutral point clamped multilevel inverter.
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Figure 7. Topology of modular multilevel inverter.
Figure 7. Topology of modular multilevel inverter.
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Figure 8. Topologies of sub modules (A) half-bridge, (B) full-bridge, (C) single clamped, and (D) double clamped.
Figure 8. Topologies of sub modules (A) half-bridge, (B) full-bridge, (C) single clamped, and (D) double clamped.
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Figure 9. Topology of cascaded H-bridge multilevel inverter.
Figure 9. Topology of cascaded H-bridge multilevel inverter.
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Figure 10. Topology of hybridized cascaded H-bridge multilevel inverter.
Figure 10. Topology of hybridized cascaded H-bridge multilevel inverter.
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Figure 11. Topology of multiple level dc links inverter.
Figure 11. Topology of multiple level dc links inverter.
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Figure 12. Topology of switched series/parallel sources based multilevel inverter.
Figure 12. Topology of switched series/parallel sources based multilevel inverter.
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Figure 13. Topology of T-type symmetric H-bridge topology.
Figure 13. Topology of T-type symmetric H-bridge topology.
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Figure 14. Topology of Nilkar multilevel inverter.
Figure 14. Topology of Nilkar multilevel inverter.
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Figure 15. Topology of crisscross cascaded multilevel inverter.
Figure 15. Topology of crisscross cascaded multilevel inverter.
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Figure 16. Topology of reversing voltage multilevel inverter.
Figure 16. Topology of reversing voltage multilevel inverter.
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Figure 17. Topology of series connected switched sources multilevel inverter.
Figure 17. Topology of series connected switched sources multilevel inverter.
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Figure 18. Topology of multilevel module based multilevel inverter.
Figure 18. Topology of multilevel module based multilevel inverter.
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Figure 19. Topology of two switch enabled level generation based multilevel inverter.
Figure 19. Topology of two switch enabled level generation based multilevel inverter.
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Figure 20. Topology of H-bridge and two-level power modules-based multilevel inverter.
Figure 20. Topology of H-bridge and two-level power modules-based multilevel inverter.
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Figure 21. Topology of cross connected sources based multilevel inverter.
Figure 21. Topology of cross connected sources based multilevel inverter.
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Figure 22. Topology of packed U-cell multilevel inverter.
Figure 22. Topology of packed U-cell multilevel inverter.
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Figure 23. Topology of cascaded bipolar switched cells multilevel inverter.
Figure 23. Topology of cascaded bipolar switched cells multilevel inverter.
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Figure 24. Topology of Mokhberdoran multilevel inverter.
Figure 24. Topology of Mokhberdoran multilevel inverter.
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Figure 25. Topology of Babaei multilevel inverter.
Figure 25. Topology of Babaei multilevel inverter.
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Figure 26. Categorization of modulation schemes for multilevel inverter.
Figure 26. Categorization of modulation schemes for multilevel inverter.
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Figure 27. Block diagram of a single phase grid connected packed U-cell based MLI.
Figure 27. Block diagram of a single phase grid connected packed U-cell based MLI.
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Figure 28. Block diagram of grid tied PV system with digital proportional integral control and fuzzy logic control.
Figure 28. Block diagram of grid tied PV system with digital proportional integral control and fuzzy logic control.
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Figure 29. Block diagram of the dual loop control method for a three-level inverter.
Figure 29. Block diagram of the dual loop control method for a three-level inverter.
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Figure 30. Block diagram for control technique for STATCOM application.
Figure 30. Block diagram for control technique for STATCOM application.
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Figure 31. Block diagram for direct flux linkage control technique in DVR.
Figure 31. Block diagram for direct flux linkage control technique in DVR.
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Figure 32. Block diagram for rotor flux linkage oriented control method of motor drive system.
Figure 32. Block diagram for rotor flux linkage oriented control method of motor drive system.
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Table 1. Comparison between traditional two-level inverter and MLI.
Table 1. Comparison between traditional two-level inverter and MLI.
PropertiesTwo-Level InverterMLI
StructureComplicatedModular
Operation at high voltage and currentCan operate (for parallelized structures) Can operate
stress on power electronic switchesMoreLess
ApplicationLow voltageHigh voltage
Power quality performanceLowHigh
Harmonic contentLowHigh
Electromagnetic interference (EMI) Immunity/susceptibilityLessMore
Production of common-mode voltageHigherLower
Ability of transformer-less operationNoYes
EfficiencyLowHigh
Switching lossesHighLow
Operation at the fundamental frequencyFailsCan operate
Input current distortionsHigh Low
Fault tolerant operationImpossiblePossible
Rate of change of voltageHighLow
Ability to operate at low/high/fundamental frequencyMoreLess
Production of multiple voltage levelNot possiblePossible
Electromagnetic interference (EMI) generationHighLow
Table 2. A comprehensive summary of merits and demerits of various MLI configurations.
Table 2. A comprehensive summary of merits and demerits of various MLI configurations.
ConfigurationMeritsDemerits
NPC
[56,90,91,92,93,94,95]
Modular in design
Better dynamic response
Cost effective (only for three-level structure)
Less number of DC sources needed for operation
Good fault-tolerant characteristics
Absence of floating capacitors
Back-to-back inverters are employed
Maximum efficiency when operated at fundamental frequency
Plays a vital role for application in industries
DC level may discharge due to improper control and monitor
An increase in voltage level results in an increase in the number of clamping diodes
Uneven distribution of losses across inner and outer switches
Costlier and less reliable due to an increase in number of diodes
FC
[39,60,61,94]
Can be employed for fault-tolerant operation
Uses less number of DC sources
Cost effective if used for high-level structures
Does not require clamping diodes
Ability to lessen voltage derivation stress on the power electronic components
Capacitor requirements are greated, which is more expensive than diodes
Voltage balancing unit is complex
Switching efficiency is minimum
Complication in overall system control
Complex structure
Less reliable
Use of more voltage sensors
Gives rise to ripples at low switching frequencies
ANPC
[68,96,97]
Losses across each switch are uniform
Dynamic response is good
Simple in structure
Cost effective, compact in size, and requires no floating capacitor for a three-level structure
Uses power switches than normal diodes
For levels greater than 3, more numbers of floating capacitors are required
Control circuit is complex in comparison to NPC
When operated at higher voltage levels, power switches of various voltage ratings are needed
MMC [62,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121]
Possesses voltage scalability by cascading identical cells
Capable of independent PQ control
Losses are negligible
Level of modularity at the cell level is maximum
Switching frequency is low
Does not require AC filters as output is purely sinusoidal
Simple in structure
Quality of voltages and currents is high
High availability, reliability, and efficiency
Need of more power electronic interfaces
Uses more number of capacitors and cells
Control unit for circulating current and voltage balancing of cell is needed
CHB
[39,52,56,151,152,153,154,155]
Structure is simple and modular
Ease of extending to higher levels
Simplicity in storing and packaging
Voltage derivative stress is lowered due to the production of common-mode voltage
Reliability is higher
Control is simple
Absence of floating capacitors
Minimum harmonics in the input current
Ability to operate both at fundamental and switching frequencies
Output signal has less distortion without any filter unit
Best suited for applications of fault tolerance
Needs only unidirectional switches
It can employ asymmetric source topology
Can operate as single DC source unit
Requirement of more power switches
The level of output voltage is comparatively less
Cost of implementation is large
Voltage rating across switches varies for asymmetric configuration
Requires a greater number of DC sources
Requires more complex controller unit
HCHB
[156,157,158]
Presence of an auxiliary switch for harmonic profile improvement of output waveforms
Requires a smaller number of switching units and devices
Utilizes reduced number of DC sources
Cannot be employed with high voltage application
Costly for implementation
MLDLC
[39,72,168,169]
Uses less number of semiconductor switches
Circuit layout is optimized
No requirement of extra clamping diodes or capacitors
Costly as it involves capacitors for storage
With the increase in number of DC sources, output level increases
Power rating of device increases due to reduced device count which leads to damage of the device by causing its operating temperature to exceed safe levels as well increases its overall cost
SSPS
[168,170,171,172]
Ability to generate more levels of output voltage using very few numbers of switches
Simple structure
Uniform sharing of load is possible
Needs less number of gate driver circuit
Can operate as single DC source configuration
Cannot be applied for fault-tolerant operations
Switches with the highest voltage rating fail to operate at fundamental frequency
Cannot be operated as asymmetric configuration
Due to reduced switch count, the overall power rating is higher leading to threat in damage to the entire system
T-type
[80,81,82,173]
Control structure is simple
Does not require floating capacitors and diodes
Voltage derivative stress is higher on switches
Switching losses are high
Operation at high-frequency results in low efficiency
Cannot operate for high voltage and power applications
Nilkar
[174]
Can operate with less number of switches
The net harmonic content is less
Employs batteries and capacitors as the DC voltage source
Complicated structure
Costly as power rating of reduced number of switches is more
Not feasible for fault-tolerant operation
Operation with less number of switches increases power rating and in turn makes its operating temperature exceed safe levels
CCHB
[51,175]
Peak inverse voltage of the system is low
Both symmetric and asymmetric topology are possible
Ability to operate both with positive & negative voltage
Switches with bidirectional operation are required
Needs isolated input DC link for operation
RV
[78,176]
Three-phase operation can be carried out by single DC link
Non-isolated type of DC links are operated
Rated switches are operated at peak voltage and at switching frequency
Load sharing is not uniform
Asymmetric configuration is not possible
SCSS
[76,77]
Modular structure
Rated switches can operate at peak voltage and switching frequency
System requires to operate at only symmetric configuration
Rating of voltage varies from one switch to another
Load sharing is not uniform
MLM
[79]
Can operate with reduced number of DC voltage sources
Requires fewer semiconductor switches, transistors, and power diodes
Fails for application in asymmetric configuration
Requires isolated DC sources
Power rating of device increases due to reduced device count which leads to damage of the device by causing its operating temperature to exceed safe levels as well increases its overall cost
2SELG
[83,168]
Needs minimum number of switches
Structure is simple
Fails to operate at fundamental switching frequency
Complex control
Requires isolated DC sources
Use of minimum number of switches leads to increased cost and temperature level higher
HBTPM
[177]
Simple structure
Appropriate for high voltage applications
Fails to synthesize various levels of voltage waveform at bus end
All the individual levels accessible by sources could not be achieved
Fails to operate in asymmetric configuration
CCS
[51,69]
Ability to produce possible values of minimum step voltage
Requires less number of basic sub-inverter cells and switching devices
Possesses minimum blocking voltage for a particular level
Modular in structure
Operates only with isolated DC sources
Requires on-state switches
Not so cost effective
Operation with less number of switches increases power rating and in turn makes its operating temperature exceed safe levels
PUC
[168,178,179,180,181,182]
Structure is simple
Possibility of adding more crossover switches
Not modular
Operation with asymmetric configuration is mandatory
Different switches have different voltage ratings
Fault-tolerant applications are impossible
Cost of implementation is more
CBSC
[71]
Reduced operational cost
Simple circuit
Cannot work with asymmetric topology
Mokhberdoran
[51,183]
High level of voltage can be achieved by cascading basic units in series
Enhanced system efficiency
Modular structure
Cost effective
Requirement of switches and gate driver circuit is more
Individual DC sources are required for operation
Babaei
[51,70,184]
Simple and modular structure
Power is equally shared among all cells
Operation for symmetric and asymmetric configuration is possible
Requires DC sources that are isolated
Needs switches for various ratings of voltage
Table 3. Comparative study highlighting the merits and demerits of basic modulation schemes.
Table 3. Comparative study highlighting the merits and demerits of basic modulation schemes.
Modulation SchemesMeritsDemeritsReferences
Sine Property
Easy performance of simulations
Has constant switching frequency
Easy thermal design
Requires more computational efforts
[191,192,193]
Selective Harmonic Elimination (SHE)
Ability to eliminate lower order harmonics
Low harmonics
Reduced output filter size
Appropriate for high power application
High efficiency
Low losses during switching operation
Better steady-state response
Overall dynamic response is slower
Ineffective voltage balancing operation
Requires massive passive filters
[194,195,196,197,198,199,200,201,202,203,204,205,206,207,208,209,210,211,212,213,214,215,216,217,218]
State Vector Control (SVC)
Can operate at low switching frequency
Simple technique
Low harmonics with high efficiency
Less number of switching states
Lower dv/dt stress
Better dynamic response
Does not require huge passive filters
Lower order harmonics generated are not eliminated
Complex for structure involving more number of voltage levels
[187,219,220]
Phase Shifted PWM (PS-PWM)
Modular and simple structure
Rotation of switching patterns is not required
High harmonic content
Poor voltage balancing strategy
Poor dynamic response
[224,225]
Phase Disposition PWM (PD-PWM)
Better voltage profile
Optimal switching is achieved
All carriers have same frequency and amplitude
Uneven power distribution
Poor dynamic response
[224]
Table 4. Application of various MLI topologies in numerous power system domains.
Table 4. Application of various MLI topologies in numerous power system domains.
MLI TopologiesApplications
NPC-MLI❖ High speed motor drives
❖ Renewable energy
❖ Power systems
FC-MLI❖ Renewable energy
❖ Motor drives
ANPC-MLI❖ Renewable energy (solar inverters)
❖ Active power filters
CHB-MLI❖ FACTS
❖ Renewable energy
❖ Drives
HCHB-MLI❖ Motor drives
❖ Renewable energy
MLDCL-MLI❖ PM motor drives (<100 KW)
❖ MOSFETs
❖ IGBTs
❖ Solar and fuel cell integration
SSPS-MLI❖ Renewable energy
❖ Vehicle drive system
❖ Traction purposes
T-type-MLI❖ AC drive system
❖ Renewable energy
❖ Power train drive
N-MLI❖ Renewable energy
❖ Medium/high voltage industries
CCHB-MLI❖ Motor drives
❖ FACTS
❖ Renewable energy
RV-MLI❖ FACTS
❖ HVDC
SCSS-MLI❖ Electric vehicles
❖ FACTS
❖ Submarine propulsion
MLM-MLI❖ Renewable energy
2SELG-MLI❖ HVDC
❖ Renewable energy
HBTPM-MLI❖ Renewable energy
CCS-MLI❖ Photovoltaic system
PUC-MLI❖ Motor drives
❖ Renewable energy
CBSC-MLI❖ Renewable energy
M-MLI❖ HVDC
❖ Wind systems
B-MLI❖ HVDC
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Choudhury, S.; Bajaj, M.; Dash, T.; Kamel, S.; Jurado, F. Multilevel Inverter: A Survey on Classical and Advanced Topologies, Control Schemes, Applications to Power System and Future Prospects. Energies 2021, 14, 5773. https://doi.org/10.3390/en14185773

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Choudhury S, Bajaj M, Dash T, Kamel S, Jurado F. Multilevel Inverter: A Survey on Classical and Advanced Topologies, Control Schemes, Applications to Power System and Future Prospects. Energies. 2021; 14(18):5773. https://doi.org/10.3390/en14185773

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Choudhury, Subhashree, Mohit Bajaj, Taraprasanna Dash, Salah Kamel, and Francisco Jurado. 2021. "Multilevel Inverter: A Survey on Classical and Advanced Topologies, Control Schemes, Applications to Power System and Future Prospects" Energies 14, no. 18: 5773. https://doi.org/10.3390/en14185773

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