Optimal Integration of Capacitor and Distributed Generation in Distribution System Considering Load Variation Using Bat Optimization Algorithm

Abstract

In this article, an efficient long-term novel scheduling technique is proposed for allocating capacitors in a combined system involving distributed generation (DG) along with radial distribution systems (RDS). We introduce a unique multi-objective function that focuses on the reduction of power loss with the maximization of voltage stability index (VSI) subjected to constraints of equality and inequality systems. Loss sensitivity factor and VSI together are involved in pre-identifying the locations of capacitors and DG. Determination of the optimal size of capacitor and DG is performed by utilizing the Bat algorithm (BA) for all the loads in RDS. The conventional approach considers the medium load of (1.0) condition generally, but the proposed method changes the feeder loads linearly, ranging from light load (0.5) to peak load (1.6) with the value of step size as 1%. BA determines the optimal size of the capacitor and DG for each step load. The curve fitting technique is used for deducing the generalized equation of capacitor size and DG for all conditions of the load with the various loading condition sized by distributed network operators (DNOs). Further, various load models such as industrial, residential, and commercial loads have been considered to show the efficiency of the present approach. Validation of results is performed in different scenarios on a 69-bus test system and on a standard IEEE 33-bus system. The results exhibit improved accuracy with less power loss value, superior bus voltage, and stability of system voltage with a higher rate of convergence.

1. Introduction

Distribution level power losses have risen to a maximum of 13 percent, which could be reduced by optimally selecting and locating the compensating devices [1]. Voltage stability of the radial distribution system (RDS) is yet another challenge, which could also be solved by the above optimal approach [2], thereby improving voltage profile. Distributed generation (DG) is small, scattered generating units integrated with shunt capacitors, which are considered the compensating devices. DG predominantly has a direct focus on real power loss, whereas capacitors tackle the problem of loss reduction indirectly by reactive power injection. DGs do not face the transmission loss problem, as it is located near or at the consumer’s site. It could be traditional or any other recent renewable energy sources [3,4].

Optimal allocation of such DGs offers many perks, namely reduced power loss, reliability, and improved voltage profile, forming the set of objective functions. The combination of the above objectives is solved using various optimization algorithms as the references therein [5]. Similarly, many such algorithms are employed for optimal allocation of the other compensating device, namely the capacitors as the references therein [6].

Researchers have focused on either solving optimal allocation of capacitors or DG individually. However, very few attempts have considered allocating both capacitors and DG in the RDS simultaneously. The concurrent sitting of capacitors and DG in the RDS includes the benefits of both individual allocations. These include a reduction of real and reactive power loss, operating cost, and pollutant emission and an advance in power quality, system stability, voltage profile, and efficiency. Load balancing and power factor correction are also addressed.

Simultaneous allocation of single/multi-objective optimization problems with various constraints and minima is obtained by various heuristic algorithms. In [7], the authors used an analytical method to allocate both capacitors and DG in the RDS. With power loss reduction being an objective function, PSO [8], BFOA [9], GA [10], and IMDE [11] are utilized by the authors to obtain the minima. Minimization of various indices, which include balancing of load, voltage stability, and mitigation of active power loss, is addressed by an integrated imperialist competitive algorithm with genetic algorithm (ICA/GA) and for addressing the multi-objective problem, a multi-objective differential evolution (MODE) technique is used [12]. Apart from the indices used in [12], parameters such as voltage profile indices, reliability, and investment cost are also minimized by the binary particle swarm optimization algorithm (BPSO) [13]. The authors [14] have performed cost analysis for DG and capacitors with different load models. In [15], the authors considered voltage profile enhancement as the objective function. Further, in [16], the author proposed an integrated technique for solving the multi-objective function utilizing the firefly algorithm (FFA) and backtracking search algorithm (BSA) as a simultaneous optimization technique in locating the DGs and shunt capacitors together. In [17], the authors proposed a fuzzy-GA-method-based simultaneous location of capacitors and a DG optimization technique for distribution systems. In [18], a two-stage multi-objective fuzzy-based grasshopper optimization algorithm (GOA) is proposed for allocating capacitors, DGs, and charging stations for electric vehicle (EV) distribution systems.

Further, the authors utilized passive harmonic filtering to grow PV hosting capacity in distorted distribution systems with various constraints [19]. A combination of a hybrid phasor particle swarm optimization and gravitational search algorithm was implemented to solve the optimal allocation of inverter-based DG and shunt capacitors in the distribution network [20]. Soft open points and DG are considered along with network reconfiguration for loss mitigation of a 83-node balanced distribution system and IEEE 33 RDS [21]. A multi-objective function has been taken to solve the simultaneous allocation of DG and capacitors with the recent thief and police algorithm [22]. Two operation modes, grid-connected and islanded, for a micro grid with switched capacitors are implemented in the RDS while considering various load models [23]. New objective interconnection cost mitigation for the allocation of renewable DG and capacitors in the alleviate network was performed using an analytical optimization technique [24].

From observations made in the literature, many researchers have concentrated on the level of loading, ranging from light load and medium load to peak load, the load variations happening in between being unattended. Optimal sizing of the DG and capacitor need to be performed for each and every load condition, because only three level sizing approaches do not give insight into the intermediate loading conditions creating uncertainty during the minimization of the objective function. Sizing for the in-between levels needs attention, which is addressed in this paper.

The novelty of this paper is as follows:

• A novel technique is proposed for long-term scheduling to optimally allocate DGs and capacitors.
• For the first time, consideration of load variation is given for the allocation problem of capacitors and DGs.
• A framed set of generalized equations using curve fitting techniques to help distribution network operators to choose the exact size of the DG and capacitor for any load (light load to peak load).
• The present approach is verified on three different load models to check the efficiency in all types of loads.
• Improvement of overall system efficiency is achieved by considering a multi-objective function for the enhancement of stability and reduced power loss, which are not considered previously in the literature for the allocation of capacitors simultaneously.
• For the first time, the Bat algorithm is applied for the allocation of capacitors and DGs.

This paper proposes a novel approach for solving the problems in allocating the DG and capacitor simultaneously in RDS with various load models. The objective of the system is to reduce the power loss and to enhance the VSI of the system. The Bat algorithm is used for sizing and locating both capacitor and DG. Linear changing of feeder loads is performed ranging from 0.5 (light load) to 1.6 (peak load) with a step size of value 0.01, where at each step, sizing is performed using CFT whose formulation is performed in the form of a simple quadrature equation. The present approach is supportive in the selection of a particular size of capacitor and DG based on distribution network operators (DNOs) and their load steps. The standard IEEE 33-bus test system and 69-bus benchmark test system are used to test the effectiveness and feasibility. Comparison of the simulated results is performed with that of other heuristic-based algorithms.

2. Load Models and Formulation of the Proposed Objective Function

2.1. Formulation of Load Models

From a practical perspective, the current methodology is receptive to joining continuous voltage needy load models. To quantify the impact of a few load models on compensator (DG and capacitor) sizing, static load models are utilized to imply various kinds of purchasers. Mostly, the load of the distribution system can be partitioned into three classifications i.e., industrial, residential, and commercial load. In view of the load types, the active and imaginary power values will fluctuate, which influences the voltage and frequency of the system. In this current work, the voltage-dependent load models, for instance, industrial, residential, and commercial load models, have been thought of. The numerical articulation for the voltage-dependent load model is addressed as:

$$P=P_o{V}^{\alpha }$$

(1)

$$Q=Q_o{V}^{\beta }$$

(2)

where P and Q are the values of real and reactive powers, respectively; P_o and Q_o are the values of active and reactive powers at nominal voltages, respectively; and α and β are the real and reactive power exponents. In

Table 1. Load types and exponent values.

Load Type	α	β
Constant	0	0
Industrial load	0.18	6
Residential load	0.92	4.04
Commercial load	1.51	3.4

, the values of the real and reactive exponents that are used in this paper for constant power, industrial, residential, and commercial loads have been provided [25,26,27].

2.2. Power Loss in RDS

Generally, the resistance to reactance ratio of RDS (R/X) is high such that the study of conventional power flow is inappropriate over the transmission system for identification of line voltage and flow. Hence, the backward/forward sweep (BFS) algorithm is utilized for load flow calculations [28]. The BFS algorithm became common owing to its simplicity, fastness, and robustness with the requirement of low memory for processing. In addition, it is well suited for unbalanced distribution networks. In BFS, the three basis steps involved are backward sweep, Nodal current calculation, and forward sweep, which are repeated until convergence.

Two buses are considered, as shown in Figure 1, where these two buses are connected by a branch, the sending end bus is represented as t, and the receiving end bus is represented as t + 1. Real power represented by P_t,t+1 and the reactive power represented by Q_t,t+1 that are flowing between bus t and bus t + 1 are derived by applying the formulae given as follows:

$$P_{t,t+1}=P_{\left(t+1\right)eff}+P_{Loss\left(t,t+1\right)}$$

(3)

$$Q_{t,t+1}=Q_{\left(t+1\right)eff}+Q_{Loss\left(t,t+1\right)}$$

(4)

Computation of I between buses t and t + 1 in the line section is performed as follows:

$$I_{t,t+1}=\left(\frac{P_{t,t+1}-j{Q}_{t,t+1}}{V_{t+1} \angle -{\alpha }_{t+1}}\right)$$

(5)

Additionally,

$$I_{t,t+1}=\left(\frac{V_t \angle {\alpha }_t{-V}_{t+1}\angle {\alpha }_{t+1}}{R_{t,t+1}+j{X}_{t,t+1}}\right)$$

(6)

Equating and cross-multiplying Equations (5) and (6), we obtain:

$$V_t^2-V_t{V}_{t+1}\angle \left({\alpha }_{t+1}-{\alpha }_t\right)=\left(P_{t,t+1}-j{Q}_{t,t+1}\right)\left(R_{t,t+1}+j{X}_{t,t+1}\right)$$

(7)

Further simplification of Equation (7) leads to:

$$V_t{V}_{t+1}\ast \cos ({\alpha }_{t+1}-{\alpha }_t)=V_t^2-\left(P_{t,t+1}{R}_{t,t+1}+Q_{t,t+1}{X}_{t,t+1}\right)$$

(8)

$$V_t{V}_{t+1}\ast \sin ({\alpha }_{t+1}-{\alpha }_t)=Q_{t,t+1}{R}_{t,t+1}-P_{t,t+1}^{}{X}_{t,t+1}$$

(9)

Squaring and adding (8) and (9)

$$V_{t+1}^2=V_t^2-2\left(P_{t,t+1}{R}_{t,t+1}+Q_{t,t+1}{X}_{t,t+1}\right)+\left(R_{t,t+1}^2+X_{t,t+1}^2\right)\left(\frac{P_{t,t+1}^2+Q_{t,t+1}^2}{{\left|V_t\right|}^2}\right)$$

(10)

Computation of real power loss is performed in the line section using Equation (5) as follows:

$$P_{Loss\left(t,t+1\right)}=I_{t,t+1}^2\ast R_{t,t+1}$$

(11)

$$P_{Loss\left(t,t+1\right)}=\left(\frac{P_{t,t+1}^2+Q_{t,t+1}^2}{{\left|V_{t+1}\right|}^2}\right)\ast R_{t,t+1}$$

(12)

The total real power loss (P_TL) is obtained by computing the summation of all the losses occurring in the line sections specified by:

$$P_{TL}={\displaystyle \sum }_{t=1}^{nb}{P}_{Loss \left(t,t+1\right)}$$

(13)

where nb represents the total number of branches.

2.3. Reduction of Power Loss by Placement of DG/capacitor

Real power loss is predominant in RDS. This being the case, the focus of the allocation is to reduce the real power loss. Total power loss in the line section due to DG/capacitor allocation is represented as the ratio between total power loss with DG/capacitor allocation and without DG/capacitor allocation,

$$P_{TL}^{\mathrm{DG}/\mathrm{Cap}}=\frac{P_{TL}^{\mathrm{DG}/\mathrm{Cap}}}{P_{TL}}$$

(14)

Reduction of $\Delta P_{TL}^{\mathrm{DG}/\mathrm{Cap}}$ forms one of the objectives during optimization.

2.4. Voltage Stability Index (VSI) in RDS

Maintaining the voltages of all network buses in spite of disturbance forms the crux of voltage stability. This is solely because of the scarce reactive power supply provided by the system to the loads. VSI for the distribution system shown in Figure 1 is obtained by the power flow method using Equation (8), as introduced in [29].

$$\mathrm{VSI}\left(t+1\right)={\left|V_t\right|}^4-4{(P_{t+1,eff}{X}_{t,t+1}-Q_{t,t+1}{R}_{t,t+1})}^2-4\left(P_{t+1,eff}{R}_{t,t+1}+Q_{t+1,eff}{X}_{t,t+1}\right){\left|V_t\right|}^2$$

(15)

For stable operation of RDS, we should have:

$$\mathrm{VSI}\left(t+1\right)\ge 0,fort=1,2,3\dots nb$$

(16)

The above Equation (15) can be used to determine the location of the compensating devices as well as the stability. Upon ordering the VSIs of all the buses, the node corresponding to the minimum VSI is the most sensitive node.

2.5. VSI Maximization Using DG/capacitor Placement

Ignoring voltage stability during formalization of objective function makes RDS susceptible to a bad voltage profile. Maintaining a good voltage profile refers to the pertinence of voltage within limits, meeting the contractual obligations, saving the cost of resources of generation, and finally providing good voltage regulation on the grid. This makes the inclusion of VSI in optimization inevitable [18]. In fact, allocating the DG and capacitor simultaneously improves stability. The change in VSI is given by the ratio of VSI with DG/capacitor placement over VSI without DG/capacitor placement, as given in (15). This could be maximized during optimization.

$${\Delta \mathrm{VSI}}_{}^{\mathrm{DG}/\mathrm{Cap}}=\frac{{\mathrm{VSI}}_{after}^{\mathrm{DG}/\mathrm{Cap}}}{{\mathrm{VSI}SI}_{before}}$$

(17)

2.6. Curve-Fitting Technique

Curve fitting is the process of constructing a curve or mathematical function that has the best fit to a series of data points, possibly subject to constraints [30]. The steps involved in the curve-fitting technique for the proposed method are given below:

• Place the suggested initial (extreme) DG/capacitor sizes one at a time at bus t. Then, run the load flow per DG capacitor size for all load factors (0.5 to 1.6 with step size of 0.01).
• Register the ΣP_Loss values of these DG/capacitors individually on a scatter plot. The x and y axes are the total system power loss or DG/capacitor size and load factor, respectively.
• Plot a quadratic fitted curve of these registered results and obtain the curve function (ax² + bx + c).
• Find the x-intersect (x = −b/2a) of the minimum point at that curve. Then, represent that intersection as the best power loss or DG/capacitor size.
• Place the designated DG/capacitor size and run the power flow. If the constraints are within the limits, that is, this is the best DG/capacitor option of this pf, then print the results. Otherwise, one of three scenarios could arise:
  • $\left|V_t\right|>\left|V_t^{min}\right|$ and $\left|V_t\right|>\left|V_t^{max}\right|$ reduce the DG/capacitor size by 5% and follow step 5.
  • $\left|V_t\right|<\left|V_t^{min}\right|$ and $\left|V_t\right|<\left|V_t^{max}\right|$ increase the DG/capacitor size by 5% and follow step 5.
  • $\left|V_t\right|<\left|V_t^{min}\right|$ and $\left|V_t\right|>\left|V_t^{max}\right|$ increase and decrease the DG/capacitor size by 5% and follow step 5 for both DGs and capacitors one at a time. If both DGs and capacitors satisfy the constraints, retain the one that provides maximum objective function values.

2.7. Proposed Objective Function

The multi-objective function formulated here works on both VSI and real power loss such that it maximizes VSI and minimizes the real power loss. The proposed multi-objective function for optimal DG is given below. Capacitor placement constraints are given in

Table 2. Constraints for optimization.

Constraints	Type	Equations (t = 1, 2,……nb)
Power balance constraints	Equality	$P_{TL}+\sum P_{D\left(t\right)}=\sum P_{\mathrm{DG}/\mathrm{Cap}\left(t\right)}$
Voltage constraint	In-equality	$V_t^{min{\left|V_t\right|}_t^{max}}$
Real power compensation	In-equality	$P_{\mathrm{DG}\left(t\right)}^{mi{n}_{\mathrm{DG}\left(t\right)}{}_{\mathrm{DG}\left(t\right)}^{max}}$
Reactive power compensation	In-equality	$Q_{\mathrm{Cap}\left(t\right)}^{mi{n}_{\mathrm{Cap}\left(t\right)}{}_{\mathrm{Cap}\left(t\right)}^{max}}$

.

$$Minimize\left(F\right)=Min\left(\raisebox{1ex}{$\mathsf{\Delta }{P}_{TL}^{\mathrm{DG}/\mathrm{Cap}}$}\!\left/ \!\raisebox{-1ex}{${\mathsf{\Delta }VSI}_{}^{\mathrm{DG}/\mathrm{Cap}}$}\right.\right)$$

(18)

3. Sensitivity Analysis

Sensitivity analysis is utilized to identify the optimum site for placement of the DG/capacitor. Space-time complexity during optimization is met by the locations obtained using the above analysis.

3.1. Voltage Stability Index

The aim of VSI is to find the optimal location of DG along with the level of security of the system [19]. The ode corresponding to the lowest VSI obtained using (15) has the highest priority of DG placement. Additionally, VSI should be maximized to avoid voltage collapse.

3.2. Loss Sensitivity Factor

Optimal locations for capacitors are obtained from LSF [31,32], which reduces the search space during optimization. The bus with the highest LSF obtains a higher chance of capacitor allocation. The expression for LSF is obtained by differentiating Equation (12) with respect to reactive power.

$$\mathrm{LSF}\left(t,t+1\right)=\frac{\partial P_{Loss\left(t,t+1\right)}}{\partial Q_{\left(t+1,eff\right)}}=\left(\frac{{2Q}_{t+1,eff}\ast R_{t,t+1}}{{\left|V_{t,t+1}\right|}^2}\right)$$

(19)

4. Bat Algorithm

In the present scenario, nature-inspired algorithms have gained attention and eventually became a powerful tool to solve complex power system optimization problems easily. A recent meta-heuristic algorithm, “Bat Algorithm”, is proposed by Xin-She Yang in 2010 [33], which is based on the behavior of natural bats using echo signals for locating their food sources. Bats have an interesting way of determining obstacles even in complete darkness by radiating sound waves from their wings. Such auditory behavior is present in very few species.

BA is developed by depicting the characteristics of bats, which are categorized by three rules as given below:

• Every bat senses the distance and sizing of the food/prey and background obstacles by echolocation, and it can also differentiate between them.
• In the process of preying, each bat flies arbitrarily with velocity of v_i considered at a position x_i, with a least frequency of f_min whose wavelength varies as λ and value of loudness is A₀. Frequency or the wavelength is determined by target proximity and pulse emission rate r, whose value ranges between [0, 1], happening inherently.
• The value of loudness varies between a range from a large positive value A₀ to a least constant value A_min.

Parameters of BAT Algorithm

• Population size: 20
• Number of generation: 50
• Dimension of search space: 6
• Loudness: 0.5
• Pulse rate: 0.5

The steps involved in the process of allocation of DG and capacitor using BA are given as follows.

• Step 1: Set the objective function.
• Step 2: Initialize the bat population (10 to 40) with variables: v_i, x_i, f_min, r and A₀.
• Step 3: Computation of fitness value is performed for each bat and then ranking is performed.
• Step 4: Update the variables v_i, x_i, f_min, r and A₀ by following Equations (20)–(24).

  $$f_i=f_{\min }+(f_{\max }-f_{\min })\beta$$

  (20)

  $$v_i^t=v_i^{t-1}+\left(x_i^{t-1}-x^{*}\right)f_i$$

  (21)

  $$x_i^t=x_i^{t-1}+v_i^t$$

  (22)

  $$A_i^{t+1}=\tau A_i^t$$

  (23)

  $$R_i^{t+1}=r_i^0\left[1-\exp (-\gamma t\right)]$$

  (24)
• Step 5: If (rand > r_i).

Then, a solution is taken from the available best solutions, based on which a local solution is produced, which is around the best solution, selected using Equation (25):

$$x_{new}=x_{old}+\epsilon A^t$$

(25)

and if

A new solution is generated by flying in a random fashion.

• Step 6: if (rand < A_i & f(x_i) < f(x*)).

Then, the new solutions are accepted.

• Step 7: Computation of the fitness value of each bat is performed.
• Step 8: Steps 4 to 6 are repeated until the loop ends into a criterion stopping it.

5. Simulation Results and Discussion

The value of voltage sensitivity characterizes the load models of the distribution system as constant voltage/power/impedance. The constant power load model in [34] is considered for simulation. The BFS algorithm is utilized to obtain the power loss of the uncompensated system, VSI, LSF, and bus voltages. The minimum and maximum limits of DG and capacitor sizes are 10% and total 100% of the loading in KW and kVAr of the network, respectively. The maximum number of DG/capacitor banks can be three, and the placement is limited to three, after which no improvement in objective function value is observed. No-load to full-load variation is obtained using the following equation:

$$P_{t,new }+j{Q}_{t,new }=\partial (P_t+j{Q}_t) Load factor(\partial )=0.5,0.51,0.52,\dots 1.6$$

(26)

The efficiency of the present approach is validated, and then it is implemented on the standard IEEE 33-bus as well as using 69-bus test systems in the MATLAB simulation platform. For both 33-bus and 69-bus test systems, the feeder loads are varied linearly from 50% (light load) to 160% (peak load) with a step size of 1% increasing every time. The optimal sizes of DG and capacitor for all load steps are calculated by BA.

The efficiency of the proposed methodology is analyzed based on four different cases on the IEEE 33- and 69-bus test systems, respectively. They are represented as follows:

• System without involving compensation
• System considering capacitor
• System considering DG
• System considering both DG and capacitor

5.1. Test System Using IEEE 33-Bus

This test system is considered as a medium scale RDS that comprises 33 buses and 32 branches. Base voltage and apparent base power are obtained as 12.66 kV and 10 MVA, respectively. The adoption of line and bus is performed from [20]. IEEE 33-bus RDS with its single line diagram is represented in Figure 2.

Analysis is performed with and without compensation, The former case being together and individual placement of DG and capacitor.

5.1.1. System without Compensation

The computation of the active power loss of the system is performed by running the load flow algorithm. The value of base case power loss is obtained as 210.98 kW, and minimum voltage is obtained as 0.9037 p.u.

CFT is utilized for obtaining the approximated base real power loss of the 33-bus test system, given as (27):

$${\mathrm{P}}_{\mathrm{loss}}(kW)=302.{\partial }^2-136.8\partial +45.21$$

(27)

5.1.2. System with Capacitor

In this scenario, one optimally sized capacitor is placed at every optimal location found using sensitivity analysis. Optimal locations obtained are the 14th, 24th, and 30th buses. Mitigation of power loss is performed to 138.35 from 210.98 kW, whereas VSI_min is maximized from a value of 0.6610 to 0.7423 p.u. Optimal DG and capacitor sizes for different load factors at optimal locations obtained using BA are shown in Figure 3a,b, respectively. Total active power loss with capacitor is formulated by CFT:

$${\mathrm{P}}_{\mathrm{loss}}^{\mathrm{Cap}}(kW)=169.8{\partial }^2-49.46\partial +21.55$$

(28)

Optimum size of the capacitors is given by:

$${\mathrm{Q}}_{\mathrm{optimal}}^{14th(Loc)}(kVAr)=23.73{\partial }^2+344.7\partial -27.08$$

(29)

$${\mathrm{Q}}_{\mathrm{optimal}}^{24th(Loc)}(kVAr)=41.27{\partial }^2+500.4\partial -25.2$$

(30)

$${\mathrm{Q}}_{\mathrm{optimal}}^{30th(Loc)}(kVAr)=39.96{\partial }^2+1000\partial -27.11$$

(31)

5.1.3. System with DG

DGs are optimally sited in three (13th, 25th, and 30th buses) different places. Optimum sizing of the DGs is calculated using BA. Reduction of real power loss occurs whose values are obtained as 72.78 from 210.98 kW, while there is improvement in the least bus voltage 0.9037 to 0.9669 p.u.

Formulated total active and reactive power losses with DG using CFT are given by:

$${\mathrm{P}}_{\mathrm{loss}}^{\mathrm{DG}}(kW)=82.0{\partial }^2-16.1\partial +4.9$$

(32)

Optimum kW of DG is given by:

$${\mathrm{P}}_{\mathrm{optimal}}^{14th(Loc)}(kW)=11.65{\partial }^2+760.4\partial -31.32$$

(33)

$${\mathrm{P}}_{\mathrm{optimal}}^{24th(Loc)}(kW)=31.77{\partial }^2+1063\partial -28.16$$

(34)

$${\mathrm{P}}_{\mathrm{optimal}}^{30th(Loc)}(kW)=35.36{\partial }^2+1030\partial -29.82$$

(35)

5.1.4. System with DG and Capacitor

Simultaneous allocation of DG and capacitor units in an RDS enhances system effectiveness, reduces the power losses, and increases the bus voltage. The sizing of DGs and capacitors is performed optimally at appropriate buses obtained by BA (

Table 3. Results of IEEE 33 RDS (various load models).

Parameters		Constant Load	Industrial Load	Residential Load	Commercial Load
Without Compensation (Scenario 1)	Ploss(kW)	210.98	163.66	159.09	152.59
	VSImin(p.u)	0.6610	0.6987	0.7030	0.7097
	Vmin(p.u)	0.9037	0.9162	0.9175	0.9195
Only Capacitor (Scenario 2)	Optimal kVAr and Sitting	680 (13)	240 (13)	270 (13)	290 (13)
		480 (25)	350 (25)	360 (25)	380 (25)
		1050 (30)	650 (30)	760 (30)	800 (30)
	Ploss(kW)	138.35	133.48	120.02	110.28
	% Ploss Reduction	34.4	18.44	24.55	27.72
	VSImin(p.u)	0.7423	0.7499	0.7621	0.7733
	Vmin(p.u)	0.9301	0.9324	0.9360	0.9393
Only DG (Scenario 3)	Optimal kW and Sitting	380 (13)	790 (13)	720 (13)	710 (13)
		490 (25)	850 (25)	830 (25)	820 (25)
		990 (30)	1020 (30)	980 (30)	940 (30)
	Ploss(kW)	72.78	36.01	43.70	46.42
	% Ploss Reduction	65.5	77.99	72.53	69.57
	VSImin(p.u)	0.8652	0.9069	0.8974	0.8959
	Vmin(p.u)	0.9669	0.9782	0.9749	0.9749
Simultaneous DG and Capacitor (Scenario 4)	Optimal kVAr and Sitting	380 (13)	200 (13)	250 (13)	250 (13)
		490 (25)	360 (25)	360 (25)	400 (25)
		990 (30)	600 (30)	750 (30)	770 (30)
	Optimal kWand Sitting	680 (13)	780 (13)	720 (13)	720 (13)
		480 (25)	850 (25)	800 (25)	850 (25)
		1050 (30)	1020 (30)	960 (30)	920 (30)
	Ploss(kW)	11.77	11.37	10.77	10.30
	% Ploss Reduction	94.42	93.05	93.23	93.24
	VSImin(p.u)	0.9601	0.9622	0.9626	0.9680
	Vmin(p.u)	0.9970	0.9912	0.9914	0.9923

).

Extraction of power loss from CFT for simultaneous allocation of DG and capacitor is given by:

$${\mathrm{P}}_{Loss}^{\mathrm{DG}+\mathrm{Cap}}(kW)=11.9{\partial }^2-0.11\partial +0.067$$

(36)

The voltage profile for the above-discussed scenarios under different load variations shown in Figure 4a–d reveals significant improvement in bus voltage when DG and capacitor are located concurrently (10.32%) over individual scenarios (2.92% and 6.99% for capacitor and DG, respectively).

Further, comparison of VSI (per unit values) under different scenarios in a full load condition (Figure 4) goes with the previous inference of providing maximum VSI enhancement while DG and capacitor are placed together (45.24%). VSI enhancement when the capacitor is placed is 12.29% and is 30.89% during DG placement.

Yet another objective function of power loss minimization also yields similar results. Power loss reduction is 34.4%, 65.5%, and 94.42% for capacitor, DG, and simultaneous DG and capacitor placement conditions, respectively (Figure 5). Interestingly, power loss minimization objective attainment is more than the other objective of VSI improvement. Figure 6 represents the VSI-comparison of the 33-bus system at normal load. Scenario 4 gives the best VSI improvement compared to all other scenarios. The power loss reductions of all scenarios are compared and shown in Figure 7. It is evident that there is vast improvement in the reduction of power loss in Scenario 4 of the system, which is better than the other scenarios represented.

To examine the presentation of the present methodology technique inside and out, it has applied been to various load models. The compensator sizes and sites, power loss, bus voltage, and VSI for all load models are presented in Table 3. Table 3 addresses a notable enhancement in the power loss decrease in all load models when contrasted and the base case. Figure 8a–d show the enhancement in bus voltage under various load models for all considered scenarios. As demonstrated in Figure 8a–d, the voltage at all feeders essentially improved for all load models because of the inclusion of compensators in the RDS. This exhibits that the present strategy is exceptionally precise in discovering the power loss and bus voltage for the system with various load models.

5.1.5. Comparative Analysis

The effectiveness of the proposed methodology is examined by comparison with other algorithms such as intersect mutation differential evolution (IMDE) [11], particle swarm optimization (PSO) [8], the bacterial foraging optimization algorithm (BFOA) [9], the analytical method [7], multi-objective particle swarm optimization (MOPSO) [12], and the binary particle swarm optimization algorithm (BPSO) [13], as tabulated in Table 2. Power loss reduction with minimization of bus voltage has greater improvement in the proposed method compared to other methods in all scenarios. The system with the DG and capacitor shows more significant improvement in VSI than the base case. Using VSI, the voltage stability level of the RDS can be determined such that if the stability level is poor, then appropriate action is taken as a remedy in the proposed method. The authors could not have compared VSI with other methods, due to unavailability. Mitigation of power loss, enhancement of bus voltage, and maximization of VSI are the attributes achieved using BA-based optimization at a higher end over other methods of comparison

Table 4. Results of IEEE 33 RDS (Constant Load Model).

Parameters		BA	IDME [11]	PSO [8]	BFOA [9]	Analytical [7]	FGA [12]	BPSO [13]
Without Compensation (Scenario-1)	Ploss(kW)	210.98	210.98	210.98	210.98	210.98	210.98	210.98
	VSImin(p.u)	0.6610	0.6610	0.6610	0.6610	0.6610	0.6610	0.6610
	Vmin(p.u)	0.9037	0.9037	0.9037	0.9037	0.9037	0.9037	0.9037
Only Capacitor (Scenario-2)	Optimal kVAr and Sitting	380 (13) 490(25) 990(30)	475 (14) 1037 (30)	N/A	350 (18) 820 (30) 277 (33)	1000 (33)	950 (18) 700 (30)	920 (33) 610 (14)
	Ploss(kW)	138.35	139.7	N/A	144.04	164.6	141.3	151.7
	% Ploss Reduction	34.4	33.79	N/A	31.72	22.83	33.03	28.1
	VSImin(p.u)	0.7423	N/A	N/A	N/A	N/A	N/A	N/A
	Vmin(p.u)	0.9301	0.9420	N/A	0.9361	0.9160	0.9290	0.9190
Only DG (Scenario-3)	Optimal kW and Sitting	680(13) 480(25) 1050(30)	840 (14) 1130 (30)	N/A	633 (7) 90 (18) 947 (33)	1000 (18)	600 (7) 1100 (32)	1300 (33) 520(8)
	Ploss(kW)	72.78	84.28	N/A	98.3	142.34	119.7	111.5
	% Ploss Reduction	65.5	60.06	N/A	53.41	33.29	43.27	47.15
	VSImin(p.u)	0.8652	N/A	N/A	N/A	N/A	N/A	N/A
	Vmin(p.u)	0.9669	0.9710	N/A	0.9645	0.9310	0.9350	0.9350
Simultaneous DG and Capacitor (Scenario-4)	Optimal kVAr and Sitting	380(13) 490(25) 990(30)	254.8 (16) 932.3 (30)	1457 (30)	163 (18) 541 (30) 338 (33)	400 (33) 500 (32)	800 (33) 650 (16)	1500 (30)
	Optimal kWand Sitting	680(13) 480(25) 1050(30)	1080 (10) 896.4 (31)	2511 (6)	542 (17) 160 (18) 895 (33)	447 (18) 559 (17)	600 (7) 1100 (32)	2500 (6)
	Ploss(kW)	11.77	32.08	59.7	41.41	84.28	59.5	57.3
	% Ploss Reduction	94.42	84.79	71.7	80.37	60.05	71.8	72.84
	VSImin(p.u)	0.9601	N/A	N/A	N/A	N/A	N/A	N/A
	Vmin(p.u)	0.9970	0.9790	0.9550	0.9783	0.9610	0.9600	0.9590

.

5.2. Test System Using IEEE 69-Bus

The performance of the BA algorithm is demonstrated by considering the next test system with radial distribution—a large-scale 69-bus that has a total load of 3.80 MW and 2.69 MVAR. Figure 9 illustrates the single line diagram of the IEEE 69-bus test system where this test system also includes line and bus as adopted from [35].

5.2.1. System without Compensation

BFS is the load flow for computing the uncompensated system power as well as voltage values. In this system, the real losses are obtained to be 225 kW and the reactive power losses are obtained to be 102.13 kVAr. The least value of bus voltage without any compensation technique is obtained as 0.9090 p.u, and the VSI least value is obtained as 0.6822 p.u. CFT is utilized to formulate the generalized equation in order to obtain the total real power loss, without any compensation in the case of the IEEE 69-bus system, which is given as follows:

$${\mathrm{P}}_{\mathrm{loss}}(kW)=335.4{\partial }^2-166.5\partial +55.38$$

(37)

5.2.2. System with Capacitor

In this scenario, three optimally sized capacitors at every optimal location identified using sensitivity analysis are located. Optimal locations attained are the 12th, 19th, and 61st buses. Mitigation of power loss is performed to a value of 144.96 kW from a value of 225 kW (i.e., percentage of mitigation is 35.57%); meanwhile, VSI_min is maximized from 0.6822 to 0.7516 p.u. Optimum DG and capacitor sizes for different load factors at optimal sittings attained using the proposed BA optimization algorithm are represented in Figure 10a,b.

Formulation of total real power loss with the effect of a capacitor is performed by CFT for IEEE 69-bus system is given by:

$${\mathrm{P}}_{\mathrm{loss}}^{\mathrm{C}}(kW)=192.7{\partial }^2-71.08\partial +23.18$$

(38)

Locations of the capacitors at the 12th, 19th, and 61st buses with varying load, indicating the optimal size, are given by:

$${\mathrm{Q}}_{\mathrm{optimal}}^{12th(Loc)}(kVAr)=62.23{\partial }^2+327.6\partial -2.832$$

(39)

$${\mathrm{Q}}_{\mathrm{optimal}}^{19th(Loc)}(kVAr)=0.794{\partial }^2+249.6\partial -14.96$$

(40)

$${\mathrm{Q}}_{\mathrm{optimal}}^{61st(Loc)}(kVAr)=53.2{\partial }^2+1179\partial -6.655$$

(41)

DNOs can plan for capacitor sittings using the above equations in distribution networks.

5.2.3. System with DG

Three DG units are placed at the 12th, 19th, and 61st buses using a VSI- and LSF-based sensitive analysis method. Determination of optimal sizes of the DG units is performed using the proposed BA-based optimization techniques. Mitigation of real power loss is achieved as 68.97 kW power from a power value of 225 kW (i.e., percentage of mitigation is 35.57%), while there is improvement in the minimum bus voltage from a value of 0.9090 p.u to a value of 0.9772 p.u.

The total real power and reactive power losses formulated with DG utilizing CFT are given by:

$${\mathrm{P}}_{\mathrm{loss}}^{\mathrm{DG}}(kW)=74.93{\partial }^2-8.414\partial +2.644$$

(42)

DGs’ optimal sizes for the 12th, 19th, and 61st locations are given by:

$${\mathrm{P}}_{\mathrm{optimal}}^{12th(Loc)}(kW)=40.02{\partial }^2+498.16\partial -12.01$$

(43)

$${\mathrm{P}}_{\mathrm{optimal}}^{19th(Loc)}(kW)=0.851{\partial }^2+366\partial -15.61$$

(44)

$${\mathrm{P}}_{\mathrm{optimal}}^{61st(Loc)}(kW)=52{\partial }^2+1664\partial -12.16$$

(45)

5.2.4. System with DG and Capacitor

In the present scenario, DGs and capacitors are allocated in an optimal way with a sizing option using the proposed BA technique. Figure 11 illustrates the comparison of real power loss for various scenarios considered for variation in load of the test system with 69-bus. Power loss and VSI_min are obtained as 5.01 kW, 0 p.u, and 0.9607 p.u, respectively, using simultaneous allocation of the DG and capacitor.

In all the scenarios, the power loss is mitigated in comparison to the base case (without compensation), and in Scenario 4, the largest loss mitigation is exposed, which is 97.77%. Additionally, the VSI and minimum bus voltage have enhanced in all the scenarios compared to the base case, and the largest enhancement is for Scenario 4, which is 0.9972 and 0.9607 p.u, respectively. For different loading conditions, the voltage profile of the 69-bus is represented, as shown in Figure 12a–d. It can be noted from the figures that simultaneous placement of the DG and capacitor in RDS enhances bus voltages meritoriously. From Table 3 and Figure 13, it is evident that the objective function is enhanced to a maximum value whenever the placements of the DG and capacitor are near to each other (Scenario 4). Attaining optimal solutions in Scenario 4 is the most optimal value for objective functions of all scenarios.

Extraction of power loss from CFT for simultaneous allocation of DG and capacitor is given by:

$${\mathrm{P}}_{\mathrm{loss}}^{\mathrm{DG}+\mathrm{C}}(kW)=4.99{\partial }^2-0.1052\partial +0.2131$$

(46)

Figure 7 and Figure 14 also demonstrate the loss mitigation attained by various methods for 33- and 69-bus systems, respectively. These figures evidently indicate that the BA-based optimization technique provides a superior performance to other optimization techniques available in the literature.

Table 5. Results of IEEE 69-RDS (various load models).

Parameters		Constant Load	Industrial Load	Residential Load	Commercial Load
Without Compensation (Scenario 1)	Ploss(kW)	225	171.39	164.87	156.92
	VSImin(p.u)	0.6822	0.7136	0.7211	0.7289
	Vmin(p.u)	0.9090	0.9196	0.9217	0.9242
Only Capacitor (Scenario 2)	Optimal kVAr and Sitting	400 (12)	290 (12)	300 (12)	300 (12)
		230 (19)	160 (19)	180 (19)	190 (19)
		1237 (61)	740 (61)	870 (61)	900 (61)
	Ploss(kW)	144.96	140.39	123.95	112.36
	% Ploss Reduction	35.57	18.08	24.81	28.39
	VSImin(p.u)	0.7516	0.7490	0.7640	0.7747
	Vmin(p.u)	0.9327	0.9324	0.9367	0.9398
Only DG (Scenario 3)	Optimal kW and Sitting	535 (12)	460 (12)	450 (12)	440 (12)
		340 (19)	320 (19)	310 (19)	300 (19)
		1693 (61)	1670 (61)	1570 (61)	1480 (61)
	Ploss(kW)	68.97	28.81	37.73	41.33
	% Ploss Reduction	69.34	83.19	77.11	73.66
	VSImin(p.u)	0.9113	0.9431	0.9357	0.9314
	Vmin(p.u)	0.9772	0.9857	0.9837	0.9826
Simultaneous DG and Capacitor (Scenario 4)	Optimal kVAr and Sitting	300 (12)	250 (12)	240 (12)	240 (12)
		269 (19)	170 (19)	200 (19)	190 (19)
		1202(61)	730 (61)	860 (61)	900 (61)
	Optimal kWand Sitting	479 (12)	460 (12)	410 (12)	430 (12)
		365 (19)	330 (19)	300 (19)	300 (19)
		1680 (61)	1660 (61)	1550 (61)	1480 (61)
	Ploss(kW)	5.01	4.08	4.54	4.02
	% Ploss Reduction	97.77	97.61	97.24	97.43
	VSImin(p.u)	0.9607	0.9594	0.9593	0.9593
	Vmin(p.u)	0.9972	0.9944	0.9944	0.9943

depicts the loss mitigation, minimum bus voltage, and VSI of the IEEE 69-RDS under various load models. Figure 15a–d show the enhancement in bus voltage profile under various load models of IEEE 69- RDS. As can be seen from Table 5 and Figure 15a–d, the loss mitigation decrease and bus voltage profile of the system at each load model is enhanced after the situation of a compensator in the RDS utilizing BA optimization procedure.

Compared with all scenarios, the simultaneous allocation of the DG and capacitor (Scenario 4) produces better loss reduction, bus voltage enhancement, and VSI improvement in all load models.

5.2.5. Comparative Analysis of 69-Bus System

The efficiency of the present approach has been tested by the obtained results from the viewpoint of minimum voltage, power loss, and VSI in comparison to all the scenarios with IMDE [11] and PSO [8] as tabulated in

Table 6. Results of IEEE 69-RDS (constant load model).

Parameters		BA	IDME [11]	PSO [8]
Without Compensation (Scenario 1)	Ploss(kW)	225	225	225
	VSImin(p.u)	0.6822	0.6822	0.6822
	Vmin(p.u)	0.9090	0.9090	0.9090
Only Capacitor (Scenario 2)	Optimal kVAr and Sitting	400 (12) 230 (19) 1237 (61)	375 (21) 12637 (61)	N/A
	Ploss(kW)	144.96	145.53	N/A
	% Ploss Reduction	35.57	35.2	N/A
	VSImin(p.u)	0.7516	N/A	N/A
	Vmin(p.u)	0.9327	0.9330	N/A
Only DG (Scenario 3)	Optimal kWand Sitting	535 (12) 340 (19) 1693 (61)	473 (20) 1730 (61)	N/A
	Ploss(kW)	68.97	70.92	N/A
	% Ploss Reduction	69.34	68.42	N/A
	VSImin(p.u)	0.9113	N/A	N/A
	Vmin(p.u)	0.9772	0.9808	N/A
Simultaneous DG and Capacitor (Scenario 4)	Optimal kVAr and Sitting	300 (12) 269 (19) 1202 (61)	1192 (61) 109 (63)	14013 (61)
	Optimal kW and Sitting	479 (12) 365 (19) 1680 (61)	479 (24) 1738 (62)	1566 (61)
	Ploss(kW)	5.01	13.83	25.9
	% Ploss Reduction	97.77	93.84	88.4
	VSImin(p.u)	0.9607	N/A	N/A
	Vmin(p.u)	0.9972	0.9915	0.9700

. The compensating device is required to enhance the performance of the distribution network [25,26,27]. Power loss mitigation with minimal bus voltage enhancement as in the BA-based optimization technique is better than other existing methods in all scenarios [36,37,38,39,40,41,42,43]. The DG and capacitor installed system shows more noteworthy enhancement in VSI than in the base case. The determination of voltage stability level of RDS can be performed using VSI, based on which appropriate action can be taken for the poor value of the index of stability using the proposed method. The authors could not have compared VSI with other methods due to unavailability. Mitigation of power loss, enhancement of bus voltage, and maximization of VSI attributes are achieved using BA-based optimization at the higher end over other methods of comparison (Table 6).

The accuracy of the results reveals that the present approach of BA is an effective and bio-inspired well-organized method able to solve complex problems in optimization. This BA algorithm is suggested based on the accuracy of the results as an accomplished tool of optimization for solving tough problems of optimization in the engineering field for future research works. Figure 13 depicts the comparison of VSI of a 69-bus system at normal load. Scenario 4 gives the best VSI improvement compared to all other scenarios.

The initial data and inflation rate, interest rate, and feeder distribution rate formulas are taken from the references [44,45,46]. The economic factors such as inflation and interest rate are considered to check the performance of the proposed method.

Table 7. Initial data of the problem.

Investement Cost of Capacitor/DG	Size of Capacitor, kVAr	Size of DG (kW)	Maintenance Cost of Capacitor/DG	Inflation Rate, %/Year	Interest Rate, %/Year	Load Growth, %/Year	Planning Period, Year
4000	1860	2210	400	10	15	1	20

presents the initial data of the problem with all necessary parameters. The size of the capacitor and DG is calculated as 1860 kVAr and 2210 kW, respectively.

Table 8. Simulation result for base case and Scenario 4.

	Power Loss, kW/pp	Risk Level Mwh/pp	Investment Cost	Maintenance Cost	Cost of Power Loss	Cost of Risk/pp	Total Cost
Initial status	210.98	5914	0	0	1,678,415	418,874	2,457,841
After planning	11.77	3214	26,000	2400	1,367,845	251,745	1,744,154

shows the savings of the system after compensation. The failure rate of the distribution feeders is analyzed and tabulated in

Table 9. Distribution feeder failure rate.

	Power Loss, MW/pp	Risk Level Mwh/pp	Investment Cost	Maintenance Cost	Cost of Power Loss	Cost of Risk/pp	Total Cost
Amount of error/detriment	210.98	11.77	−4000	−2400	9784	16,487	1147

.

6. Conclusions

The proposed approach investigates the integration of DG and capacitor placing and their sizing in the RDS to minimize the power loss and enhance the voltage stability. BA is applied to obtain optimal sizing of the DG and capacitor in the system of RDS. The generalized equation is derived using CFT to facilitate DNOs in the determination of DGs’ and capacitors’ optimal sizes for any particular change of load. The efficiency of the present algorithm is tested on the 33-bus and IEEE 69-bus RDS with four changing scenarios with various load models such as constant, industrial, residential, and commercial load models. Comparison is performed between simulated results with conventional techniques namely IDME, PSO, BFOA, analytical, FGA, and BPSO available in the literature. The attained results demonstrate that the integration of DG and capacitor (Scenario 4) is efficient in mitigation of power loss with enrichment of voltage stability. Additionally, the proposed approach is effective in determining the optimal solution in various scenarios. Thus, based on the results obtained, it is recommended to allocate both the DG and capacitor simultaneously in the distribution system to ensure maximum benefits from the system.