Next Article in Journal
Combined Optimal Design and Control of Hybrid Thermal-Electrical Distribution Grids Using Co-Simulation
Previous Article in Journal
Public Preferences in a Shifting Energy Future: Comparing Public Views of Eight Energy Sources in North America’s Pacific Northwest
Article

A Piezoelectric Harvesting Interface with Capacitive Partial Electric Charge Extraction for Energy Harvesting from Irregular High-Voltage Input

Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea
*
Author to whom correspondence should be addressed.
Energies 2020, 13(8), 1939; https://doi.org/10.3390/en13081939
Received: 18 March 2020 / Revised: 3 April 2020 / Accepted: 13 April 2020 / Published: 15 April 2020
(This article belongs to the Section State-of-the-Art Energy Related Technologies)

Abstract

A fully integrated piezoelectric energy harvesting interface is proposed for harvesting energy from irregular human motion. To handle irregular pulse inputs generated by the piezoelectric transducer (PZT), the proposed harvesting interface includes a wake-up controller that activates the harvesting interface only when human motion is detected and deformation is applied on the piezoelectric material, thereby keeping static power loss low. The PZT output voltage is increased to its peak voltage by removing any type of external load capacitance seen by the PZT during its deformation. Once the peak voltage is detected, a multi-voltage conversion-ratio-based switched-capacitor circuit is activated to transfer PZT-generated energy to the battery in multiple ratio steps to maximize the conversion efficiency, with the help of a carefully designed harvesting controller. To deal with open-circuit voltages (VOCS) higher than the maximum voltage tolerated (VMAX) by available technology, capacitive partial electric charge extraction is activated every time the PZT output voltage approaches the VMAX. The proposed harvesting interface extracts 3.37 times more energy than a conventional full-bridge rectifier-based harvesting scheme.
Keywords: energy harvester; piezoelectric generator; harvesting interface; high-voltage harvesting; capacitive partial electric charge extraction energy harvester; piezoelectric generator; harvesting interface; high-voltage harvesting; capacitive partial electric charge extraction

1. Introduction

With recent advancements in wearable electronics, numerous wearable devices, such as earbuds, smart rings, and smart watches, have been introduced for both entertainment and medical applications. Due to their light weight, the battery capacity of these devices tends to be low. Hence, these devices require frequent battery recharging, which is undesirable. Ambient energy harvesting has been adapted as a solution to prolong battery life or make these devices self-powered using various harvesting sources [1,2,3,4,5]. However, to harvest energy from vibrations produced by human motion, piezoelectric transducers (PZTs) [6,7,8] and triboelectric nano-generators (TENG) [9,10] are the most suitable options.
Substantial effort from both the material and circuit research communities has been invested in developing ways to harvest energy from PZTs and TENGs. As these harvesting sources are improved, more energy could be scavenged with high output voltage generated by these sources. Although there have been many harvesting interface designs proposed for low-voltage sources [11,12,13], few designs have been proposed for high-voltage sources. However, recently, a trend of energy harvesting from excitations with high open-circuit voltage (VOC) generated by PZTs [6,14] and TENGs [9,10] has been observed. Partial electric charge extraction (PECE) [14] can theoretically handle excitations with unlimited VOC. Therefore, this work also focuses on harvesting energy from strong excitations generating high VOC to maximize energy extraction from PZT.
A PZT can be electrically modelled as a current source (IP) in parallel with its internal capacitance (CP) [13], as shown in Figure 1. As the deformation force is applied to the PZT, it generates IP and charges CP, where the amount of charge (QP) generated during a single deformation event is proportional to the deformation applied to the PZT. As a harvesting circuit also behaves as a load, PZT can be subjected to different un-charged load capacitances (CL). Hence, during a single deformation event, QP does not vary with the load capacitance (CL) seen by PZT varies if the magnitude of the deformation on the PZT stays the same. PZT-generated energy (EP) can be measured as the maximum energy which could be harvested from PZT during a single deformation (with or without load). Therefore, the PZT-generated energy (EP) can be written as follows:
E P = 1 2 ( C P + C L ) V P 2 = 1 2 Q P 2 C P + C L
where VP is the final PZT-generated voltage. The inversely proportional relationship of the load capacitance (CP + CL) and EP in (1) implies that the energy extractable from the PZT can be maximized by decreasing CL. A smaller CL results in a faster increment in VP, which consequently makes the PZT damping force stronger [4,14]. Therefore, for the same amount of deformation, more mechanical energy is converted to electrical energy. As a result, by decreasing CL, more energy can be generated by the PZT, but this also results in higher peak voltage generation.
One of the most popular piezoelectric energy harvesting schemes is synchronous switch harvesting on inductor (SSHI) [13,15], which can be simplified as shown in Figure 1a. A negative voltage converter (NVC) is used to rectify alternating PZT output voltage (VP). As deformation is applied to the PZT, VP starts to develop across CP, and NVC starts conduction once VP becomes greater than VRECT. A battery (BAT) acts as a temporary storage for the energy harvested from the PZT. At the end of every half-cycle of sinusoidal input excitation (when VP becomes lower than VRECT), the polarity of VP is flipped using either an inductor [13] (bias-flip) or capacitors [16,17] (flipping-capacitors). This polarity flipping is performed to avoid wasting charges already collected on CP and reaching VRECT for the next half-cycle earlier, so that NVC conduction (harvesting) period can be maximized. Inductor-based bias-flip harvesters [13,15,18] usually require an inductor and a switch, as shown in Figure 1a. At the end of deformation, VP becomes lower than VRECT, therefore, NVC conduction stops. At this point, SF is turned on and energy from CP is transferred to the inductor, and then the inductor transfers this energy back to the CP. This results in an opposite voltage polarity on CP.
Flipping-capacitor rectifier (FCR) topology [16,17] can also be used to flip the polarity of CP. These harvesting interfaces require multiple capacitors and switches for this purpose, as shown in Figure 1a. Energy is transferred from CP to these capacitors in various configurations until no further energy can be transferred from CP. At this point, CP is shorted to drain any remaining energy. Then these flipping capacitors are re-arranged (with the help of switches) to charge CP with opposite polarity. In the case of strong input excitations (which can generate high VOC) applied to SSHI or FCR-based harvesters [13,15,16,17,18], VP does not change much, due to fixed energy storage voltage (VRECT), which acts as protection against strong input excitations. However, keeping storage voltage limited significantly reduces the energy extraction from the PZT [19], since it decreases PZT damping force, and hence lower energy extraction.
Another popular harvesting scheme is synchronous electric charge extraction (SECE) [7,20], as shown in Figure 1c. SECE-based circuits also require an NVC to deal with the alternating output voltage of the PZT. In SECE-based circuits, during a mechanical deformation on PZT, IP keeps charging CP until VP reaches its peak, as shown for first half-cycle of waveform in Figure 1c. S1 is turned on at this point to transfer energy from CP to inductor until VP becomes 0 V. Then S1 is turned off and S2/S3 are turned on to transfer energy from inductor to the battery (BAT). Although this scheme can handle the PZT-generated irregular input as energy is harvested from the PZT at the peak voltage, in the case of strong input excitation with high VOC, VP can exceed the maximum voltage tolerated by technology (VMAX), which can damage the harvesting interface.
Recently a new scheme, referred to as partial electric charge extraction (PECE) [14], was introduced to deal with the excitations with high VOC of the PZT. In this scheme, PZT-generated charges are partially extracted (VP decreases by ∆V) from the PZT once VP approaches VMAX. PECE allows operation without any load capacitor (CL = 0); therefore, the maximum amount of energy from the PZT can be extracted while keeping VP high enough until the end of the PZT deformation. Keeping VP high results in a higher damping force on the PZT, hence extracting more energy until the end of the peak detection. However, this scheme still reduces VP by 8 V (∆V) during a single PECE cycle, decreasing the damping force of the PZT. In addition, this scheme requires a bulky inductor, which limits the on-chip implementation. Therefore, to address these shortcomings, a fully integrated capacitor-based partial electric charge extraction system is proposed in this work. The switched capacitors in the proposed work do not act as a load during energy extraction from the PZT and are only used to extract energy from the PZT at the peak of VP or during a PECE cycle. Unlike prior flip-capacitor-based harvesters, the proposed circuit can handle strong excitations with very high VOC, while keeping VP below VMAX. In addition, unlike [14], the proposed capacitive PECE scheme aims to minimize the reduction in VP during a single PECE cycle (∆V = 1 V) to keep the electrical damping force of the PZT high, which results in higher energy extraction from the PZT.
The remainder of the paper is organized as follows: Section 2 briefly explains the top-level implementation of the proposed piezoelectric harvesting interface. The implementation details of the harvesting controller and sub-blocks are also elaborated in Section 2. In Section 3, the simulation results and comparison with prior works are described. Section 4 concludes the paper.

2. Capacitive PECE Harvesting Interface Implementation

Pulses generated by a PZT attached to a human body can be irregular. This means that the voltage generated by a PZT can also be random and can exceed the maximum voltage tolerated by the CMOS process used for IC fabrication. Therefore, a fully integrated harvesting interface to handle irregular input excitations is proposed in this work. A simplified circuit diagram of the proposed piezoelectric harvesting interface is shown in Figure 2a. To maximize the energy extraction from the PZT, no external load capacitor is added [14,19]. As the PZT is deformed, CP is charged until VP reaches its peak (VPK). For weak input excitation, VP remains lower than VMAX, and the charges are completely extracted at VPK, as shown in Figure 2b, which will be referred to as full electric charge extraction (FECE) in the rest of the paper. In the case of strong input excitation, where VP can exceed the VMAX, PECE is activated to extract a partial amount of charges from CP, and VP decreases by PECE step voltage (∆V). Here, ∆V is kept to a minimum to keep the electric damping force of the PZT high and to generate maximum energy after a PECE cycle [14,19]. Multi-ratio switched capacitors are utilized to harvest energy from the PZT and transfer it to the battery. After a single PECE cycle, VP keeps increasing until the peak voltage is detected, where FECE is activated (Figure 2b). In the case of FECE, energy is extracted in multiple steps with different ratios to increase the conversion efficiency during the down-conversion of VP.
The top-level circuit implementation details of the proposed harvesting interface are shown in Figure 3a. A full-bridge rectifier (FBR) is utilized to deal with the alternating output of the PZT. The rectified output (VRECT) is monitored with a wake-up controller (WUC) through a coupling capacitor (C1), which is an integrated high-voltage capacitor. The WUC, whose detail is discussed in Section 2.2, detects the deformation of the PZT by sensing the input voltage rising over a threshold voltage. As soon as the energy generation by the PZT is detected, the WUC activates the rest of the harvesting circuit to enable the harvesting operation (Phase I in Figure 4a). Otherwise, all the other circuits are power gated to minimize the static power loss. When input is detected, the WUC triggers the TRIG signal to activate the clock generator and voltage peak detector (VPD) [8] to track the PZT voltage and determine when the VRECT reaches its peak voltage (VPK). To deal with high PZT voltage, the VPD is also interfaced with VRECT using a high-voltage capacitor, C2.
During PZT deformation, a PZT-generated current (IP) charges the internal capacitance (CP). To maximize the energy extraction with maximized output voltage (VP) [19], the load capacitance seen by the PZT is minimized by keeping S1 and SX turned off. A clocked voltage-level tracker (VLT) is also activated to track the voltage level of VP, and to initiate partial charge extraction in case VP approaches VMAX. Two on-chip high-voltage capacitors, C3 (5 pF) and C4 (45 pF), are utilized to generate fractional peak voltage (with a division ratio of 10:1) to interface VLT with the high voltage of the PZT. R1 and C5 act as a low-pass filter during the high-frequency charge extraction cycles. The VLT keeps comparing the divided voltage (VDIV) with an adjustable reference voltage (VREF) until the end of the harvesting operation. This adjustable VREF (explained in Section 2.1) is necessary to determine the correct conversion ratio to achieve stable VOUT with maximum conversion efficiency. For example, a conversion ratio of 1/7 would be used if VRECT is between 35 V and 40 V. In this case, VREF is set to 4.0 V to monitor if VRECT exceeds 40 V. When it does exceed 40 V, the conversion ratio is adjusted to 1/8 and VREF is increased to 4.5 V, to detect if VRECT approaches 45 V. In this manner, the VLT continues to monitor VRECT and determine the proper conversion ratio and VREF, as shown in Figure 3b. The harvesting controller (HC) increases VREF during bending deformation, whereas it decreases VREF during harvesting operation to reconfigure the ratio according to the VRECT level.
A multiple-voltage conversion-ratio switched-capacitor (Multi-VCR SC) DC-DC converter [21] is utilized to down-convert VRECT and transfer the PZT-generated energy to the battery (5 V). In case VRECT exceeds VMAX (45 V), partial charge extraction is activated to partially lower VRECT and protect the integrated circuits, as shown in Figure 4b (Phase II). A carefully designed high-voltage level shifter (HVLS), similar to the one used in [21], is used to turn on S1. A clocked output control comparator (OCC) is also activated to turn on S2 only when VOUT > VBAT. In a single PECE cycle, the Multi-VCR SC converter is configured to a ratio of 1/8 and the energy transfer to the battery is stopped once VP is decreased by the PECE step voltage (∆V = 1 V). ∆V is kept small to keep the damping force of the PZT higher, which results in higher energy extraction post-PECE, which is similar to the approach taken in [14].
To perform PECE operations, the PECE monitor block is activated when the VLT detects VRECT reaching VMAX and operates until a peaking event is detected with VRECT. The VLT is deactivated at this point and is only reactivated once peak voltage is detected. The PECE monitor block consists of a high-voltage tracker (HVT) and low-voltage tracker (LVT), both of which are clocked comparators. As soon as the first PECE cycle is activated, charges are extracted from the PZT to the battery, and the LVT determines the end of a single PECE operation by detecting when VRECT approaches the lower threshold VLV, as shown in Figure 4a,b. During a single PECE cycle, the Multi-VCR SC converter keeps extracting charges from the PZT with a fixed VCR of 1/8, since the voltage variation during this process is relatively small, as shown in Figure 4. Upon the completion of a PECE cycle (Phase III activated), the HVT starts monitoring VRECT again and activates another PECE cycle if it reaches VMAX (VHV in Figure 4a,b) again. Until the peaking event is detected for VRECT, multiple PECE cycles can be activated for strong input excitations.
Once the peaking event of VRECT is detected, FECE is activated (Phase IV). The conceptual waveform of an FECE cycle is shown in Figure 4c. S1 and S2 are turned on to interface the Multi-VCR SC converter with VRECT, just like a PECE cycle. FECE starts with the conversion ratio corresponding to VREF (Figure 3b) recorded before peak detection, whereas VREF is adjusted to the lower value on the table. For example, when VRECT is near VMAX, a configuration ratio of 1/8 is selected for down-conversion as shown in Figure 4c, and VREF is set to 4 V. The VLT keeps monitoring VRECT, and the 1/8 configuration is maintained until VRECT drops below 40 V, which can be detected by monitoring VDIV dropping below 4 V. To maintain the conversion efficiency, the Multi-VCR SC converter ratio is changed to 1/7, and VREF is changed to 3.5 V, to modify the conversion ratio once it reaches the lower limit (mentioned in Figure 3b) of 35 V. Similar steps are repeated for further down-conversion of VRECT: VLT keeps tracking VRECT until the end of the harvesting operation, and the conversion ratio is changed to keep the conversion efficiency high. Thus, energy harvesting occurs in multiple steps (Figure 4c). Once VP reaches <10 V, S1 and S2 are turned off. At this point, SX and SY are turned on to transfer the remaining charges directly to the battery (Phase V). A reverse current detector (RCD) is activated to monitor this energy transfer and block reverse current. The dashed line of VRECT in Figure 4a shows an example (of weak input excitation) when the peak voltage is detected without PECE activation and hence the Multi-VCR SC converter starts the down-conversion from the lower VCR, as shown in Figure 4c. The sub-block implementation details are explained in the following sub-sections.

2.1. Harvesting Controller (HC)

The Harvesting controller is the key block that controls the overall sequence of the harvesting operation. Based on several comparison results (from VLT, HVT, LVT), it determines which harvesting step should be initiated, and when. As explained earlier, an adjustable VREF is required to determine the harvesting step; therefore, a diode stack, as shown in Figure 5, is used to generate multiple reference voltages with 500 mV steps. These multiple reference voltages are fed to 8 × 1 analog-multiplexers (MX, MY), where the output of MX (VX) is selected as VREF by another 2 × 1 analog-multiplexer (MZ) if the PZT voltage is increasing (before peak detection). The output of the other multiplexer MY (VY) is utilized (by MZ) as VREF if the PZT voltage is decreasing (after peak detection). The VLT keeps tracking the VRECT level by comparing the divided version of VRECT (VDIV) with VREF, and the HC makes a decision based on the output of the VLT. During this level tracking, the VPD also remains active until the PZT voltage peaking event, which means the output of the VPD (VPD) also remains high until the harvesting operation is initiated.
A 3-bit bi-directional counter is utilized to adjust VREF and determine the proper conversion ratio for the Multi-VCR SC converter during harvesting operation. When VPD is high, its inverted output, VPDB, remains low; therefore, initially VX is selected as the input for MZ. Initially, VREF (VX) is adjusted to VREF10 (1 V), which corresponds to VRECT < 10 V; hence, the initial conversion ratio remains fixed at 1. Once VRECT exceeds 10 V, the VDIV > VREF condition is met, and VH goes high to increment the bi-directional counter, which means VREF (VX) is incremented to VREF15 (1.5 V), and the conversion ratio is changed to 1/2. The HC keeps repeating these steps to increment VREF and the counter until either a peaking event or PECE condition is detected. The output of the ratio selector, which is a simple encoder, is applied to the Multi-VCR SC converter only during harvesting operation, to avoid any switching loss. After peaking event detection, VPD becomes low (VPDB high), which means VY becomes VREF. Here, VREF starts with voltage level immediately lower than VPK, which means VL is used to decrement the conversion ratio whenever the VLT detects that VDIV < VREF. The HC keeps repeating the VCR down-conversion operation until VRECT < 10 V, the point at which a direct connection between VRECT and battery is formed, and RCD is activated to determine the end of the harvesting operation. Once the harvesting operation ends, S [2:0] is reset and VREF is set to VREF10 (1 V) for the next harvesting operation.

2.2. Wake-Up Controller (WUC)

To keep the static power loss low, the harvesting circuit needs to be activated only when deformation is applied to the PZT. A low-power WUC (based on [8]) detects this deformation and activates the harvesting operation, as shown in Figure 6. The WUC needs to trigger (TRIG) when the PZT voltage exceeds a certain threshold voltage (VTH). However, when there is a slow increment in PZT voltage or in response to some noise, VRECT can reach near VTH, which can activate the short-circuit current from VDD, wasting energy. Therefore, in this work, MA–MC are added to reduce power consumption near VTH. As VRECT increases, so does VWUC; therefore, the voltage VGMA starts to increase, increasing the gate voltage of MA and thereby reducing the gate-to-source voltage difference (VGS), and hence reducing the leakage current. A similar operation is performed with MB and MC. During the mechanical deformation of the PZT, as VGT starts to increase, VINV starts pulling down (t0 on Figure 6b). Further increase in VGT triggers the TRIG signal faster (due to weaker pull-up), as shown by the box (marked with dashed lines) in Figure 6b. This scheme results in lower power consumption during the static mode as well as the trigger mode (VP > VTH).

3. Results and Discussion

The proposed harvesting circuit was designed and simulated with Cadence Spectre using commercial 350 nm BCD process (Supplementary Materials Figure S1). A PZT source with 20 nF internal capacitance was used for simulations, and VMAX of the given process was assumed to be 45 V. Figure 7a shows the simulation results using the proposed harvesting circuit with a gradual increase in input excitations. With weaker input excitations, the PZT-generated voltage (VOC) remains lower than VMAX; therefore, only capacitive FECE is activated, and charges are fully extracted from PZT whenever the peaking event is detected. However, as input excitations become stronger, the PZT voltage rises above VMAX, at which point capacitive PECE is activated to keep VRECT below VMAX. Figure 7b shows one of the cases of stronger excitations where VOC exceeds VMAX. As VRECT approaches VMAX, capacitive PECE is activated, and charges are partially extracted from the PZT until VRECT decreases by ∆V (1 V). VRECT keeps increasing after each PECE cycle, and multiple PECE cycles are activated before the final peak detection, where FECE is activated to fully discharge the PZT.
Figure 7c shows a zoomed waveform of a single capacitive PECE cycle. As the VRECT >= VMAX condition is met, PECE is activated (around t = 4.0633 s). S1 is turned on, and the Multi-VCR SC converter is activated with a fixed VCR of 1/8. S2 is closed to transfer energy to the battery until VRECT decreases by PECE step voltage (∆V = 1 V in this case). The PZT voltage keeps increasing until a peaking event is detected, at which point the charges are completely extracted from the PZT with FECE operation. A zoomed waveform of a capacitive FECE cycle is shown in Figure 7d. In this case, VOC is lower than 40 V; therefore, a VCR of 1/7 is initially applied for efficient voltage conversion. As CP is discharged, VRECT is decreased, and the Multi-VCR SC converter is reconfigured to lower ratios until VRECT becomes lower than 10 V. At this point, the minimum VCR of 1/2 becomes inefficient; hence a direct connection between CP and the battery is formed by turning off S1/S2 and turning on SX/SY. The direct energy transfer is monitored by the RCD to block the reverse current (by turning off SX/SY) when VRECT approaches 5 V. In the end, CP is fully discharged by shorting, which marks the end of the capacitive FECE cycle.
The performance and effectiveness of the proposed harvesting interface is evaluated with comprehensive simulations, as shown in Figure 8. The evaluation is performed with varying strengths of input excitations, whose strength can be represented with open circuit voltage (VOC). The energy harvested using the proposed harvesting interface is shown as EHRV, and the energy consumed from external power source VDD for circuit operation during a single harvesting operation is shown as ELOSS. Since the FBR-based harvesting scheme is conventionally used as a benchmark, the energy harvested using an FBR-based circuit is also measured and shown as EFBR. Figure 8a compares EHRV and EFBR, and it clearly shows that for high open-circuit voltages, the proposed harvesting circuit can extract more energy, compared to an FBR-based scheme. Figure 8b shows the relative improvement in amount of energy harvested with the proposed harvesting interface, compared to an FBR-based harvester. Up to 3.37 × energy extraction improvement is observed with input excitation with VOC of 100 V, which clearly shows the effectiveness of the proposed circuit. In addition, energy harvesting from input excitations with VOC > 45 V would not have been possible without a PECE harvesting scheme.
Table 1 compares the proposed harvesting interface with state-of-the-art harvesting circuits proposed for kinetic energy harvesting. Unlike prior flipping-capacitor-based harvesters [16,17], the proposed harvesting interface maximizes the PZT output voltage (to its peak voltage), resulting in stronger mechanical damping and higher energy extraction without the usage of large capacitors for bias flipping. Prior works [6,7,14,15,20] require a bulky off-chip inductor, whereas the proposed circuit needs eight high-voltage capacitors (0.75 nF each), which can be integrated on chip. The proposed harvesting interface can handle strong input excitations with high open-circuit voltage (simulated results shown for up to 100 V) thanks to the capacitive-PECE technique, while achieving 3.37 × energy extraction improvement compared to an FBR-based harvester. A fair comparison with an inductive-PECE scheme [14] on maximum input voltage is not possible, because, theoretically, both circuits can harvest energy from excitations with unlimited open-circuit voltage as long as the input current is within a manageable range. Proposed harvesting interface achieves the goal of implementation of the fully integrated capacitive PECE technique. Unlike many other PZT harvesting circuits, the PECE approach allows the harvesting of energy from strong input excitations with high VOC, potentially higher than the maximum voltage allowed by integrated circuit. The proposed harvesting interface successfully down-converts PZT-generated voltage to 5V, and also achieves maximum harvested energy per cycle compared to prior-works. Thanks to the PECE, the proposed harvesting interface maintains high energy extraction improvement, compared to the FBR-based harvesting system.

4. Conclusions

A novel fully integrated harvesting interface is proposed for kinetic energy harvesting from vibrations generated by human motion. To deal with voltages higher than that tolerated by available technology, a capacitor-based partial electric charge extraction scheme is adapted. Capacitive PECE continually extracts partial amounts of charge from the PZT while maintaining the PZT voltage near VMAX, which maximizes energy extraction from the PZT. Once the peak voltage is detected, the charges are completely extracted using the Multi-VCR SC converter in multiple steps to keep the conversion efficiency high. Thanks to the proposed harvesting circuit, the simulations show 3.37× energy extraction improvement is achieved, compared to a conventional FBR-based harvesting circuit.

Supplementary Materials

The following are available online at https://www.mdpi.com/1996-1073/13/8/1939/s1, Figure S1: (a) Simulation setup of proposed harvesting interface (b) conceptual waveforms of input current applied to PZT with generated output voltage (c) Simulation parameters for Figure 7 and Figure 8.

Author Contributions

Y.L. guided and directed the authors for this work, and H.S. advised on designing of sub-blocks of overall harvesting interface. M.B.K. proposed and designed the overall architecture of the proposed harvesting interface and wrote the paper. All authors have read and agreed to the published version of the manuscript.

Funding

This research was supported by the National Research Foundation of Korea (NRF) (2020R1A4A2002806 and 2019M3F3A1A01074451) and Sungkyunkwan University.

Conflicts of Interest

The authors declare no conflicts of interest

References

  1. Jung, W.; Oh, S.; Bang, S.; Lee, Y.; Sylvester, D.; Blaauw, D. A 3nW fully integrated energy harvester based on self-oscillating switched-capacitor DC-DC converter. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 9–13 February 2014. [Google Scholar]
  2. Cao, P.; Qian, Y.; Xue, P.; Lu, D.; He, J.; Hong, Z. 27.1 An 84% Peak Efficiency Bipolar-Input Boost/Flyback Hybrid Converter with MPPT and on-Chip Cold Starter for Thermoelectric Energy Harvesting. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 17–21 February 2019. [Google Scholar]
  3. Abouzied, M.A.; Ravichandran, K.; Sanchez-Sinencio, E. A fully integrated reconfigurable self-startup RF energy-harvesting system with storage capability. IEEE J. Solid-State Circuits 2017, 52, 704–719. [Google Scholar] [CrossRef]
  4. Kwon, D.; Rincon-Mora, G.A. A single-inductor 0.35 μm CMOS energy-investing piezoelectric harvester. IEEE J. Solid-State Circuits 2014, 49, 2277–2291. [Google Scholar] [CrossRef]
  5. Rawy, K.; Sharma, R.; Yoon, H.-J.; Khan, U.; Kim, S.-W.; Kim, T.T. An 88% Efficiency 2.4 μW to 15.6 μW Triboelectric Nanogenerator Energy Harvesting System Based on a Single-Comparator Control Algorithm. In Proceedings of the 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), Tainan, Taiwan, 5–7 November 2018; pp. 33–36. [Google Scholar]
  6. Yang, J.; Lee, M.; Park, M.J.; Jung, S.Y.; Kim, J. A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications. In Proceedings of the IEEE Symposium on VLSI Circuits, Digest of Technical Papers, Kyoto, Japan, 17–19 June 2015. [Google Scholar]
  7. Meng, M.; Ibrahim, A.; Xue, T.; Yeo, H.G.; Wang, D.; Roundy, S.; Trolier-McKinstry, S.; Kiani, M. 27.4 Multi-Beam Shared-Inductor Reconfigurable Voltage/SECE-Mode Piezoelectric Energy Harvesting of Multi-Axial Human Motion. In Proceedings of the 2019 IEEE International Solid- State Circuits Conference—(ISSCC), San Francisco, CA, USA, 17–21 February 2019; pp. 426–428. [Google Scholar]
  8. Saif, H.; Khan, M.B.; Lee, J.; Lee, K.; Lee, Y. A High-Voltage Energy-Harvesting Interface for Irregular Kinetic Energy Harvesting in IoT Systems with 1365% Improvement Using All-NMOS Power Switches and Ultra-low Quiescent Current Controller. Sensors 2019, 19, 3685. [Google Scholar] [CrossRef] [PubMed]
  9. Park, I.; Maeng, J.; Lim, D.; Shim, M.; Jeong, J.; Kim, C. A 4.5-to-16 μW integrated triboelectric energy-harvesting system based on high-voltage dual-input buck converter with MPPT and 70V maximum input voltage. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 11–15 February 2018. [Google Scholar]
  10. Park, I.; Maeng, J.; Shim, M.; Jeong, J.; Kim, C. A Bidirectional High-Voltage Dual-Input Buck Converter for Triboelectric Energy-Harvesting Interface Achieving 70.72% End-to-End Efficiency. In Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, 9–14 June 2019; pp. C326–C327. [Google Scholar]
  11. Du, S.; Seshia, A.A. A fully integrated split-electrode synchronized-switch-harvesting-on-capacitors (SE-SSHC) rectifier for piezoelectric energy harvesting with between 358% and 821% power-extraction enhancement. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 11–15 February 2018. [Google Scholar]
  12. Peng, Y.; Choo, D.K.; Oh, S.; Lee, I.; Jang, T.; Kim, Y.; Lim, J.; Blaauw, D.; Sylvester, D. 27.2 An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction Gain. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 17–21 February 2019. [Google Scholar]
  13. Ramadass, Y.K.; Chandrakasan, A.P. An efficient piezoelectric energy harvesting interface circuit using a bias-flip rectifier and shared inductor. IEEE J. Solid-State Circuits 2010, 45, 189–204. [Google Scholar] [CrossRef]
  14. Khan, M.B.; Saif, H.; Lee, Y. A Piezoelectric Energy Harvesting Interface for Irregular High Voltage Input with Partial Electric Charge Extraction with 3.9× Extraction Improvement. In Proceedings of the 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019-Proceedings, Macau, Macao, 4–6 November 2019; pp. 181–184. [Google Scholar]
  15. Javvaji, S.; Singhal, V.; Menezes, V.; Chauhan, R.; Pavan, S. Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting. In Proceedings of the ESSCIRC 2018—IEEE 44th European Solid State Circuits Conference, Dresden, Germany, 3–6 September 2018. [Google Scholar]
  16. Chen, Z.; Law, M.K.; Mak, P.I.; Ki, W.H.; Martins, R.P. Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting. IEEE J. Solid-State Circuits 2017, 52, 3168–3180. [Google Scholar] [CrossRef]
  17. Chen, Z.; Jiang, Y.; Law, M.K.; Mak, P.I.; Zeng, X.; Martins, R.P. 27.3 A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 17–21 February 2019. [Google Scholar]
  18. Sanchez, D.A.; Leicht, J.; Jodka, E.; Fazel, E.; Manoli, Y. A 4µW-to-1mW parallel-SSHI rectifier for piezoelectric energy harvesting of periodic and shock excitations with inductor sharing, cold start-up and up to 681% power extraction improvement. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 31 January–4 February 2016. [Google Scholar]
  19. Khan, M.B.; Kim, D.H.; Han, J.H.; Saif, H.; Lee, H.; Lee, Y.; Kim, M.; Jang, E.; Hong, S.K.; Joe, D.J.; et al. Performance improvement of flexible piezoelectric energy harvester for irregular human motion with energy extraction enhancement circuit. Nano Energy 2019, 58, 211–219. [Google Scholar] [CrossRef]
  20. Quelen, A.; Morel, A.; Gasnier, P.; Grezaud, R.; Monfray, S.; Pillonnet, G. A 30nA quiescent 80nW-to-14mW power-range shock-optimized SECE-based piezoelectric harvesting interface with 420% harvested-energy improvement. In Proceedings of the Digest of Technical Papers—IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 11–15 February 2018. [Google Scholar]
  21. Saif, H.; Khan, M.B.; Lee, Y. A 17V-to-45V Input 25 μw-to-10mW Output Power, 90.2%-Peak-Efficiency SC DC-DC Converter with Recursive Output Connection for High-Voltage Energy Harvesting. In Proceedings of the Proceedings of the Custom Integrated Circuits Conference, Austin, TX, USA, 14–17 April 2019. [Google Scholar]
Figure 1. Prior harvesting schemes: (a) synchronous switch harvesting on inductor (SSHI)-based harvester; (b) its conceptual operation waveform; (c) synchronous electric charge extraction (SECE)-based harvester; (d) its conceptual operation waveform.
Figure 1. Prior harvesting schemes: (a) synchronous switch harvesting on inductor (SSHI)-based harvester; (b) its conceptual operation waveform; (c) synchronous electric charge extraction (SECE)-based harvester; (d) its conceptual operation waveform.
Energies 13 01939 g001
Figure 2. (a) Proposed harvesting interface, and (b) its conceptual operation waveform.
Figure 2. (a) Proposed harvesting interface, and (b) its conceptual operation waveform.
Energies 13 01939 g002
Figure 3. (a) Top-level implementation of proposed harvesting interface; (b) ratio configuration with adjustable reference voltage (VREF) for multiple-voltage conversion-ratio switched-capacitor (Multi-VCR) converter.
Figure 3. (a) Top-level implementation of proposed harvesting interface; (b) ratio configuration with adjustable reference voltage (VREF) for multiple-voltage conversion-ratio switched-capacitor (Multi-VCR) converter.
Energies 13 01939 g003
Figure 4. Conceptual waveform of operation phases of proposed harvesting circuit: (a) overall harvesting waveform with single input pulse; (b) zoomed partial charge extraction cycle; (c) zoomed full charge extraction cycle.
Figure 4. Conceptual waveform of operation phases of proposed harvesting circuit: (a) overall harvesting waveform with single input pulse; (b) zoomed partial charge extraction cycle; (c) zoomed full charge extraction cycle.
Energies 13 01939 g004
Figure 5. Harvesting controller (HC).
Figure 5. Harvesting controller (HC).
Energies 13 01939 g005
Figure 6. Wake-up controller (WUC) (a) circuit; (b) corresponding waveform.
Figure 6. Wake-up controller (WUC) (a) circuit; (b) corresponding waveform.
Energies 13 01939 g006
Figure 7. Simulation results using the proposed harvesting interface (a) gradual increase in input excitation and corresponding partial electric charge extraction (PECE)/ full electric charge extraction (FECE) activation; (b) zoomed waveform for a high input excitation; (c) zoomed waveform for a single capacitive-PECE cycle; (d) zoomed waveform showing Multi-VCR SC converter reconfiguration during a single FECE cycle.
Figure 7. Simulation results using the proposed harvesting interface (a) gradual increase in input excitation and corresponding partial electric charge extraction (PECE)/ full electric charge extraction (FECE) activation; (b) zoomed waveform for a high input excitation; (c) zoomed waveform for a single capacitive-PECE cycle; (d) zoomed waveform showing Multi-VCR SC converter reconfiguration during a single FECE cycle.
Energies 13 01939 g007
Figure 8. Simulation results with a range of input excitations (a) harvested energy values using proposed harvester (EHRV) and full-bridge rectifier (FBR)-only harvester (EFBR); (b) energy extraction improvement compared to FBR-only harvester.
Figure 8. Simulation results with a range of input excitations (a) harvested energy values using proposed harvester (EHRV) and full-bridge rectifier (FBR)-only harvester (EFBR); (b) energy extraction improvement compared to FBR-only harvester.
Energies 13 01939 g008
Table 1. Comparison with the prior arts.
Table 1. Comparison with the prior arts.
This Work[15] ESSCIRC’ 18[14] A-SSCC’ 19[7] ISSCC’ 19[20] ISSCC’ 18[6] VLSI’ 15[9] ISCCC’ 18
Process350 nm (HV)130 nm(LV)350 nm (HV)350 nm (LV)40 nm (HV)250 nm (HV)180 nm (HV)
Harvesting TechniqueCapacitive PECESSHIInductive PECEVM-SECESECESeries-Parallel SCDual-input Buck
Fully IntegratedYesNoNoNoNoNoNo
Harvesting SourcePZTPZTPZTPZTPZTPZTTENG
Excitation TypeIrregular PulsePeriodicIrregular PulsePeriodic & ShockPeriodic & ShockIrregular PulsePeriodic
Source Capacitance20 nF14 nF20 nF17 nF–49 nF43 nF150 nF-
Inductor/Capacitor0.75 nF × 8 (On-chip)47 μH
(Off-chip)
220 μH
(Off-chip)
2.2 mH
(Off-chip)
2.2 mH
(Off-chip)
470 μH
(Off-chip)
-
Max. Input Voltage>100 V * (Theoretically unlimited)2.5 V>60 V * (Theoretically unlimited)5 V **6 V **35 V70 V *
Output Voltage5 V-3–4 V-1.5 V, 2.8 V2.5 V Regulated3–5 V
Max. Improvement ***3.37×3.85×3.90×5.11×4.2×--
Max. EHRV (Per Pulse)>32 μJ0.122 μJ **>15.56 μJ **-0.55 μJ **160 μJ0.163 μJ **
* Open-circuit voltage. ** Estimated from paper. *** Max. Improvement = (EHRV − ELOSS)/EFBR.
Back to TopTop