Research on the Neutral-Point Voltage Balance for NPC Three-Level Inverters under Non-Ideal Grid Conditions

Abstract

In order to solve the neutral-point voltage unbalancing problem for neutral-point clamped (NPC) three-level inverters under non-ideal grid conditions, a novel zero-sequence component injection method for modulation signals was proposed in this paper. Based on the mathematical expressions of neutral-point voltage unbalancing, the fluctuation of the neutral-point voltage under different grid conditions was studied. The proposed method dynamically calculates the zero-sequence component for modulation signals by region selections based on sinusoidal pulse width modulation (DCR-SPWM). Under non-ideal grid conditions, this DCR-SPWM method can control the neutral-point voltage balance for NPC three-level inverters with different grid and output power conditions, and improves the grid current quality. The simulation results verified the correctness of the theoretical analysis in this paper, and the feasibility and effectiveness of this method were verified by the experiments in the experimental platform of the NPC three-level grid-connected inverter based on DSP-CPLD controllers.

1. Introduction

The neutral-point clamped (NPC) three-level inverter has been widely used in medium or high voltage and high power conversions, especially as a dc/ac converter for a photovoltaic (PV) power generation system [1,2], which influences the safety and stability of the PV system for grid connection. Compared with two level inverters, the NPC three-level inverter has lower voltage stress on power devices, lower electromagnetic noise, and lower total harmonic distortion (THD) [3,4], which is shown in Figure 1.

In the NPC three-level inverter circuit, two capacitors for the dc bus are used in series to clamp the neutral-point (NP) potential. Ideally, the voltage of the two capacitors are both half of the dc bus voltage. However, due to the capacitance parameter error, the inconsistent characteristics of the switching devices, the unbalancing of three phase operation, etc. [5], the NP voltage unbalancing problem appears, which will increase the voltage stress on switching devices [6,7], and lead low-order harmonic currents into the grid [8]. Therefore, the NP voltage balance has been the research emphasis of three-level inverters.

Most of the research has focused on the NP voltage unbalancing problem under symmetrical load or ideal grid conditions. Based on space vector pulse width modulation (SVPWM), ref. [9] proposed a control strategy that replaced the small switching states with other switching states. Using sinusoidal pulse width modulation (SPWM), ref. [10] proposed a closed-loop space vector modulation using converter redundant switching states combined to the controller to balance the neutral point, and the dc link had very low voltage ripples due to lower harmonic components flowing through those capacitors via the harmonic current. In [11], a proportional integral (PI) controller was used to modify the reference current to maintain the NP voltage balance. NP balance methods based on zero-sequence component injection were proposed in [12,13], which calculated the zero-sequence component in the switching period. Based on the average NP voltage model in a line cycle, the PI controllers were proposed for the NP voltage balance in some papers, and the PI parameters for the controllers were usually selected for the maximum output power condition [14,15].

However, due to the nonlinear loads and transient grid faults, the three phase grid can become unbalanced and distorted [16,17,18]. Under the non-ideal conditions described above, the NP voltage module is different from that under ideal grid conditions, and the NP voltage unbalancing problem leads more low order harmonic currents into the grid [19,20], which significantly deteriorates the performance of the inverter. Therefore, as NP voltage balance methods designed under ideal grid conditions are not suitable for non-ideal grid conditions, it is important to research balancing the NP voltage under non-ideal grid conditions. Recently, some studies have focused on this problem. In [21,22], the redundant switching state was dictated based on the voltage feedback from the dc link to balance the NP voltage, which can balance the NP voltage under various load conditions with fast response and good dynamic performance. In [23,24], the expressions of NP voltage under unbalanced grid conditions were derived, and the relationship between the ripple of NP voltage and the unbalanced grid was studied. The authors in [20] analyzed the form and spectrums of NP voltage under low-voltage ride-through (LVRT) conditions, and proposed an optimized SVPWM method to control the NP voltage balance. In [25,26], the dc/dc converter was added to balance the NP voltage and suppress the common mode voltage under unbalanced grid conditions.

The objective of this paper was to propose a new method to control the NP voltage balance under non-ideal grid conditions. This method dynamically calculates the zero-sequence component for modulation signals by region selections based on SPWM (DCR-SPWM). Section 2 studies the NP voltage under different grid conditions and presents the expressions of NP voltage under non-ideal grid conditions. In Section 3, the DCR-SPWM method for non-ideal grid is proposed. Based on the mathematical expressions of NP voltage, the modulation signals are divided in different regions, and the expressions of zero-sequence component are derived, which is added to the modulation signals. Section 4 analyzes the NP voltage ripple and the harmonic performance of the grid currents with the DCR-SPWM method and compared it with the traditional SPWM method under different grid and output power conditions. Section 5 presents the simulated and experimental results of the proposed DCR-SPWM method and the method in [14] under different grid and output power conditions. The analysis and experiments showed that the DCR-SPWM method could control the NP voltage balance for NPC three-level inverters under non-ideal grid conditions, and improved the grid current quality.

2. Mathematical Analysis of the Neutral-Point Voltage under Non-Ideal Grid Conditions

In Figure 1, v_c1 is the voltage of capacitor C₁, v_c2 is the voltage of capacitor C₂, and V_dc is the dc bus voltage. Supposing that v_c1 and v_c2 are equal, each phase leg of the NPC three-level inverter can output three levels (V_dc/2, −V_dc/2, 0), and the “P”, “N”, and “0” states represent V_dc/2, −V_dc/2, and 0, respectively.

In this paper, the SPWM method uses the single polar SPWM strategy, which is shown in Figure 2 where u_x is the modulation signal of phase x (x = a, b, c) and v_x is the leg voltage of phase x (x = a, b, c).

The NP current i_o can be defined as the average current in a switching cycle, which flows out from the neutral point O in Figure 1, it can be expressed as:

$$i_o={\displaystyle \sum _{x=a,b,c}{d}_{x0}{i}_x}$$

(1)

where d_x0 and i_x represent the duty cycle of “0” state and the three phase grid current, d_x0 can be derived as:

$$\{\begin{array}{l}{d}_{a0}=1-\left|u_{a\_ref}\right|\\ d_{b0}=1-\left|u_{b\_ref}\right|\\ d_{c0}=1-\left|u_{c\_ref}\right|\end{array}$$

(2)

where u_{a_ref}, u_{b_ref}, u_{c_ref} are three phase modulation signals. By substituting Equation (2) into Equation (1), i_o can be derived as:

$$i_o=-{\displaystyle \sum _{x=a,b,c}\left|u_{x\_ref}\right|i_x}$$

(3)

Defining v_c as the difference between v_c1 and v_c2 in Figure 1, v_c is expressed as:

$$v_c=v_{c1}-v_{c2}$$

(4)

Meanwhile, the NP voltage v_c can be expressed as:

$$v_c=\frac{1}{C}{\displaystyle \int i_{o}dt}$$

(5)

where C is the capacitance of C₁ and C₂.

Substituting Equation (3) into Equation (5), v_c can be derived as:

$$v_c=-\frac{1}{C}{\displaystyle \int ({\displaystyle \sum _{x=a,b,c}\left|u_{x\_ref}\right|i_x)dt}}$$

(6)

Under the non-ideal grid condition, according to the symmetrical components method, three phase unbalance components are composed with symmetrical positive/negative/zero-sequence components. As the zero-sequence component can be neglected in the Three-phase Three-wire inverter system, therefore, the modulation signals can be expressed as:

$$\{\begin{array}{l}{u}_{a\_ref}=u_{ap\_ref}+u_{an\_ref}\\ u_{b\_ref}=u_{bp\_ref}+u_{bn\_ref}\\ u_{c\_ref}=u_{cp\_ref}+u_{cn\_ref}\end{array}$$

(7)

where u_{ap_ref}, u_{bp_ref}, u_{cp_ref} represent the positive-sequence components of three phase modulation signals and u_{an_ref}, u_{bn_ref}, u_{cn_ref} represent the negative-sequence components of three phase modulation signals.

Commonly, to describe the proportion of negative-sequence component to the positive-sequence component for the non-ideal grid, the unbalance factor λ is introduced here [27]:

$$\lambda =\frac{A_n}{A_p}$$

(8)

where A_p and A_n represent the amplitudes of positive and negative sequence components, respectively.

Supposing that the voltage of the filter inductor is ignored, the positive-sequence and negative-sequence components of three phase modulation signals can be expressed as:

$$\{\begin{array}{l}{u}_{ap\_ref}=\frac{2E_{mp}}{V_{dc}}\sin (\omega t+{\phi }_{up})\\ u_{bp\_ref}=\frac{2E_{mp}}{V_{dc}}\sin (\omega t+{\phi }_{up}-2\pi /3)\\ u_{cp\_ref}=\frac{2E_{mp}}{V_{dc}}\sin (\omega t+{\phi }_{up}+2\pi /3)\end{array}$$

(9)

$$\{\begin{array}{l}{u}_{an\_ref}=\lambda \frac{2E_{mp}}{V_{dc}}\sin (\omega t+{\phi }_{un})\\ u_{bn\_ref}=\lambda \frac{2E_{mp}}{V_{dc}}\sin (\omega t+{\phi }_{un}+2\pi /3)\\ u_{cn\_ref}=\lambda \frac{2E_{mp}}{V_{dc}}\sin (\omega t+{\phi }_{un}-2\pi /3)\end{array}$$

(10)

In Equations (9) and (10), E_mp represents the amplitude of the positive-sequence grid voltages; ω is the line angle frequency; and φ_up and φ_un represent the phase angle of positive-sequence and negative-sequence modulation signals, respectively, which also represent the phase angle of positive-sequence and negative-sequence grid voltages, respectively.

Under non-ideal grid conditions, unbalance grid voltages cause a double line frequency ripple at the output power of the inverter [28]. If the control target of the grid side is suppressing the ripple component at active power, the three phase grid currents can be expressed as:

$$\{\begin{array}{l}{i}_a=i_{ap}+i_{an}\\ i_b=i_{bp}+i_{bn}\\ i_c=i_{cp}+i_{cn}\end{array}$$

(11)

where i_ap, i_bp, i_cp represent the positive-sequence components of three phase grid currents and i_an, i_bn, i_cn represent the negative-sequence components of three phase grid currents.

In Equation (11), the positive-sequence and negative-sequence components of three phase grid currents are as follows:

$$\{\begin{array}{l}{i}_{ap}=I_{mp}\sin (\omega t+{\phi }_{up}-{\phi }_{ui})\\ i_{bp}=I_{mp}\sin (\omega t+{\phi }_{up}-{\phi }_{ui}-2\pi /3)\\ i_{cp}=I_{mp}\sin (\omega t+{\phi }_{up}-{\phi }_{ui}+2\pi /3)\end{array}$$

(12)

$$\{\begin{array}{l}{i}_{an}=-\lambda I_{mp}\sin (\omega t+{\phi }_{un}-{\phi }_{ui})\\ i_{bn}=-\lambda I_{mp}\sin (\omega t+{\phi }_{un}-{\phi }_{ui}+2\pi /3)\\ i_{cn}=-\lambda I_{mp}\sin (\omega t+{\phi }_{un}-{\phi }_{ui}-2\pi /3)\end{array}$$

(13)

In Equations (12) and (13), I_mp represents the amplitude of the positive-sequence grid currents, and φ_ui is the phase difference between positive-sequence grid voltage and positive-sequence grid current.

Substituting Equations (7) and (11) into Equation (6), v_c can be derived as:

$$v_c=-\frac{1}{C}{\displaystyle \int [{\displaystyle \sum _{x=a,b,c}\left|u_{xp\_ref}+u_{xn\_ref}\right|(i_{xp}+i_{xn})}]dt}$$

(14)

By substituting Equations (9), (10), (12), and (13) into Equation (14), the waveforms of v_c under different grid conditions are shown in Figure 3, where C and I_mp are normalized.

Under ideal grid condition (λ = 0) in Figure 3, it can be seen that v_c fluctuates at three times the line frequency. Under non-ideal grid conditions, when λ = 0.1, the fluctuating frequency of v_c changes to the line frequency, and the ripple of v_c is also larger than that under ideal grid conditions.

3. Proposed NP Voltage Balance Method under Non-Ideal Grid Conditions

In Section 2, from Equation (14), it can be seen that the fluctuation of NP voltage is caused by the NP current i_o. Therefore, by adding the appropriate zero-sequence component into the modulation signals, i_o can be controlled, then the NP voltage balance can be achieved.

3.1. Analysis of Zero-Sequence Component for Modulation Signals

Defining u₀ as the zero-sequence component, which is added to the modulation signals, three phase modulation signals can be expressed as:

$$\{\begin{array}{l}{u}_{{}_{a\_ref}}^{\prime }=u_{ap\_ref}+u_{an\_ref}+u_0\\ u_{b\_ref}^{\prime }=u_{bp\_ref}+u_{bn\_ref}+u_0\\ u_{{}_{c\_ref}}^{\prime }=u_{cp\_ref}+u_{cn\_ref}+u_0\end{array}$$

(15)

By substituting Equations (11) and (15) into Equation (3), the expression of i_o is derived as:

$$i_o=-{\displaystyle \sum _{x=a,b,c}\left[\left|u_{xp\_ref}+u_{xn\_ref}+u_0\right|(i_{xp}+i_{xn})\right]}$$

(16)

Defining φ’_ua0, φ’_ub0, φ’_uc0 as the positively sloped zero-crossing points s of u’_{a_ref}, u’_{b_ref}, u’_{c_ref}, respectively. Aiming at eliminating the ripple of NP voltage, i_o is controlled to be zero in Equation (16), when φ’_ua0 > 0, u₀ can be expressed as:

$$u_0=\{\begin{array}{l}-\frac{\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)-\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)+\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{\left(i_{ap}+i_{an}\right)-\left(i_{bp}+i_{bn}\right)+\left(i_{cp}+i_{cn}\right)},{\phi }_{ua0}^{\prime }\le \omega t<{\phi }_{uc0}^{\prime }-\pi \\ -\frac{\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)-\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)-\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{\left(i_{ap}+i_{an}\right)-\left(i_{bp}+i_{bn}\right)-\left(i_{cp}+i_{cn}\right)},{\phi }_{uc0}^{\prime }-\pi \le \omega t<{\phi }_{ub0}^{\prime }\\ -\frac{\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)+\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)-\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{\left(i_{ap}+i_{an}\right)+\left(i_{bp}+i_{bn}\right)-\left(i_{cp}+i_{cn}\right)},{\phi }_{ub0}^{\prime }\le \omega t<{\phi }_{ua0}^{\prime }+\pi \\ -\frac{-\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)+\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)-\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{-\left(i_{ap}+i_{an}\right)+\left(i_{bp}+i_{bn}\right)-\left(i_{cp}+i_{cn}\right)},{\phi }_{ua0}^{\prime }+\pi \le \omega t<{\phi }_{uc0}^{\prime }\\ -\frac{-\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)+\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)+\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{-\left(i_{ap}+i_{an}\right)+\left(i_{bp}+i_{bn}\right)+\left(i_{cp}+i_{cn}\right)},{\phi }_{uc0}^{\prime }\le \omega t<{\phi }_{ub0}^{\prime }+\pi \\ -\frac{-\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)-\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)+\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{-\left(i_{ap}+i_{an}\right)-\left(i_{bp}+i_{bn}\right)+\left(i_{cp}+i_{cn}\right)},\begin{array}{c}{\phi }_{ub0}^{\prime }+\pi \le \omega t<2\pi \\ 0\le \omega t<{\phi }_{ua0}^{\prime }\end{array}\end{array}$$

(17)

When φ’_ua0 < 0, u₀ can be expressed as:

$$u_0=\{\begin{array}{l}-\frac{\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)-\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)+\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{\left(i_{ap}+i_{an}\right)-\left(i_{bp}+i_{bn}\right)+\left(i_{cp}+i_{cn}\right)},\begin{array}{c}{\phi }_{ua0}^{\prime }+2\pi \le \omega t<2\pi \\ 0\le \omega t<{\phi }_{uc0}^{\prime }-\pi \end{array}\\ -\frac{\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)-\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)-\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{\left(i_{ap}+i_{an}\right)-\left(i_{bp}+i_{bn}\right)-\left(i_{cp}+i_{cn}\right)},{\phi }_{uc0}^{\prime }-\pi \le \omega t<{\phi }_{ub0}^{\prime }\\ -\frac{\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)+\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)-\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{\left(i_{ap}+i_{an}\right)+\left(i_{bp}+i_{bn}\right)-\left(i_{cp}+i_{cn}\right)},{\phi }_{ub0}^{\prime }\le \omega t<{\phi }_{ua0}^{\prime }+\pi \\ -\frac{-\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)+\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)-\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{-\left(i_{ap}+i_{an}\right)+\left(i_{bp}+i_{bn}\right)-\left(i_{cp}+i_{cn}\right)},{\phi }_{ua0}^{\prime }+\pi \le \omega t<{\phi }_{uc0}^{\prime }\\ -\frac{-\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)+\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)+\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{-\left(i_{ap}+i_{an}\right)+\left(i_{bp}+i_{bn}\right)+\left(i_{cp}+i_{cn}\right)},{\phi }_{uc0}^{\prime }\le \omega t<{\phi }_{ub0}^{\prime }+\pi \\ -\frac{-\left(u_{ap\_ref}+u_{an\_ref}\right)\left(i_{ap}+i_{an}\right)-\left(u_{bp\_ref}+u_{bn\_ref}\right)\left(i_{bp}+i_{bn}\right)+\left(u_{cp\_ref}+u_{cn\_ref}\right)\left(i_{cp}+i_{cn}\right)}{-\left(i_{ap}+i_{an}\right)-\left(i_{bp}+i_{bn}\right)+\left(i_{cp}+i_{cn}\right)},{\phi }_{ub0}^{\prime }+\pi \le \omega t<{\phi }_{ua0}^{\prime }+2\pi \end{array}$$

(18)

The positively sloped zero-crossing points φ’_ua0, φ’_ub0, φ’_uc0 can be expressed as:

$${\phi }_{ua0}^{\prime }=\frac{1}{2}\left[\arcsin (\frac{{\mathrm{C}}_a}{\sqrt{{\mathrm{A}}_a^2+{\mathrm{B}}_a^2}})-\arctan (\frac{{\mathrm{B}}_a}{{\mathrm{A}}_a})\right]$$

(19)

$${\phi }_{ub0}^{\prime }=\frac{1}{2}\left[\arcsin (\frac{{\mathrm{C}}_b}{\sqrt{{\mathrm{A}}_b^2+{\mathrm{B}}_b^2}})-\arctan (\frac{{\mathrm{B}}_b}{{\mathrm{A}}_b})\right]$$

(20)

$${\phi }_{uc0}^{\prime }=\frac{1}{2}\left[\arcsin (\frac{{\mathrm{C}}_c}{\sqrt{{\mathrm{A}}_c^2+{\mathrm{B}}_c^2}})-\arctan (\frac{{\mathrm{B}}_c}{{\mathrm{A}}_c})\right]$$

(21)

In Equations (19)–(21), the expressions of coefficients A_i, B_i, C_i, (i = a, b, c) are shown in

Table 1. Expressions of A_i, B_i and C_i.

Coefficient	Expressions
Aa	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[\sqrt{3}{\lambda }^2\cos \left({\phi }_{ui}-2{\phi }_{un}\right)+\sqrt{3}\lambda \cos \left({\phi }_{ui}-{\phi }_{un}-{\phi }_{up}\right)+\sqrt{3}\cos \left({\phi }_{ui}-2{\phi }_{up}\right)\right]$
Ba	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[-\sqrt{3}{\lambda }^2\sin \left({\phi }_{ui}-2{\phi }_{un}\right)-\sqrt{3}\lambda \sin \left({\phi }_{ui}-{\phi }_{un}-{\phi }_{up}\right)-\sqrt{3}\sin \left({\phi }_{ui}-2{\phi }_{up}\right)\right]$
Ca	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[-\frac{\sqrt{3}}{2}\left({\lambda }^2+1\right)\sin \left({\phi }_{ui}\right)-2\sqrt{3}\lambda \sin ({\phi }_{ui})\cos ({\phi }_{un}-{\phi }_{up})\right]$
Ab	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[-\sqrt{3}{\lambda }^2\sin \left({\phi }_{ui}-2{\phi }_{un}+\frac{\pi }{6}\right)+\sqrt{3}\lambda \cos \left({\phi }_{ui}-{\phi }_{un}-{\phi }_{up}\right)+\sqrt{3}\sin \left({\phi }_{ui}-2{\phi }_{up}-\frac{\pi }{6}\right)\right]$
Bb	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[\sqrt{3}{\lambda }^2\sin \left({\phi }_{ui}-2{\phi }_{un}-\frac{\pi }{3}\right)-\sqrt{3}\lambda \sin \left({\phi }_{ui}-{\phi }_{un}-{\phi }_{up}\right)+\sqrt{3}\sin \left({\phi }_{ui}-2{\phi }_{up}+\frac{\pi }{3}\right)\right]$
Cb	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[-\frac{\sqrt{3}}{2}({\lambda }^2+1)\sin \left({\phi }_{ui}\right)+2\sqrt{3}\lambda \sin \left({\phi }_{ui}\right)\cos \left({\phi }_{un}-{\phi }_{up}+\frac{\pi }{3}\right)\right]$
Ac	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[\sqrt{3}{\lambda }^2\sin \left({\phi }_{ui}-2{\phi }_{un}-\frac{\pi }{6}\right)+\sqrt{3}\lambda \cos \left({\phi }_{ui}-{\phi }_{un}-{\phi }_{up}\right)-\sqrt{3}\sin \left({\phi }_{ui}-2{\phi }_{up}+\frac{\pi }{6}\right)\right]$
Bc	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[\sqrt{3}{\lambda }^2\sin \left({\phi }_{ui}-2{\phi }_{un}+\frac{\pi }{3}\right)-\sqrt{3}\lambda \sin \left({\phi }_{ui}-{\phi }_{un}-{\phi }_{up}\right)+\sqrt{3}\sin \left({\phi }_{ui}-2{\phi }_{up}-\frac{\pi }{3}\right)\right]$
Cc	$I_{mp}\frac{2E_{mp}}{V_{dc}}\left[-\frac{\sqrt{3}}{2}({\lambda }^2+1)\sin \left({\phi }_{ui}\right)+2\sqrt{3}\lambda \sin \left({\phi }_{ui}\right)\cos \left({\phi }_{un}-{\phi }_{up}-\frac{\pi }{3}\right)\right]$

.

As shown in Figure 4, when E_mp/(V_dc/2) = 0.5, λ = 0.1, and φ_ui = −π/4, u₀ is calculated in different regions I–VI, which is divided by the zero-crossing points of u’_{x_ref} (x = a, b, c).

3.2. Design of the NP Voltage Balance Controller

The control principle diagram of the NPC three-level grid-connected inverter under non-ideal grid conditions is shown in Figure 5, where the DDSRF-PLL represents the decoupling double synchronous reference frame phase-locked loop unit, and the DCR unit dynamically calculates the zero-sequence component for modulation signals by region selections (DCR).

In Figure 5, according to three phase modulation signals u_{a_ref}, u_{b_ref}, u_{c_ref}, three phase grid voltages e_a, e_b, e_c, grid currents i_a, i_b, i_c and average capacitor voltages v_c1^avg, v_c2^avg, the DCR-SPWM block generates the modified modulation signals with zero-sequence voltage u_m for balancing the NP voltage, where v_c1^avg, v_c2^avg are the average voltage of v_c1 and v_c2 in a line cycle. Additionally, u’_{a_ref}, u’_{b_ref}, u’_{c_ref} are the modified modulation signals with u_m, which are compared with carrier waves to generate driving signals for the switches of the inverter.

Inside the DCR-SPWM block, the input signals u_{a_ref}, u_{b_ref}, u_{c_ref} of the DCR unit are modulation signals without zero-sequence voltage, i_a, i_b, i_c are three phase grid currents, e_a, e_b, e_c are three phase grid voltages, and the output signals u₀ of the DCR unit is the zero-sequence component for the modulation signals, which are used for suppressing the ripple of the NP voltage v_c.

In order to eliminate the ripple of the NP voltage v_c, the DCR unit dynamically calculates the zero-sequence component u₀ in different regions of the modulation signal, which is divided by the positively sloped zero-crossing points φ’_ux0 of u’_{x_ref} (x = a, b, c), where φ’_ux0 is calculated according to the grid currents and grid voltages at different grid conditions in a line cycle. The detailed flowchart of the DCR unit is shown in Figure 6. Furthermore, a PI controller is used to restrain the dc unbalanced voltage of v_c, and the input signals of the PI controller are v_c1^avg, v_c2^avg. The design of this controller for the NP voltage balance has been previously presented in many papers, so the detailed design is not given here. In order to make the difference between v_c1^avg and v_c2^avg zero, this controller outputs the signal u_{0_dc}, which is added to the modulation signals. Therefore, u_m is the sum of u_{0_dc} and u₀, which is the zero-sequence voltage that is added to the modulation signals to balance the NP voltage.

Figure 6 shows the main working flowchart of the DCR unit where E_x (x = a, b, c) and I_x represent the root mean square (RMS) value of the grid voltages e_x and grid currents i_x, respectively, φ_ex and φ_ix represent the phase angle of grid voltages and grid currents, respectively. φ’_ux0(k) and u_0(n) are the calculated value of φ’_ux0 and u₀, respectively. E_erro, I_erro, and φ_erro are allowable errors, E_mp and I_mp are the amplitudes of positive-sequence grid voltages and positive-sequence grid currents, respectively, φ_up and φ_un are the phase angles of the positive-sequence and negative-sequence modulation signals, respectively, φ_ui is the phase difference between the positive-sequence grid voltage and positive-sequence grid current, λ is the unbalance factor, i_xp and i_xn represent the positive-sequence and negative-sequence components of three phase grid currents, and u_xp and u_xn represent the positive-sequence and negative-sequence components of the three phase modulation signals.

In the k-th line cycle, the RMS value E_x(k), I_x(k), and phase angle φ_ex(k), φ_ix(k) are calculated, and are compared with E_{x(k − 1)}, I_{x(k − 1)}, φ_{ex(k − 1)}, and φ_{ix(k − 1)}, respectively, which are the calculated values in the (k − 1)th line cycle. If the absolute differences between the values of variables in the kth and (k − 1)th line cycle are greater than the allowable errors, the positively sloped zero-crossing points φ’_ux0(k) of u’_{x_ref} (x = a, b, c) need to be calculated by Equations (19)–(21), if not, φ’_ux0(k) of u’_{x_ref} (x = a, b, c) are equal to φ’_{ux0(k − 1)} of u’_{x_ref} (x = a, b, c), which are calculated in the (k − 1)th line cycle. In the nth switching cycle, u_xp(n), u_xn(n), i_xp(n), and i_xn(n) are calculated, and a line cycle is divided into six regions I-VI by φ’_ux0, then u_0(n) is calculated by Equations (17) and (18) in the present region.

4. Performance Analysis

4.1. Analysis of the NP Voltage Fluctuation

According to Equations (6) and (16), when the proposed DCR-SPWM method is applied, v_c can be expressed as:

$$v_c=-\frac{1}{C}{\displaystyle \int [{\displaystyle \sum _{x=a,b,c}\left|u_{xp\_ref}+u_{xn\_ref}+u_0\right|(i_{xp}+i_{xn})}]}dt$$

(22)

Supposing that E_mp/(V_dc/2) = 0.5, C, and I_mp are normalized, according to Equations (9)–(14) and (22), the ripple of v_c is related to λ and φ_ui. With the traditional SPWM and proposed DCR-SPWM method, surfaces for the ripple of v_c are plotted as shown in Figure 7.

In Figure 7a, with the traditional SPWM method, the ripple of v_c increases when φ_ui varies from 0 to π/4 (or −π/4 to 0), and λ varies from 0 to 0.2. In Figure 7b, with the proposed DCR-SPWM method, the ripple of v_c is almost zero, which is not varied with φ_ui and λ.

From the comparison above, it can be seen that the proposed DCR-SPWM method can suppress the NP voltage ripple under different λ and φ_ui conditions.

4.2. Analysis of the Grid Current Harmonics

Suppose that v_{x_SPWM} and v_{x_DCR} are the leg voltages of the inverter with the traditional SPWM and proposed DCR-SPWM method, respectively, considering the influence of NP voltage, v_{x_SPWM} and v_{x_DCR} are expressed as follows:

$$v_{x\_SPWM}=(u_{xp\_ref}+u_{xn\_ref})\frac{V_{dc}}{2}+\left|u_{xp\_ref}+u_{xn\_ref}\right|\frac{v_c}{2}+v_{\mathrm{xh}\_\mathrm{mod}}$$

(23)

$$v_{x\_DCR}=(u_{xp\_ref}+u_{xn\_ref}+u_0)\frac{V_{dc}}{2}+\left|u_{xp\_ref}+u_{xn\_ref}+u_0\right|\frac{v_c}{2}+v_{\mathrm{xh}\_\mathrm{mod}}$$

(24)

In Equations (23) and (24), v_{xh_mod} represents the harmonic component caused by the modulation method, which was analyzed in [29].

In the Three-phase Three-wire inverter system, the grid currents of the inverter can be expressed as:

$$i_x=\frac{1}{L}{\displaystyle \int \left[v_x-e_x-\frac{1}{3}{\displaystyle \sum _{x=a,b,c}\left(v_x+e_x\right)}\right]}dt$$

(25)

where L is inductance of the filter inductor, and the THD value of the grid currents can be calculated as per [29]:

$$\mathrm{THD}=\sqrt{\frac{{\displaystyle {\int }_0^{2\pi }{i}_x^2(\omega t)d\omega t}}{{\displaystyle {\int }_0^{2\pi }{i}_{x1}^2(\omega t)d\omega t}}-1}$$

(26)

where i_x1 represents the fundamental component of the grid currents.

According to Equations (9)–(14) and (22)–(26), the THD value of the grid currents is related to λ and φ_ui. The surfaces for THD of grid current i_b with the traditional SPWM and DCR-SPWM method are shown in Figure 8. Compared with the traditional SPWM method, the THD value was lower when the proposed DCR-SPWM method was applied, and was lower than 4% under different λ and φ_ui conditions.

From the analysis above, it can be seen that the proposed DCR-SPWM method can improve the quality of grid currents under different λ and φ_ui conditions.

5. Simulation and Experimental Verification

5.1. Simulation Analysis

In order to verify the validity of the proposed DCR-SPWM method, a simulation model of the NPC three-level grid-connected inverter was built using Matlab tools, and the specifications of the simulation model are shown in

Table 2. Specifications of the prototype for simulation.

Specifications of the Prototype
DC bus voltage	Vdc = 200 V
DC bus capacitors	C1 = C2 = 150 μF
Switching frequency	fs = 16 kHz
Apparent power	S = 600 VA
The amplitude of grid voltages	Ema = 55 V, Emb = 40 V, Emc = 55 V
Output phase filter	L: 1.5 mH, C: 15 μF

.

Figure 9 shows the simulated waveforms of capacitor voltage v_c1, v_c2, leg voltage v_b, grid current i_b, and three phase grid voltages e_x (x = a, b, c). In Figure 9a,b, the DCR-SPWM method was applied at 0.25 s, where it can be seen that before using the DCR-SPWM method, the capacitor voltage ripple was 20 V at φ_ui = 0, and 30 V at φ_ui = −π/4, respectively. After the DCR-SPWM method was applied, the NP voltage ripple was reduced effectively and the grid current quality improved. In Figure 9c, a parallel resistor was connected to the dc bus capacitor C₂ for the NPC three-level grid-connected inverter, resulting in the 40 V dc unbalanced voltage between v_c1 and v_c2, which made the positive and negative half line cycle of the output leg voltage asymmetric, so as to the grid current. When the DCR-SPWM method was applied, the NP voltage ripple and dc unbalanced voltage could be controlled effectively, and quality of the grid current was improved.

5.2. Experimental Verification

As shown in Figure 10a, the proposed DCR-SPWM method was tested in the experimental platform of an NPC three-level grid-connected inverter based on DSP-CPLD. The experimental platform is shown in Figure 10b where the oscilloscope and power analyzer are Tektronix MDO3000 (Tektronix, Shanghai, China) and HIOKI PW6001 (HIOKI, Nagano, Japan), respectively. The specifications of the experimental prototype are shown in

Table 3. Specifications of the experimental prototype.

The Specifications of the Experimental Prototype
DC bus voltage	Vdc = 200 V
DC bus capacitors	C1 = C2 = 150 μF
Switching frequency	fs = 16 kHz
Apparent power	S = 600 VA
Digital Process Unit	DSP: TMS320F2808, CPLD: EPM1270T
Power switches module	IGBT FZ06NPA070FP
Output phase filter	L: 1.5 mH, C: 15 μF

.

Figure 11 and Figure 12 show the experimental waveforms of v_c1, v_c2, i_b, v_b e_x (x = a, b, c) and u_m at different λ and φ_ui conditions, where v_b is the leg voltage of phase b and u_m is zero-sequence voltage that added to the modulation signals, which is added to modulation signals. From Figure 11, it can be seen that when using the traditional SPWM method, the ripple of capacitor voltage v_c1 was about 20 V at φ_ui = 0, λ = 0.1 in Figure 11a, and was about 32 V at φ_ui = −π/4, λ = 0.1 in Figure 11b, after the proposed DCR-SPWM method was applied, the ripple of NP voltage was suppressed effectively. In Figure 11c,d, the PI-SPWM method proposed in [14] was applied and it can be seen that the proposed method had better performance in terms of the system steady-state error when compared with the PI-SPWM method.

In Figure 12, before using the DCR-SPWM method, the ripple of v_c1 was about 20 V at λ = 0.15, φ_ui = 0 in Figure 12a, and was 24 V at λ = 0.2, φ_ui = 0 in Figure 12b. The NP voltage ripple was very low with the DCR-SPWM method.

When a parallel resistor connected to the dc bus capacitor C₂ for the NPC three-level grid-connected inverter, experimental waveforms of v_c1, v_c2, i_b, v_b, e_x, and u_m under different conditions are shown in Figure 13, defined that v_c1^avg and v_c2^avg were the average voltage of v_c1 and v_c2, respectively, and before using the DCR-SPWM method, the NP voltage was unbalanced, the voltage difference between v_c1^avg and v_c2^avg was about 80 V. In a line cycle, the amplitude of the leg voltage in the positive half cycle was higher than in the negative half cycle, and the quality of the grid current was not beneficial to the grid connections.

When the DCR-SPWM method was applied, the voltage difference between v_c1 and v_c2 decreased to almost zero, and the ripple of v_c1 and v_c2 was very low. From Figure 13a,b,e, it can be seen that under different unbalanced grid and output power conditions, the system reached the steady-state rapidly, and the quality of the grid current was improved.

Figure 14 shows the harmonics analysis of the grid current i_b under different λ conditions, when φ_ui = −π/4, it can be seen that when the DCR-SPWM method was applied, much low order harmonics were decreased, and the THD value decreased so that the quality of the grid current was beneficial to grid connections.

Figure 15 and Figure 16 show the ripple of v_c1 and the THD results of i_b at different unbalanced grid conditions with different control methods. It can be seen that with the traditional SPWM method, the ripple of v_c1 increased much higher and the THD value was higher than 5% when λ varied from 0 to 0.2 at φ_ui = −π/4, instead, when compared with the PI-SPWM method, the DCR-SPWM method proposed in this paper decreased the ripple of v_c1 effectively, and the THD value of grid current was decreased, which was lower than 4%.

According to the experimental and simulation results, under different unbalanced grid and output power conditions, the proposed DCR-SPWM method can suppress the ripple of the NP voltage effectively; when the NP voltage has dc unbalanced voltage, the NP voltage is controlled to be balanced fast, furthermore, this DCR-SPWM method improved the grid current quality and reduced its THD effectively when compared with the PI-SPWM method proposed in [14].

6. Conclusions

In order to solve the NP voltage unbalancing problem for NPC three-level grid-connected inverter under non-ideal grid conditions, the unbalanced form of NP voltage under non-ideal grid conditions was studied, and the DCR-SPWM method under non-ideal grid conditions was proposed. This proposed DCR-SPWM method dynamically calculates the zero-sequence component for modulation signals by region selections, and the theoretical analysis and experiment results showed that the proposed method had a good ability to control the NP voltage balance, and improved the grid current quality effectively.