Research on the Neutral-Point Voltage Balance for NPC Three-Level Inverters under Non-Ideal Grid Conditions

Jian Guo Lyu 1,2,* ID , Ji Dong Wang 1, Wen Bin Hu 1 and Zhao Feng Wu 1 1 Nanjing University of Science and Technology, Nanjing 210094, China; wangjidong_5058@163.com (J.D.W.); hwb_njust@163.com (W.B.H.); wuzhaofeng@njust.edu.cn (Z.F.W.) 2 Jiangsu Collaborative Innovation Center for Smart Distribution Network, Nanjing 211167, China * Correspondence: jianguolyu@njust.edu.cn; Tel.: +86-025-8431-5415


Introduction
The neutral-point clamped (NPC) three-level inverter has been widely used in medium or high voltage and high power conversions, especially as a dc/ac converter for a photovoltaic (PV) power generation system [1,2], which influences the safety and stability of the PV system for grid connection.Compared with two level inverters, the NPC three-level inverter has lower voltage stress on power devices, lower electromagnetic noise, and lower total harmonic distortion (THD) [3,4], which is shown in Figure 1.
In the NPC three-level inverter circuit, two capacitors for the dc bus are used in series to clamp the neutral-point (NP) potential.Ideally, the voltage of the two capacitors are both half of the dc bus voltage.However, due to the capacitance parameter error, the inconsistent characteristics of the switching devices, the unbalancing of three phase operation, etc. [5], the NP voltage unbalancing problem appears, which will increase the voltage stress on switching devices [6,7], and lead low-order harmonic currents into the grid [8].Therefore, the NP voltage balance has been the research emphasis of three-level inverters.
controller was used to modify the reference current to maintain the NP voltage balance.NP balance methods based on zero-sequence component injection were proposed in [12,13], which calculated the zero-sequence component in the switching period.Based on the average NP voltage model in a line cycle, the PI controllers were proposed for the NP voltage balance in some papers, and the PI parameters for the controllers were usually selected for the maximum output power condition [14,15].However, due to the nonlinear loads and transient grid faults, the three phase grid can become unbalanced and distorted [16][17][18].Under the non-ideal conditions described above, the NP voltage module is different from that under ideal grid conditions, and the NP voltage unbalancing problem leads more low order harmonic currents into the grid [19,20], which significantly deteriorates the performance of the inverter.Therefore, as NP voltage balance methods designed under ideal grid conditions are not suitable for non-ideal grid conditions, it is important to research balancing the NP voltage under non-ideal grid conditions.Recently, some studies have focused on this problem.In [21,22], the redundant switching state was dictated based on the voltage feedback from the dc link to balance the NP voltage, which can balance the NP voltage under various load conditions with fast response and good dynamic performance.In [23,24], the expressions of NP voltage under unbalanced grid conditions were derived, and the relationship between the ripple of NP voltage and the unbalanced grid was studied.The authors in [20] analyzed the form and spectrums of NP voltage under low-voltage ride-through (LVRT) conditions, and proposed an optimized SVPWM method to control the NP voltage balance.In [25,26], the dc/dc converter was added to balance the NP voltage and suppress the common mode voltage under unbalanced grid conditions.
The objective of this paper was to propose a new method to control the NP voltage balance under non-ideal grid conditions.This method dynamically calculates the zero-sequence component for modulation signals by region selections based on SPWM (DCR-SPWM).Section 2 studies the NP voltage under different grid conditions and presents the expressions of NP voltage under non-ideal grid conditions.In Section 3, the DCR-SPWM method for non-ideal grid is proposed.Based on the mathematical expressions of NP voltage, the modulation signals are divided in different regions, and the expressions of zero-sequence component are derived, which is added to the modulation signals.Section 4 analyzes the NP voltage ripple and the harmonic performance of the grid currents with the DCR-SPWM method and compared it with the traditional SPWM method under different grid and output power conditions.Section 5 presents the simulated and experimental results of the proposed DCR-SPWM method and the method in [14] under different grid and output power conditions.The analysis and experiments showed that the DCR-SPWM method could control the Most of the research has focused on the NP voltage unbalancing problem under symmetrical load or ideal grid conditions.Based on space vector pulse width modulation (SVPWM), ref. [9] proposed a control strategy that replaced the small switching states with other switching states.Using sinusoidal pulse width modulation (SPWM), ref. [10] proposed a closed-loop space vector modulation using converter redundant switching states combined to the controller to balance the neutral point, and the dc link had very low voltage ripples due to lower harmonic components flowing through those capacitors via the harmonic current.In [11], a proportional integral (PI) controller was used to modify the reference current to maintain the NP voltage balance.NP balance methods based on zero-sequence component injection were proposed in [12,13], which calculated the zero-sequence component in the switching period.Based on the average NP voltage model in a line cycle, the PI controllers were proposed for the NP voltage balance in some papers, and the PI parameters for the controllers were usually selected for the maximum output power condition [14,15].
However, due to the nonlinear loads and transient grid faults, the three phase grid can become unbalanced and distorted [16][17][18].Under the non-ideal conditions described above, the NP voltage module is different from that under ideal grid conditions, and the NP voltage unbalancing problem leads more low order harmonic currents into the grid [19,20], which significantly deteriorates the performance of the inverter.Therefore, as NP voltage balance methods designed under ideal grid conditions are not suitable for non-ideal grid conditions, it is important to research balancing the NP voltage under non-ideal grid conditions.Recently, some studies have focused on this problem.In [21,22], the redundant switching state was dictated based on the voltage feedback from the dc link to balance the NP voltage, which can balance the NP voltage under various load conditions with fast response and good dynamic performance.In [23,24], the expressions of NP voltage under unbalanced grid conditions were derived, and the relationship between the ripple of NP voltage and the unbalanced grid was studied.The authors in [20] analyzed the form and spectrums of NP voltage under low-voltage ride-through (LVRT) conditions, and proposed an optimized SVPWM method to control the NP voltage balance.In [25,26], the dc/dc converter was added to balance the NP voltage and suppress the common mode voltage under unbalanced grid conditions.
The objective of this paper was to propose a new method to control the NP voltage balance under non-ideal grid conditions.This method dynamically calculates the zero-sequence component for modulation signals by region selections based on SPWM (DCR-SPWM).Section 2 studies the NP voltage under different grid conditions and presents the expressions of NP voltage under non-ideal grid conditions.In Section 3, the DCR-SPWM method for non-ideal grid is proposed.Based on the mathematical expressions of NP voltage, the modulation signals are divided in different regions, and the expressions of zero-sequence component are derived, which is added to the modulation signals.Section 4 analyzes the NP voltage ripple and the harmonic performance of the grid currents with the Energies 2018, 11, 1331 3 of 21 DCR-SPWM method and compared it with the traditional SPWM method under different grid and output power conditions.Section 5 presents the simulated and experimental results of the proposed DCR-SPWM method and the method in [14] under different grid and output power conditions.The analysis and experiments showed that the DCR-SPWM method could control the NP voltage balance for NPC three-level inverters under non-ideal grid conditions, and improved the grid current quality.

Mathematical Analysis of the Neutral-Point Voltage under Non-Ideal Grid Conditions
In Figure 1, v c1 is the voltage of capacitor C 1 , v c2 is the voltage of capacitor C 2 , and V dc is the dc bus voltage.Supposing that v c1 and v c2 are equal, each phase leg of the NPC three-level inverter can output three levels (V dc /2, −V dc /2, 0), and the "P", "N", and "0" states represent V dc /2, −V dc /2, and 0, respectively.
In this paper, the SPWM method uses the single polar SPWM strategy, which is shown in Figure 2 where u x is the modulation signal of phase x (x = a, b, c) and v x is the leg voltage of phase x (x = a, b, c).NP voltage balance for NPC three-level inverters under non-ideal grid conditions, and improved the grid current quality.

Mathematical Analysis of the Neutral-Point Voltage under Non-Ideal Grid Conditions
In Figure 1, vc1 is the voltage of capacitor C1, vc2 is the voltage of capacitor C2, and Vdc is the dc bus voltage.Supposing that vc1 and vc2 are equal, each phase leg of the NPC three-level inverter can output three levels (Vdc/2, −Vdc/2, 0), and the "P", "N", and "0" states represent Vdc/2, −Vdc/2, and 0, respectively.
In this paper, the SPWM method uses the single polar SPWM strategy, which is shown in Figure 2 where ux is the modulation signal of phase x (x = a, b, c) and vx is the leg voltage of phase x (x = a, b, c).The NP current io can be defined as the average current in a switching cycle, which flows out from the neutral point O in Figure 1, it can be expressed as: where dx0 and ix represent the duty cycle of "0" state and the three phase grid current, dx0 can be derived as: where ua_ref, ub_ref, uc_ref are three phase modulation signals.By substituting Equation (2) into Equation (1), io can be derived as: Defining vc as the difference between vc1 and vc2 in Figure 1, vc is expressed as: Meanwhile, the NP voltage vc can be expressed as: where C is the capacitance of C1 and C2.Substituting Equation (3) into Equation ( 5), vc can be derived as: The NP current i o can be defined as the average current in a switching cycle, which flows out from the neutral point O in Figure 1, it can be expressed as: where d x0 and i x represent the duty cycle of "0" state and the three phase grid current, d x0 can be derived as: where u a_ref , u b_ref , u c_ref are three phase modulation signals.By substituting Equation (2) into Equation (1), i o can be derived as: Defining v c as the difference between v c1 and v c2 in Figure 1, v c is expressed as: Energies 2018, 11, 1331 Meanwhile, the NP voltage v c can be expressed as: where C is the capacitance of C 1 and C 2 .Substituting Equation (3) into Equation ( 5), v c can be derived as: Under the non-ideal grid condition, according to the symmetrical components method, three phase unbalance components are composed with symmetrical positive/negative/zero-sequence components.As the zero-sequence component can be neglected in the Three-phase Three-wire inverter system, therefore, the modulation signals can be expressed as: where u ap_ref , u bp_ref , u cp_ref represent the positive-sequence components of three phase modulation signals and u an_ref , u bn_ref , u cn_ref represent the negative-sequence components of three phase modulation signals.
Commonly, to describe the proportion of negative-sequence component to the positive-sequence component for the non-ideal grid, the unbalance factor λ is introduced here [27]: where A p and A n represent the amplitudes of positive and negative sequence components, respectively.Supposing that the voltage of the filter inductor is ignored, the positive-sequence and negative-sequence components of three phase modulation signals can be expressed as: In Equations ( 9) and ( 10), E mp represents the amplitude of the positive-sequence grid voltages; ω is the line angle frequency; and ϕ up and ϕ un represent the phase angle of positive-sequence and negative-sequence modulation signals, respectively, which also represent the phase angle of positive-sequence and negative-sequence grid voltages, respectively.Under non-ideal grid conditions, unbalance grid voltages cause a double line frequency ripple at the output power of the inverter [28].If the control target of the grid side is suppressing the ripple component at active power, the three phase grid currents can be expressed as: (11) where i ap , i bp , i cp represent the positive-sequence components of three phase grid currents and i an , i bn , i cn represent the negative-sequence components of three phase grid currents.
In Equation (11), the positive-sequence and negative-sequence components of three phase grid currents are as follows: In Equations ( 12) and ( 13), I mp represents the amplitude of the positive-sequence grid currents, and ϕ ui is the phase difference between positive-sequence grid voltage and positive-sequence grid current.Substituting Equations ( 7) and ( 11) into Equation ( 6), v c can be derived as: By substituting Equations ( 9), (10), (12), and (13) into Equation ( 14), the waveforms of v c under different grid conditions are shown in Figure 3, where C and I mp are normalized.where iap, ibp, icp represent the positive-sequence components of three phase grid currents and ian, ibn, icn represent the negative-sequence components of three phase grid currents.
In Equation (11), the positive-sequence and negative-sequence components of three phase grid currents are as follows: In Equations ( 12) and ( 13), Imp represents the amplitude of the positive-sequence grid currents, and φui is the phase difference between positive-sequence grid voltage and positive-sequence grid current.
Under ideal grid condition (λ = 0) in Figure 3, it can be seen that vc fluctuates at three times the line frequency.Under non-ideal grid conditions, when λ = 0.1, the fluctuating frequency of vc changes to the line frequency, and the ripple of vc is also larger than that under ideal grid conditions.

Proposed NP Voltage Balance Method under Non-Ideal Grid Conditions
In Section 2, from Equation ( 14), it can be seen that the fluctuation of NP voltage is caused by the NP current io.Therefore, by adding the appropriate zero-sequence component into the modulation signals, io can be controlled, then the NP voltage balance can be achieved.

Analysis of Zero-Sequence Component for Modulation Signals
Defining u0 as the zero-sequence component, which is added to the modulation signals, three phase modulation signals can be expressed as: Under ideal grid condition (λ = 0) in Figure 3, it can be seen that v c fluctuates at three times the line frequency.Under non-ideal grid conditions, when λ = 0.1, the fluctuating frequency of v c changes to the line frequency, and the ripple of v c is also larger than that under ideal grid conditions.

Proposed NP Voltage Balance Method under Non-Ideal Grid Conditions
In Section 2, from Equation ( 14), it can be seen that the fluctuation of NP voltage is caused by the NP current i o .Therefore, by adding the appropriate zero-sequence component into the modulation signals, i o can be controlled, then the NP voltage balance can be achieved.

Analysis of Zero-Sequence Component for Modulation Signals
Defining u 0 as the zero-sequence component, which is added to the modulation signals, three phase modulation signals can be expressed as: By substituting Equations ( 11) and ( 15) into Equation (3), the expression of i o is derived as: Defining ϕ' ua0 , ϕ' ub0 , ϕ' uc0 as the positively sloped zero-crossing points s of u' a_ref , u' b_ref , u' c_ref , respectively.Aiming at eliminating the ripple of NP voltage, i o is controlled to be zero in Equation ( 16), when ϕ' ua0 > 0, u 0 can be expressed as: When ϕ' ua0 < 0, u 0 can be expressed as: The positively sloped zero-crossing points ϕ' ua0 , ϕ' ub0 , ϕ' uc0 can be expressed as: In Equations ( 19)-( 21), the expressions of coefficients A i , B i , C i , (i = a, b, c) are shown in Table 1.
Table 1.Expressions of A i , B i and C i .

Design of the NP Voltage Balance Controller
The control principle diagram of the NPC three-level grid-connected inverter under non-ideal grid conditions is shown in Figure 5, where the DDSRF-PLL represents the decoupling double synchronous reference frame phase-locked loop unit, and the DCR unit dynamically calculates the zero-sequence component for modulation signals by region selections (DCR).

Design of the NP Voltage Balance Controller
The control principle diagram of the NPC three-level grid-connected inverter under non-ideal grid conditions is shown in Figure 5, where the DDSRF-PLL represents the decoupling double synchronous reference frame phase-locked loop unit, and the DCR unit dynamically calculates the zero-sequence component for modulation signals by region selections (DCR).
In Figure 5, according to three phase modulation signals ua_ref, ub_ref, uc_ref, three phase grid voltages ea, eb, ec, grid currents ia, ib, ic and average capacitor voltages vc1 avg , vc2 avg , the DCR-SPWM block generates the modified modulation signals with zero-sequence voltage um for balancing the NP voltage, where vc1 avg , vc2 avg are the average voltage of vc1 and vc2 in a line cycle.Additionally, u'a_ref, u'b_ref, u'c_ref are the modified modulation signals with um, which are compared with carrier waves to generate driving signals for the switches of the inverter.In order to eliminate the ripple of the NP voltage vc, the DCR unit dynamically calculates the zero-sequence component u0 in different regions of the modulation signal, which is divided by the positively sloped zero-crossing points φ'ux0 of u'x_ref (x = a, b, c), where φ'ux0 is calculated according to the grid currents and grid voltages at different grid conditions in a line cycle.The detailed flowchart of the DCR unit is shown in Figure 6.Furthermore, a PI controller is used to restrain the dc unbalanced voltage of vc, and the input signals of the PI controller are vc1 avg , vc2 avg .The design of this controller for the NP voltage balance has been previously presented in many papers, so the detailed design is not given here.In order to make the difference between vc1 avg and vc2 avg zero, this controller outputs the signal u0_dc, which is added to the modulation signals.Therefore, um is the sum of u0_dc and u0, which is the zero-sequence voltage that is added to the modulation signals to balance the NP voltage.In order to eliminate the ripple of the NP voltage v c , the DCR unit dynamically calculates the zero-sequence component u 0 in different regions of the modulation signal, which is divided by the positively sloped zero-crossing points ϕ' ux0 of u' x_ref (x = a, b, c), where ϕ' ux0 is calculated according to the grid currents and grid voltages at different grid conditions in a line cycle.The detailed flowchart of the DCR unit is shown in Figure 6.Furthermore, a PI controller is used to restrain the dc unbalanced voltage of v c , and the input signals of the PI controller are v c1 avg , v c2 avg .The design of this controller for the NP voltage balance has been previously presented in many papers, so the detailed design is not given here.In order to make the difference between v c1 avg and v c2 avg zero, this controller outputs the signal u 0_dc , which is added to the modulation signals.Therefore, u m is the sum of u 0_dc and u 0 , which is the zero-sequence voltage that is added to the modulation signals to balance the NP voltage.

Divide regions by φ' ux0
Calculate u 0(n) by Eq. ( 17)-( 18) by Eq. ( 19)-( 21) Figure 6 shows the main working flowchart of the DCR unit where Ex (x = a, b, c) and Ix represent the root mean square (RMS) value of the grid voltages ex and grid currents ix, respectively, φex and φix represent the phase angle of grid voltages and grid currents, respectively.φ'ux0(k) and u0(n) are the calculated value of φ'ux0 and u0, respectively.Eerro, Ierro, and φerro are allowable errors, Emp and Imp are the amplitudes of positive-sequence grid voltages and positive-sequence grid currents, respectively, φup and φun are the phase angles of the positive-sequence and negative-sequence modulation signals, respectively, φui is the phase difference between the positive-sequence grid voltage and positive-sequence grid current, λ is the unbalance factor, ixp and ixn represent the positive-sequence and negative-sequence components of three phase grid currents, and uxp and uxn represent the positive-sequence and negative-sequence components of the three phase modulation signals.
In the k-th line cycle, the RMS value Ex(k), Ix(k), and phase angle φex(k), φix(k) are calculated, and are compared with Ex(k − 1), Ix(k − 1), φex(k − 1), and φix(k − 1), respectively, which are the calculated values in the (k − 1)th line cycle.If the absolute differences between the values of variables in the kth and (k − 1)th line cycle are greater than the allowable errors, the positively sloped zero-crossing points φ'ux0(k) of u'x_ref (x = a, b, c) need to be calculated by Equations ( 19)- (21), if not, φ'ux0(k) of u'x_ref (x = a, b, c) are equal to φ'ux0(k − 1) of u'x_ref (x = a, b, c), which are calculated in the (k − 1)th line cycle.In the nth switching cycle, uxp(n), uxn(n), ixp(n), and ixn(n) are calculated, and a line cycle is divided into six regions I-VI by φ'ux0, then u0(n) is calculated by Equations ( 17) and (18) in the present region.

Analysis of the NP Voltage Fluctuation
According to Equations ( 6) and ( 16), when the proposed DCR-SPWM method is applied, vc can be expressed as: Figure 6 shows the main working flowchart of the DCR unit where E x (x = a, b, c) and I x represent the root mean square (RMS) value of the grid voltages e x and grid currents i x , respectively, ϕ ex and ϕ ix represent the phase angle of grid voltages and grid currents, respectively.ϕ' ux0(k) and u 0(n) are the calculated value of ϕ' ux0 and u 0 , respectively.E erro , I erro , and ϕ erro are allowable errors, E mp and I mp are the amplitudes of positive-sequence grid voltages and positive-sequence grid currents, respectively, ϕ up and ϕ un are the phase angles of the positive-sequence and negative-sequence modulation signals, respectively, ϕ ui is the phase difference between the positive-sequence grid voltage and positive-sequence grid current, λ is the unbalance factor, i xp and i xn represent the positive-sequence and negative-sequence components of three phase grid currents, and u xp and u xn represent the positive-sequence and negative-sequence components of the three phase modulation signals.
In the k-th line cycle, the RMS value E x(k) , I x(k) , and phase angle ϕ ex(k) , ϕ ix(k) are calculated, and are compared with E x(k − 1) , I x(k − 1) , ϕ ex(k − 1) , and ϕ ix(k − 1) , respectively, which are the calculated values in the (k − 1)th line cycle.If the absolute differences between the values of variables in the kth and (k − 1)th line cycle are greater than the allowable errors, the positively sloped zero-crossing points ϕ' ux0(k) of u' x_ref (x = a, b, c) need to be calculated by Equations ( 19)- (21), if not, ϕ' ux0(k) of u' x_ref (x = a, b, c) are equal to ϕ' ux0(k − 1) of u' x_ref (x = a, b, c), which are calculated in the (k − 1)th line cycle.In the nth switching cycle, u xp(n) , u xn(n) , i xp(n) , and i xn(n) are calculated, and a line cycle is divided into six regions I-VI by ϕ' ux0 , then u 0(n) is calculated by Equations ( 17) and (18) in the present region.

Analysis of the NP Voltage Fluctuation
According to Equations ( 6) and ( 16), when the proposed DCR-SPWM method is applied, v c can be expressed as: Supposing that E mp /(V dc /2) = 0.5, C, and I mp are normalized, according to Equations ( 9)-( 14) and ( 22), the ripple of v c is related to λ and ϕ ui .With the traditional SPWM and proposed DCR-SPWM method, surfaces for the ripple of v c are plotted as shown in Figure 7.
Energies 2018, 11, x FOR PEER REVIEW 10 of 21 Supposing that Emp/(Vdc/2) = 0.5, C, and Imp are normalized, according to Equations ( 9)-( 14) and ( 22), the ripple of vc is related to λ and φui.With the traditional SPWM and proposed DCR-SPWM method, surfaces for the ripple of vc are plotted as shown in Figure 7.In Figure 7a, with the traditional SPWM method, the ripple of vc increases when φui varies from 0 to π/4 (or −π/4 to 0), and λ varies from 0 to 0.2.In Figure 7b, with the proposed DCR-SPWM method, the ripple of vc is almost zero, which is not varied with φui and λ.
From the comparison above, it can be seen that the proposed DCR-SPWM method can suppress the NP voltage ripple under different λ and φui conditions.

Analysis of the Grid Current Harmonics
Suppose that vx_SPWM and vx_DCR are the leg voltages of the inverter with the traditional SPWM and proposed DCR-SPWM method, respectively, considering the influence of NP voltage, vx_SPWM and vx_DCR are expressed as follows: In Equations ( 23) and ( 24), vxh_mod represents the harmonic component caused by the modulation method, which was analyzed in [29].
In the Three-phase Three-wire inverter system, the grid currents of the inverter can be expressed as: where L is inductance of the filter inductor, and the THD value of the grid currents can be calculated In Figure 7a, with the traditional SPWM method, the ripple of v c increases when ϕ ui varies from 0 to π/4 (or −π/4 to 0), and λ varies from 0 to 0.2.In Figure 7b, with the proposed DCR-SPWM method, the ripple of v c is almost zero, which is not varied with ϕ ui and λ.
From the comparison above, it can be seen that the proposed DCR-SPWM method can suppress the NP voltage ripple under different λ and ϕ ui conditions.

Analysis of the Grid Current Harmonics
Suppose that v x_SPWM and v x_DCR are the leg voltages of the inverter with the traditional SPWM and proposed DCR-SPWM method, respectively, considering the influence of NP voltage, v x_SPWM and v x_DCR are expressed as follows: In Equations ( 23) and ( 24), v xh_mod represents the harmonic component caused by the modulation method, which was analyzed in [29].
In the Three-phase Three-wire inverter system, the grid currents of the inverter can be expressed as: where L is inductance of the filter inductor, and the THD value of the grid currents can be calculated as per [29]: where i x1 represents the fundamental component of the grid currents.
According to Equations ( 9)-( 14) and ( 22)-( 26), the THD value of the grid currents is related to λ and ϕ ui .The surfaces for THD of grid current i b with the traditional SPWM and DCR-SPWM method are shown in Figure 8.Compared with the traditional SPWM method, the THD value was lower when the proposed DCR-SPWM method was applied, and was lower than 4% under different λ and ϕ ui conditions.where ix1 represents the fundamental component of the grid currents.
According to Equations ( 9)-( 14) and ( 22)-( 26), the THD value of the grid currents is related to λ and φui.The surfaces for THD of grid current ib with the traditional SPWM and DCR-SPWM method are shown in Figure 8.Compared with the traditional SPWM method, the THD value was lower when the proposed DCR-SPWM method was applied, and was lower than 4% under different λ and φui conditions.From the analysis above, it can be seen that the proposed DCR-SPWM method can improve the quality of grid currents under different λ and φui conditions.

Simulation Analysis
In order to verify the validity of the proposed DCR-SPWM method, a simulation model of the NPC three-level grid-connected inverter was built using Matlab tools, and the specifications of the simulation model are shown in Table 2.   From the analysis above, it can be seen that the proposed DCR-SPWM method can improve the quality of grid currents under different λ and ϕ ui conditions.

Simulation Analysis
In order to verify the validity of the proposed DCR-SPWM method, a simulation model of the NPC three-level grid-connected inverter was built using Matlab tools, and the specifications of the simulation model are shown in Table 2.

DC bus voltage
V dc = 200 V DC bus capacitors Figure 9 shows the simulated waveforms of capacitor voltage v c1 , v c2 , leg voltage v b , grid current i b , and three phase grid voltages e x (x = a, b, c).In Figure 9a,b, the DCR-SPWM method was applied at 0.25 s, where it can be seen that before using the DCR-SPWM method, the capacitor voltage ripple was 20 V at ϕ ui = 0, and 30 V at ϕ ui = −π/4, respectively.After the DCR-SPWM method was applied, the NP voltage ripple was reduced effectively and the grid current quality improved.In Figure 9c, a parallel resistor was connected to the dc bus capacitor C 2 for the NPC three-level grid-connected inverter, resulting in the 40 V dc unbalanced voltage between v c1 and v c2 , which made the positive and negative half line cycle of the output leg voltage asymmetric, so as to the grid current.When the DCR-SPWM method was applied, the NP voltage ripple and dc unbalanced voltage could be controlled effectively, and quality of the grid current was improved.
Energies 2018, 11, x FOR PEER REVIEW 12 of 21 Figure 9 shows the simulated waveforms of capacitor voltage vc1, vc2, leg voltage vb, grid current ib, and three phase grid voltages ex (x = a, b, c).In Figure 9a,b, the DCR-SPWM method was applied at 0.25 s, where it can be seen that before using the DCR-SPWM method, the capacitor voltage ripple was 20 V at φui = 0, and 30 V at φui = −π/4, respectively.After the DCR-SPWM method was applied, the NP voltage ripple was reduced effectively and the grid current quality improved.In Figure 9c, a parallel resistor was connected to the dc bus capacitor C2 for the NPC three-level grid-connected inverter, resulting in the 40 V dc unbalanced voltage between vc1 and vc2, which made the positive and negative half line cycle of the output leg voltage asymmetric, so as to the grid current.When the DCR-SPWM method was applied, the NP voltage ripple and dc unbalanced voltage could be controlled effectively, and quality of the grid current was improved.

Experimental Verification
As shown in Figure 10a, the proposed DCR-SPWM method was tested in the experimental platform of an NPC three-level grid-connected inverter based on DSP-CPLD.The experimental platform is shown in Figure 10b where the oscilloscope and power analyzer are Tektronix MDO3000 (Tektronix, Shanghai, China) and HIOKI PW6001 (HIOKI, Nagano, Japan), respectively.The specifications of the experimental prototype are shown in Table 3.

Experimental Verification
As shown in Figure 10a, the proposed DCR-SPWM method was tested in the experimental platform of an NPC three-level grid-connected inverter based on DSP-CPLD.The experimental platform is shown in Figure 10b where the oscilloscope and power analyzer are Tektronix MDO3000 (Tektronix, Shanghai, China) and HIOKI PW6001 (HIOKI, Nagano, Japan), respectively.The specifications of the experimental prototype are shown in Table 3.   b, c) and um at different λ and φui conditions, where vb is the leg voltage of phase b and um is zero-sequence voltage that added to the modulation signals, which is added to modulation signals.From Figure 11, it can be seen that when using the traditional SPWM method, the ripple of capacitor voltage vc1 was about 20 V at φui = 0, λ = 0.1 in Figure 11a, and was about 32 V at φui = −π/4, λ = 0.1 in Figure 11b, after the proposed DCR-SPWM method was applied, the ripple of NP voltage was suppressed effectively.In Figure 11c,d, the PI-SPWM method proposed in [14] was applied and it can be seen that the proposed method had better performance in terms of the system steady-state error when compared with the PI-SPWM method.11, it can be seen that when using the traditional SPWM method, the ripple of capacitor voltage v c1 was about 20 V at ϕ ui = 0, λ = 0.1 in Figure 11a, and was about 32 V at ϕ ui = −π/4, λ = 0.1 in Figure 11b, after the proposed DCR-SPWM method was applied, the ripple of NP voltage was suppressed effectively.In Figure 11c,d, the PI-SPWM method proposed in [14] was applied and it can be seen that the proposed method had better performance in terms of the system steady-state error when compared with the PI-SPWM method.
In Figure 12, before using the DCR-SPWM method, the ripple of v c1 was about 20 V at λ = 0.15, ϕ ui = 0 in Figure 12a, and was 24 V at λ = 0.2, ϕ ui = 0 in Figure 12b.The NP voltage ripple was very low with the DCR-SPWM method.In Figure 12, before using the DCR-SPWM method, the ripple of vc1 was about 20 V at λ = 0.15, φui = 0 in Figure 12a, and was 24 V at λ = 0.2, φui = 0 in Figure 12b.The NP voltage ripple was very low with the DCR-SPWM method.When a parallel resistor connected to the dc bus capacitor C2 for the NPC three-level grid-connected inverter, experimental waveforms of vc1, vc2, ib, vb, ex, and um under different conditions are shown in Figure 13, defined that vc1 avg and vc2 avg were the average voltage of vc1 and vc2, respectively, and before using the DCR-SPWM method, the NP voltage was unbalanced, the voltage difference between vc1 avg and vc2 avg was about 80 V.In a line cycle, the amplitude of the leg voltage in the positive half cycle was higher than in the negative half cycle, and the quality of the grid current was not beneficial to the grid connections.When a parallel resistor connected to the dc bus capacitor C 2 for the NPC three-level grid-connected inverter, experimental waveforms of v c1 , v c2 , i b , v b , e x , and u m under different conditions are shown in Figure 13, defined that v c1 avg and v c2 avg were the average voltage of v c1 and v c2 , respectively, and before using the DCR-SPWM method, the NP voltage was unbalanced, the voltage difference between v c1 avg and v c2 avg was about 80 V.In a line cycle, the amplitude of the leg voltage in the positive half cycle was higher than in the negative half cycle, and the quality of the grid current was not beneficial to the grid connections. Energies When the DCR-SPWM method was applied, the voltage difference between v c1 and v c2 decreased to almost zero, and the ripple of v c1 and v c2 was very low.From Figure 13a,b,e, it can be seen that under different unbalanced grid and output power conditions, the system reached the steady-state rapidly, and the quality of the grid current was improved.
Figure 14 shows the harmonics analysis of the grid current i b under different λ conditions, when ϕ ui = −π/4, it can be seen that when the DCR-SPWM method was applied, much low order harmonics were decreased, and the THD value decreased so that the quality of the grid current was beneficial to grid connections.When the DCR-SPWM method was applied, the voltage difference between vc1 and vc2 decreased to almost zero, and the ripple of vc1 and vc2 was very low.From Figure 13a,b,e, it can be seen that under different unbalanced grid and output power conditions, the system reached the steady-state rapidly, and the quality of the grid current was improved.
Figure 14 shows the harmonics analysis of the grid current ib under different λ conditions, when φui = −π/4, it can be seen that when the DCR-SPWM method was applied, much low order harmonics were decreased, and the THD value decreased so that the quality of the grid current was beneficial to grid connections.Figures 15 and 16 show the ripple of v c1 and the THD results of i b at different unbalanced grid conditions with different control methods.It can be seen that with the traditional SPWM method, the ripple of v c1 increased much higher and the THD value was higher than 5% when λ varied from 0 to 0.2 at ϕ ui = −π/4, instead, when compared with the PI-SPWM method, the DCR-SPWM method proposed in this paper decreased the ripple of v c1 effectively, and the THD value of grid current was decreased, which was lower than 4%.
According to the experimental and simulation results, under different unbalanced grid and output power conditions, the proposed DCR-SPWM method can suppress the ripple of the NP voltage effectively; when the NP voltage has dc unbalanced voltage, the NP voltage is controlled to be balanced fast, furthermore, this DCR-SPWM method improved the grid current quality and reduced its THD effectively when compared with the PI-SPWM method proposed in [14].Figures 15 and 16 show the ripple of vc1 and the THD results of ib at different unbalanced grid conditions with different control methods.It can be seen that with the traditional SPWM method, the ripple of vc1 increased much higher and the THD value was higher than 5% when λ varied from 0 to 0.2 at φui = −π/4, instead, when compared with the PI-SPWM method, the DCR-SPWM method proposed in this paper decreased the ripple of vc1 effectively, and the THD value of grid current was decreased, which was lower than 4%.According to the experimental and simulation results, under different unbalanced grid and output power conditions, the proposed DCR-SPWM method can suppress the ripple of the NP voltage effectively; when the NP voltage has dc unbalanced voltage, the NP voltage is controlled to be balanced fast, furthermore, this DCR-SPWM method improved the grid current quality and reduced its THD effectively when compared with the PI-SPWM method proposed in [14].

Conclusions
In order to solve the NP voltage unbalancing problem for NPC three-level grid-connected inverter under non-ideal grid conditions, the unbalanced form of NP voltage under non-ideal grid conditions was studied, and the DCR-SPWM method under non-ideal grid conditions was proposed.This proposed DCR-SPWM method dynamically calculates the zero-sequence component for modulation signals by region selections, and the theoretical analysis and experiment results showed that the proposed method had a good ability to control the NP voltage balance, and improved the grid current quality effectively.It can be seen that with the traditional SPWM method, the ripple of vc1 increased much higher and the THD value was higher than 5% when λ varied from 0 to 0.2 at φui = −π/4, instead, when compared with the PI-SPWM method, the DCR-SPWM method proposed in this paper decreased the ripple of vc1 effectively, and the THD value of grid current was decreased, which was lower than 4%.According to the experimental and simulation results, under different unbalanced grid and output power conditions, the proposed DCR-SPWM method can suppress the ripple of the NP voltage effectively; when the NP voltage has dc unbalanced voltage, the NP voltage is controlled to be balanced fast, furthermore, this DCR-SPWM method improved the grid current quality and reduced its THD effectively when compared with the PI-SPWM method proposed in [14].

Figure 1 .
Figure 1.Main circuit of the NPC three-level grid-connected inverter.

Figure 1 .
Figure 1.Main circuit of the NPC three-level grid-connected inverter.

Figure 3 .
Figure 3.The waveforms of vc under different grid conditions.

Figure 3 .
Figure 3.The waveforms of v c under different grid conditions.

Figure 4 .
Figure 4. Three phase modulation signals with u0 in different regions under the non-ideal grid condition.Figure 4. Three phase modulation signals with u 0 in different regions under the non-ideal grid condition.

Figure 4 .
Figure 4. Three phase modulation signals with u0 in different regions under the non-ideal grid condition.Figure 4. Three phase modulation signals with u 0 in different regions under the non-ideal grid condition.

Figure 5 .
Figure 5.Control principle diagram of the NPC three-level grid-connected inverter.

Figure 5 .
Figure 5.Control principle diagram of the NPC three-level grid-connected inverter.

Figure 6 .
Figure 6.The flowchart of the DCR unit.

Figure 6 .
Figure 6.The flowchart of the DCR unit.

Figure 7 .
Figure 7. Surfaces of the ripple of vc as the function with φui and λ: (a) Traditional SPWM; (b) DCR-SPWM.

Figure 7 .
Figure 7. Surfaces of the ripple of v c as the function with ϕ ui and λ: (a) Traditional SPWM; (b) DCR-SPWM.
150 µF Switching frequency f s = 16 kHz Apparent power S = 600 VA The amplitude of grid voltages E ma = 55 V, E mb = 40 V, E mc = 55 V Output phase filter L: 1.5 mH, C: 15 µF

Figure 10 .
Figure 10.The schematic diagram and experimental photograph of the system: (a) Schematic diagram of the system; (b) Experimental photograph of the system.

Figure 10 .
Figure 10.The schematic diagram and experimental photograph of the system: (a) Schematic diagram of the system; (b) Experimental photograph of the system.

Figures 11 and 12
Figures 11 and 12  show the experimental waveforms of v c1 , v c2 , i b , v b e x (x = a, b, c) and u m at different λ and ϕ ui conditions, where v b is the leg voltage of phase b and u m is zero-sequence voltage that added to the modulation signals, which is added to modulation signals.From Figure11, it can be seen that when using the traditional SPWM method, the ripple of capacitor voltage v c1 was about 20 V at ϕ ui = 0, λ = 0.1 in Figure11a, and was about 32 V at ϕ ui = −π/4, λ = 0.1 in Figure11b, after the proposed DCR-SPWM method was applied, the ripple of NP voltage was suppressed effectively.In Figure11c,d, the PI-SPWM method proposed in[14] was applied and it can be seen that the proposed method had better performance in terms of the system steady-state error when compared with the PI-SPWM method.In Figure12, before using the DCR-SPWM method, the ripple of v c1 was about 20 V at λ = 0.15, v c1 :[25V/div] v c2 :[25V/div] v b :[100V/div] Time:[20ms/div] e a e c e b :[25V/div] i b :[20A/div] u m :[2.5V/div]Traditional SPWM DCR-SPWM v c1 :[25V/div] v c2 :[25V/div] v b :[100V/div] Time:[20ms/div] e a e c e b :[25V/div] i b :[20A/div] u m :[2.5V/div]

Author
Contributions: J.G.L. conducted the theory analysis and designed the whole project, W.B.H. conducted the experiments, J.D.W. performed the simulation, Z.F.W. and J.D.W. completed the experimental tests.J.D.W. and J.G.L. edited the manuscript.

Figures 15 and 16
Figures 15 and 16  show the ripple of vc1 and the THD results of ib at different unbalanced grid conditions with different control methods.It can be seen that with the traditional SPWM method, the ripple of vc1 increased much higher and the THD value was higher than 5% when λ varied from 0 to 0.2 at φui = −π/4, instead, when compared with the PI-SPWM method, the DCR-SPWM method proposed in this paper decreased the ripple of vc1 effectively, and the THD value of grid current was decreased, which was lower than 4%.

Table 1 .
Expressions of Ai, Bi and Ci.

Table 2 .
Specifications of the prototype for simulation.

Table 2 .
Specifications of the prototype for simulation.

Table 3 .
Specifications of the experimental prototype.

Table 3 .
Specifications of the experimental prototype.