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Energies 2018, 11(5), 1028; doi:10.3390/en11051028
Conducted EMI Prediction and Mitigation Strategy Based on Transfer Function for a High-Low Voltage DC-DC Converter in Electric Vehicle
National Engineering Laboratory for Electric Vehicles, Beijing Institute of Technology, Beijing 100081, China
Collaborative Innovation Center of Electric Vehicles in Beijing, Beijing Institute of Technology, Beijing 100081, China
R&D Department for New Energy Automobile, Zhengzhou YuTong Bus Co., Ltd., Zhengzhou 450061, China
Author to whom correspondence should be addressed.
Received: 29 March 2018 / Accepted: 18 April 2018 / Published: 24 April 2018
The high dv/dt and di/dt outputs from power devices in a high-low voltage DC-DC converter on electric vehicles (EVs) can always introduce the unwanted conducted electromagnetic interference (EMI) emissions. A conducted EMI prediction and mitigation strategy that is based on transfer function for the high-low voltage DC-DC converter in EVs are proposed. A complete test for the DC-DC converter is conducted to obtain the conducted EMI from DC power cables in the frequency band of 150 kHz-108 MHz. The equivalent circuit with high-frequency parasitic parameters of the DC-DC converter is built`1 based on the measurement results to acquire the characteristics of the conducted EMI of the DC power cables. The common mode (CM) and differential mode (DM) propagation coupling paths are determined, and the corresponding transfer functions of the DM interference and CM interference are established. The simulation results of the conducted EMI can be obtained by software Matlab and Computer Simulation Technology (CST). By analyzing the transfer functions and the simulation results, the dominated interference is the CM interference, which is the main factor of the conducted EMI. A mitigation strategy for the design of the CM interference filter based on the dominated CM interference is proposed. Finally, the mitigation strategy of the conducted EMI is verified by performing the conducted voltage experiment. From the experiment results, the conducted voltage of the DC power cables is decreased, respectively, by 58 dBμV, 55 dBμV, 65 dBμV, 53 dBμV, and 54 dBμV at frequency 200 kHz, 400 kHz, 600 kHz, 1.4 MHz, and 50 MHz. The conduced voltage in the frequency band of 150 kHz–108 MHz can be mitigated by adding the CM interference filters, and the values are lower than the limit level-3 of CISPR25 standard (GB/T 18655-2010).
Keywords:electric vehicle; high-low voltage DC-DC converter; conducted EMI; transfer function; EMI filter design
Electric vehicles, as the new energy products of energy conservation and environmental protection, have gradually become the focus of consumers’ attention . With the development of modern science and technology, more and more electrical and electronics equipment have been used in electric vehicles (EVs). Especially, in the narrow space of EVs, not only the high-voltage system, including the motor drive system, DC-DC converter system, and on-board charger, etc., but also the low-voltage system, such as the battery management system (BMS), the vehicle control units (VCU), and malfunction detecting and recording instrument are applied . Therefore, electromagnetic compatibility (EMC) for EVs becomes more and more important.
The fast switching of these power semiconductor devices like MOSFET, IGBT, used in the high-low voltage DC-DC converter is controlled by pulse width modulation (PWM), resulting in the conducted electromagnetic interference (EMI) of EVs. Besides, the conducted-EMI may generate some radiated EMI to influence or even damage a part of onboard components, such as wireless devices, analog devices, sensors of EVs, etc. Therefore, predicting and suppressing the conducted-EMI is very significant for the high-low voltage DC-DC converter of the EVs.
At present, for radio disturbance characteristics, CISPR25 standard has defined the limits and the methods of measurement for the protection of on-board receivers . The design and verification of the products for EVs should comply CISPR25 standard to ensure the EMC of the whole vehicle. A large number of tests for the low voltage systems on-board have been carried out, till 2012, the high voltage components in frequency band of 150 kHz–108 MHz can be tested by the CISPR25 standard. Unfortunately, many of the experimental results for the high voltage system cannot satisfy the requirements of CISPR25 standard. From the results and analysis of the measurements, the conducted voltage can exceed the limit level of CISPR25 standard due to the operation of the motor drive system and the DC-DC converter . Although some studies about the conducted EMI from the high-voltage systems in EVs, such as the motor drive system have been carried out [5,6,7,8,9], few researches on the conducted-EMI for the high-low voltage DC-DC converter was presented previously to study the characteristics of the conducted-EMI and the models.
In industry application, the analysis and measurement of EMC for DC-DC converters used in switching over have been presented . The design of the EMC filter on PCB boards in switching power is only used to mitigate the conducted EMI from PCB [11,12]. However, the DC-DC converter that is used in industry is different from that in EVs at the environment and operation characteristics, like voltage and frequency, and so on.
In the field of EVs, most of the conducted EMI researches are also carried out for low voltage DC-DC converters integrated on PCB boards of various ECUs. The modeling and the measurement for conduction emission based on MIL-STD-461F method have been presented . The conducted EMI for DC-DC converter of PCB board mainly includes the influence of parasitic parameters, switching technology, and optimization layout based on port network theory [14,15,16,17,18,19]. However, the existence of difference are found between the high-low voltage DC-DC converter of the high voltage system and the low voltage DC-DC converter of PCB, which are both used in electric vehicles, is described as below: First, the input voltage of the high-low voltage DC-DC converter can reach a few hundred volts from 300 V to 600 V, and the output is 12 V to 24 V to power the low-voltage on-board equipment. But, the input or output voltage of the DC-DC converter on the PCB is usually from 12 V to 24 V. Second, when comparing with the DC-DC converters on PCB, the voltage, the current and the power of the power device used in the high-low voltage DC-DC converters are larger. Third, the electrical load of high-low voltage DC-DC converters varies greatly in real time. Finally, the topological structure and the geometry size are also different. Therefore, to predict and suppress the conducted-EMI of the high-low voltage DC-DC converters is pretty significant.
Although there are many researches on the EMI mechanism and the modeling of high-low voltage DC-DC converter, their models for EMC are established based on port network theory and black box theory. In addition, the detailed model with high frequency parasitic parameters is not established [20,21,22]. Then, it is hard to determine the conducted interference paths of the common mode (CM) and differential mode (DM) in detailed due to no model. In addition, most of the design method and the analysis for EMI filtering are based on the source impedance and the load impedance, but these impedances are not constant in practice [23,24,25]. The impedance mismatch may result in the inadequate mitigation and generation of new resonance.
Based on the problems proposed above, first of all, it is necessary to establish an equivalent circuit with high-frequency parasitic parameters of the high-low zero-voltage-switching (ZVS) DC-DC converter for EV to predict the conducted-EMI. Equivalent circuits with high-frequency distributed parameters of the DM interference and the CM interference are built, in order to predict the conducted voltage and to analyze the forming mechanism of the conducted interference, where the impedance of the practical EMI source and the load can be taken into consideration. Then, establishing the transfer functions of the DM interference and the CM interference to predict and determine the dominated interference mode that is responsible for EMI from the high-low DC-DC converter in EVs. Meanwhile, the simulation results’ comparison between CM, DM, and CM+DM interference is performed to find the dominated interference mode for conducted EMI. Lastly, a strategy to determine the dominated interference mode is proposed for designing filter.
This paper is organized as follows: Section 2 presents a full test for high-low voltage DC-DC converter to obtain the conducted interference voltage in range of 150 kHz–108 MHz, and sets up a high frequency circuit model to analyze the paths of CM and DM interference. Section 3 predicts and analyzes the conducted interference through the transfer functions and the simulation results of CM, DM, and their hybrid mode. Next, Section 4 designs the filter and simulates its suppression effect. The experiment for DC-DC converter and the test for conducted voltage are presented in Section 5 to verify the theory correctness of high frequency circuit model and the efficiency of the designed filter. Finally, in Section 6, conclusions and the next work are drawn.
2. EMI Test and Modeling Analysis for Isolated Full-Bridge DC-DC Converter
2.1. The Construction of the Onboard DC-DC Converter System
As the indispensable part of EVs, DC-DC converter is used to convert the high dc voltage of the power battery into the low dc voltage to provide power for the low voltage electrical loads. This high-low voltage DC-DC converter system mainly consists of the following parts: high-voltage power battery of EV, DC-DC converter, low-voltage storage battery, and low-voltage load of EV. The Figure 1 below shows the topology of the isolated full-bridge DC-DC converter.
The control mode of phase-shifting PWM is adopted in this topological structure to convert 480 V dc voltage from the power battery into 12 V dc voltage. When considering the high voltage and high frequency characteristics of the DC-DC converter, four MOSFETs, IPP65R150CFDA, with 650 dc voltage are adopted in the full-bridge topology of DC-DC converter. The rising time and falling time of the MOSFET are 7.6 ns and 5.6 ns, respectively.
2.2. Setup for Conducted-EMI Emission Test
What shown in Figure 2 is a complete test setup in an EMI laboratory to test the conducted-EMI emissions of the high-low voltage DC-DC converter. It is mainly consisted by a DC voltage source, DC power cables, and standard line impedance stabilization networks (LISNs), full-bridge DC-DC converter, low voltage load, and an EMI receiver. What is shown in Table 1 is the conducted EMI emission limits from 150 kHz to 108 MHz for vehicle components, which is described in standard CISPR 25 (GB/T 18655-2010) complied by measurements. Two LISNs terminated with 50 Ω resistances provide DC power from a DC voltage source to the full-bridge DC-DC converter using two shielded cables (1.5 m). The full-bridge DC-DC converter with 480 V DC input is connected to the low voltage load using two shielded cables (1 m). The DC-DC converter operates at a frequency of 100 kHz. A battery with 12 dc voltage is used as the low voltage. With this configuration, the total conducted-EMI noise voltage signals of DC cables can be obtained through any one of the LISNs that is connected to an EMI receiver.
2.3. Experiment Results of the Conducted EMI
The test platform is set up, as shown in Figure 3. Figure 4 shows the experimental results and it can be found that the conducted-EMI noise voltage of the DC-DC converter is dominant in 150 kHz–108 MHz and does not comply with CISPR25(GB/T 18655), as shown in Table 1. In Figure 4, the blue line represents the peak value of the conduction voltage, the green line represents the mean value of the conduction voltage, and the yellow line represents the limit value of standard Level 3. From Figure 4, it can be seen that the frequency bands with excessive conducted voltage are 0.53–1.8 MHz, 5.9–6.2 MHz, 41–88 MHz and 76–108 MHz, and it also includes 200 kHz, 500 kHz–2 MHz, and 30 MHz–108 MHz. Therefore, in order to analyze the source and the paths of the conducted-EMI, the buildup of a high frequency circuit model is necessary, and then the conducted-EMI emissions can be predicted.
2.4. Modeling Analysis of the Onboard DC-DC Converter System
2.4.1. Noise Source
The MOSFETs of the DC-DC converter can switch fast and will cause large dv/dt and di/dt, which can introduce the conducted-EMI emissions. Therefore, the noise source signals of CM interference and DM interference can be obtained from the DC-DC converter legs by measurement. The CM interference voltage source UCM and the DM interference voltage source UDM will be described in detail in the next section.
2.4.2. Main Parasitic Parameter
From Figure 5 and Figure 6, there are some parasitic parameters in the DC-DC converter system. It is necessary to extract and determine the parasitic parameters, so that the DC-DC converter for the conducted-EMI can be modeled. Some measurements for Z parameters and S parameters were made with a vector network analyzer and time-domain reflectometry. In order to obtain the high-frequency circuit model of element and system, a modeling method, which is based on a measurement-based model of the electromagnetic emissions, needs to be used. By comparing Z parameters and S parameters of the simulation and measurement, the values of elements, like inductance or capacitance, can be regulated and determined, as shown in Table 2, where, CQ1–CQ4 represent the resonant capacitance that is in parallel with MOSFETs Q1–Q4 respectively to achieve ZVS, Lr represents the resonant inductance to achieve ZVS, CDC, Lf, and Cout are all filtering elements, R1, R2, L1, L2, C1–C4 represent the components of LISN, RL represent the equivalent resistance of the load, Ls and Rs are the high-frequency parasitic parameters of CDC, Cp1, and Cp2 called the distributed capacitance between the chassis and the midpoints of the leading leg and the lagging leg, Cps1 and Cps2 represent the distributed capacitance of transformer, CL is the distributed capacitance between the load and the chassis. All of these parameters are labeled in Figure 5 and Figure 6.
2.4.3. High Frequency Parasitic Parameters of Common Mode EMI
The common mode noise is generated by the displacement current, flowing from the CM interference voltage source UCM to the DC power cables by the parasitic parameters that were connected with the chassis. Cp1, Cps1, Cps2, and CL are the dominated parasitic parameters, which result in CM interference. The main CM paths are shown in Figure 5a. According to Figure 5a, CM paths of UCM1 and UCM2 have similar structures, so only the equivalent circuits of UCM1 are shown in Figure 5b. The four loops for the CM EMI propagation paths through the components can be listed, as follows:
- Loop 1 for CM1: UCM1→Cp1→UCM1
- Loop 1 for CM2: UCM2→Cp2→UCM2
- Loop 2 for CM1: UCM1→CL→→Lf→Cps1→Lr→UCM1
- Loop 2 for CM2: UCM2→CL→→Lf→Cps2→UCM2
- Loop 3 for CM1: UCM1→→Lp1→UCM1
- Loop 3 for CM2: UCM2→→Lp2→UCM2
- Loop 4 for CM1: UCM1→→CQ3→Lp2→UCM1
- Loop 4 for CM2: UCM2→→Lp1→CQ3→UCM2
The MOSFET in the closed state is equivalent to short circuit, and it can be represented by conductor; the MOSFET in the open state is replaced by the capacitor in parallel. In addition, no matter which MOSFET produces interference noise, it will always cause the rapid change of the voltage and the current at the midpoint of the bridge leg, so it is most appropriate to choose the middle point of the bridge as the interference source.
2.4.4. High Frequency Parasitic Parameters of Differential Mode EMI
Similarly, due to the existence of the main DM parasitic parameters, The DM interference can flow through these parasitic inductances and the DM parasitic parameter of the input capacitor to form the DM interference paths. These main parasitic parameters are Lp, Rs, Lp1, and Lp2. Similarly, it can be known that the structures of the DM interference paths of UDM1 and UDM2 are similar. The main DM paths and the equivalent circuits of UDM1 are shown in Figure 6a,b, respectively. The two loops for the DM EMI propagation paths can be listed, as follows:
- Loop 1 for DM1: UDM1→Lp1→→→Lp2→CQ3→UDM1
- Loop 1 for DM2: UDM2→CQ1→Lp1→→→Lp2→UDM2
- Loop 2 for DM1: UDM1→Lp1→CDC→Ls→Rs→Lp2→CQ3→UDM1
- Loop 2 for DM2: UDM2→CQ2→Lp1→CDC→Ls→Rs→Lp2→UDM2
3. Characteristics Analysis and Simulation Prediction for the Conduction Interference
3.1. The Establishment of Transfer Functions
Each noise source can be equivalent to a linear system with single input and single output. Therefore, the two CM transfer functions can be linearly equivalent to the Equation (3), and it is the same to the two DM EMI sources. According to the equivalent circuit of common mode interference paths, the corresponding transfer function of UCM1 is established, as shown in Equation (1), and the Equation (2) can be obtained by substituting the values that are provided in Table 2.
The Bode diagram, as shown in Figure 7, can be obtained by the transfer function of Equation (2). From Figure 7, it can be seen that large CM conducted interference exists within 150 kHz–30 MHz. The interference is especially obvious in the lower frequency band before 300 kHz, and it begins to drop at 30 MHz. Hence, it can be seen that the CM conducted interference mainly exists in the frequency bands before 30 MHz.
Similarly, the transfer function of the DM1 interference paths can be obtained, as shown in Equation (5), and Equation (6) is its numerical expression. The DM bode diagram that is obtained by the transfer function (7) is shown in Figure 8. From Figure 8, it shows that the DM conducted interference is relatively smaller in low frequency band, and there exists a peak value at frequency from 30 MHz to 40 MHz due to the circuit resonance. Therefore, it can be known from Figure 7 and Figure 8 that CM interference is the dominated interference in the frequency band from 150 kHz to 108 MHz.
3.2. Extraction of the Noise Sources
According to Figure 9, a circuit model with high-frequency parameters of the DC-DC converter system is built in Matlab/Simulink, so that the noise source signals of CM interference and DM interference can be obtained. All of the main parasitic parameters are shown in red background. The two CM sources are the voltage between the midpoint of the bridges of the DC-DC converter and the chassis, as shown in green background. The two DM sources are the voltage between the midpoint of the bridges of the DC-DC converter and the negative or the positive terminal, as shown in yellow background. The CM and the DM noise source signals of the advanced bridge are shown in Figure 10a,b, respectively.
3.3. Simulation for the Conducted Interference
The conducted interference both in the time domain and in the wide-range frequency domain can be obtained by Computer Simulation Technology (CST). The conducted interference voltage that is shown in Figure 11 can be obtained by establishing the high-frequency circuit model of the DC-DC converter in CST. The acquisition of the signals of the DM and CM interference sources UCM1 (UCM2) and UDM1 (UDM2) can achieved in Matlab/Simulink, as shown in Figure 10. As the important indicator for conducted-EMI, the conducted interference voltage can be obtained by modeling the LISNs consisting of R1, R2, L1, L2, C1–C4 and adding probe “P1” and “P2”, port 1 and port 2 in red circles are CM ports, port 3 and port 4 in blue circles are DM ports, which are all shown in Figure 11.
The positive conducted voltage of the single mode and CM+DM, which can be measured by the LISN, is compared in Figure 12. The conducted voltage of the CM+DM mode is represented by the black curve, the CM conducted voltage is represented by the red curve and the DM conducted voltage is represented by the blue curve. It can be seen that some resonances appear at the same frequency 200 kHz, 400 kHz, 600 kHz, 800 kHz etc. which have the same frequency interval. In addition, there are two resonance points at 7.8 MHz and 30 MHz in the CM mode and the hybrid mode. In terms of the conducted voltage in Figure 12, the CM+DM waveform, in fact, can be better represented by the CM waveform of the conducted voltage, and the CM conducted EMI is the dominated interference in a frequency range of 150 kHz–108 MHz.
There is good consistency between the simulation result of the conducted voltage and the change of the Bode diagram by transfer function. Therefore, from Figure 7 and Figure 12, it can be concluded that the CM interference is mainly responsible for the conducted-EMI from the DC high voltage power cables of the DC-DC converter.
4. Design of High Frequency EMI Filter
From the discussion above, the conducted EMI of the high-low voltage DC-DC converter mainly comes from the CM interference. Therefore, the design for the CM filter is given priority to take into account in order to mitigate the conducted-EMI from the high-low voltage DC-DC converter in EVs.
4.1. Parameters Calculation of CM EMI Filter
The insertion loss method is adopted to calculate the values of the main passive components in the EMI filter. Firstly, the attenuations of the CM interference should be determined. The required attenuation amounts ACM of the CM interference can be obtained through Equation (8):
The AnCM is the amplitude of the nth harmonic (in the case of the fundamental frequency of 100 kHz); AL is the limit of CISPR25/GB/T18655 level 3 in the frequency band from 150 kHz to 108 MHz; AL is 50 dBμV in the frequency range of 0.53–1.8 MHz; and, m is 6 dBμV, the safety margin of filter suppression.
The influence of CM interference is dominant in the high frequency band, therefore, according to the test result and its limit line of Level 3 in Figure 4 and following the principle that, it can be known that the superscalar of CM interference reaches the maximum value of 43 dBμV at 1.4 MHz, and the AnCM is 93 dBμV. Thus, the target attenuation frequency of the CM interference is 1.4 MHz. When considering the safety margin of 6 dBμV, the target attenuation of the CM is 49 dBμV. Areq_att [dBμV] is the target attenuation of CM.
Then, the corner frequency (cutoff frequency) f0 of the CM filter needs to be obtained by calculating. In order to restrain the interference effectively, the corner frequency of the filter must be low enough, so that they can meet the suppression demand in the whole frequency band required. In generally, the corner frequency is calculated by using the frequency (i.e., 1.4 MHz) of the first highest interference amplitude point of CM interference (see in Equation (9)).where fh_att is the frequency for attenuation; Areq_att is the attenuation; filter_att is the slope of the attenuation slash, 40 dB/dec. The attenuation frequency of CM that was obtained by Equation (9) is 37.25 kHz.
The CM inductance LC and the CM capacitance CY of the CM filter can be calculated by the Equation (10):
It is usually assumed that CY takes the normal value, 3300 pF, so the value of LC can be calculated as 2.766 mH.
4.2. Topology Selection of CM Filter
In order to determine the best CM filter topology, the volume and weight of the filter are both considered, four different topologies are designed and inserted into the high-frequency model in CST, respectively. And these four kinds of topologies include the topology of capacitance + inductance (CL), the topology of inductance + capacitance (LC), the topology of capacitance + inductance + capacitance (CLC) and the topology of inductance + capacitance + inductance (LCL). The comparison in attenuation between the four kinds of filters is shown Figure 13, the attenuation values at some important frequency points are listed, and the corresponding curves of CLC, LCL, CL, and LC are presented in pink, sky blue, blue, and brown, respectively. From Figure 13, it can be seen that the topologies of LCL and CLC have the better suppression effect than that of CL and LC in the low-frequency band (less than 500 kHz), and the CLC topology has an obviously better suppression effect than other topologies at the frequency from 150 kHz to 180 MHz. Besides, CLC has a smaller volume than LCL. By considering both the suppression effect in the whole frequency band and the size of the filter, the optimal topology of the CM filter for the high-low voltage DC-DC converter is CLC, as shown in Figure 14. Rd (25 kΩ) and Rc (10 Ω)are the equivalent impedance of the filter, LP (0.2 μH) and Rs (0.1 Ω) are the high frequency parasitic parameters of CY, respectively.
In order to verify the suppression effect of the CM filter with CLC topology in Figure 14, a simulation model with the CLC topology for the high-low voltage DC-DC converter is established in CST, as shown in Figure 15. The conducted voltage of simulation results with and without the CM filter with CLC topology are shown in Figure 16.
From Figure 16, it can be known that the conducted voltage of simulation has a sharp reduction in the whole frequency band of 150 kHz–108 MHz. Most important of all, the conducted voltage is decreased by 55 dBμV at the target frequency 1.4 MHz and it meets the designed attenuation 49 dBμV very well. The detail values of the conducted voltage with and without the CM filter are listed in Table 3.
4.3. Mitigation Effect and Stability Analysis of the High Frequency EMI Filter
The high frequency parameters of the filters have an important effect on its stability. The equivalent circuit with the CLC filter is shown in Figure 17. The corresponding transfer function is expressed by the numerical equation, as shown in Equation (12).
According to Equation (12), the corresponding Bode diagram can be obtained, as shown in Figure 18. It can be seen that the magnitude is decreased by the expectation attenuation. There is no new resonance appearance at the whole frequency band 150 kHz–108 MHz. From Figure 18, the DC-DC converter with the CM filter has better stable characteristics and can achieve a good mitigation effect for the conducted EMI.
5. Experimental Verification
Comparison and Analysis for the EMI Experimental Result and EMI Simulation Result
A conducted voltage experiments is built by CISPR 25(GB/T18655), as shown in Figure 3, to validate the suppressive effect of the CM filter with CLC topology. The CM filter with CLC topology is added at DC input terminals inside the high-low voltage DC-DC converter, as shown in Figure 19. After inserting the CLC filter, the measurement result of the conducted voltage on the primary DC power cable can be seen in Figure 20.
From Figure 20, the conducted voltage is lower than the limit of CISPR 25(GB/T18655) in the whole frequency band and it meets the standard requirements. The attenuation comparison of the experiment results and simulation results is listed in Table 4. It can be seen that the attenuation results of simulation and experiment are basically identical (roughly the same amount of interference suppression). In those important resonant points and frequency band, the attenuation errors between the experiment results and simulation results are very small, which validate the availability of the proposed high-frequency model and the designed EMI filter. Besides, it notes that the attenuation at 1.4 MHz is 53 dBμV, which matches the simulation result 55 dBμV and meets the target attenuation 49 dBμV very well. In addition, the harmonics results of simulation that start from 200 kHz with the interval of 200 kHz match the harmonics results of the experiment very well. In addition, the harmonic amplitude of the experiment is significantly greater than that of the simulation due to real operating condition.
A conducted EMI prediction and mitigation strategy that is based on transfer function for the high-low voltage DC-DC converter in EVs are proposed. The equivalent circuits of the CM and DM interference for the DC-DC converter are built based on the measurement results of high-frequency parasitic parameters. The characteristics of the conducted EMI from the DC power cables are obtained. The dominated conducted EMI is predicted by establishing the corresponding transfer functions of the DM interference and CM interference. By analyzing the transfer functions and the simulation results, the CM interference is known as the dominated interference that is responsible for the conducted EMI. By the simulation and the experiment, a strategy of giving priority to the dominated interference mode is proposed for designing the optimal CM interference filter with CLC topology. From the experiment results, the conducted voltage of the DC power cables is decreased, respectively, by 58 dBμV, 55 dBμV, 65 dBμV, 53 dBμV, and 54 dBμV at frequency 200 kHz, 400 kHz, 600 kHz, 1.4 MHz, and 50 MHz. The conduced voltage in frequency range from 150 kHz to 108 MHz can be mitigated to below the limit level-3 of CISPR25 standard (GB/T 18655-2010) by adding the CM interference filters. The DC-DC converter with the CM filter has better stable characteristics and can achieve a good mitigation conducted EMI effect. In the future, the equivalent circuit model for the high-low voltage DC-DC converter should be improved in the frequency 30 MHz–108 MHz to predict the radiated EMI from the DC power cables of the DC-DC converter.
Li Zhai and Tao Zhang designed the methodology and wrote the manuscript. Yu Cao and Sipeng Yang conceived and design the experiments. Steven Kavuma and Huiyuan Feng implemented the experiments. All authors contributed improving the quality of the manuscript.
This paper was supported by the National Natural Science Foundation of China for financially supporting this project (51475045).
Conflicts of Interest
The authors declare no conflict of interest.
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Figure 1. Topology diagram of zero-voltage-switching (ZVS) isolated full-bridge DC-DC converter.
Figure 2. Test layout for the conducted electromagnetic interference (EMI) of ZVS isolated full-bridge DC-DC converter.
Figure 3. The conducted emission test platform for DC-DC converter.
Figure 4. The experimental result of the conducted interference of DC-DC converter.
Figure 5. (a) The main common-mode paths and (b) its equivalent circuit.
Figure 6. (a) The main differential-mode paths and (b) its equivalent circuit
Figure 7. Bode diagram of the CM transfer function.
Figure 8. Bode diagram corresponding to the DM transfer function.
Figure 9. Equivalent circuit for EMI emission in Matlab/Simulink.
Figure 10. (a) Waveform of CM interference source and (b) Waveform of DM interference source.
Figure 11. Simulation model of conducted interference for DC-DC converter.
Figure 12. The conduction interference voltage measured on line impedance stabilization networks (LISN).
Figure 13. The comparison in attenuation between the four kinds of filters.
Figure 14. The final EMI filter with high frequency parameters.
Figure 15. The simulation model of the DC-DC converter with the final EMI filter.
Figure 16. The interference contrast with and without the final filter.
Figure 17. The equivalent circuit with the CM filter.
Figure 18. Bode diagram with the CM filter.
Figure 19. The components of filters in the DC-DC converter (a) capacitance (b) inductance and capacitance.
Figure 20. The experiment result with the CM filter.
Table 1. CISPR25 class3-average limits for conducted voltage.
|TV Band I||41–88||36|
Table 2. The common mode (CM) and differential mode (DM) parameters’ value of the equivalent circuit elements.
|Circuit Element||Value||Circuit Element||Value||Parameter||Value|
|CQ2||1000 pF||R2||50 Ω||Cp1||26 pF|
|CQ3||1000 pF||L1||50 μH||Cps1||60 pF|
|Lr||30 μH||L2||50 μH||CL||80 pF|
|Lf||50 μH||C1||5 μF||Ls||0.2 μH|
|RL||0.48 Ω||C2||5 μF||Rs||0.1 Ω|
|Cout||2000 μF||C3||470 nF||Lp1||10 nH|
|R1||50 Ω||C4||470 nF||Lp2||10 nH|
Table 3. The simulation results of conducted voltage.
|Frequency||Simulation Results (dBμV)|
|without Filter||with Filter||Attenuation|
Table 4. The attenuation comparison of the experiment results and simulation results.
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