# Experimental Evaluation of the Performance of a Three-Phase Five-Level Cascaded H-Bridge Inverter by Means FPGA-Based Control Board for Grid Connected Applications

## Abstract

**:**

## 1. Introduction

_{dc}/(n

_{L}− 1), where n

_{L}is the number of level. By supposing that for each blocking diode its voltage value is identical to the voltage rating of active device, the number of diodes requested for each phase will be (n

_{L}− 1)·(n

_{L}− 2). This converter presents some operative limits as: (1) max number of levels is five, due both to the complexity of the circuit and both to the large number of components demanded; (2) uneven distribution of semiconductor power losses among the switches, which reduces the switching frequency and the output power; (3) unbalanced capacitor voltages which generate low frequency harmonics; (4) the system cannot involve a modular structure (non-modular topology structure).

_{L}-level converter, it is necessary (n

_{L}− 1)·(n

_{L}− 2)/2 clamping capacitors per phase in addition to the (n

_{L}− 1)·main dc bus capacitors. Thus, the high number of capacitors limit the use to three or five levels. Moreover, lack of modularity and high quantity of capacitors for higher number of voltage levels reduces the reliability of this converter.

_{L}depend of the number of modules connected in series for phase through the equation:

_{HB}is the number of cells connected in series for phase.

#### 1.1. Overview of Pulse Width Modulation (PWM) Modulation Techniques

- Phase Disposition (PD) (Figure 2a), where all carriers are in phase;
- Phase Opposition Disposition (POD) (Figure 2b), where the carriers above the reference zero point have a difference of phase respect those below the zero point of π;
- Alternative Phase Opposition Disposition (APOD) (Figure 2c), where each carrier is phase shifted by π from its adjacent carriers.

_{c}of the level shifted multicarrier PWM in function of the number of the converter level n

_{L}, is equal to:

_{HB}while the phase shifted optimum (PSO) to obtain harmonic cancellation, is achieved:

^{th}H-Bridge series connected per phase. For a five-level inverter two carrier signals with mutual phase shift equal to π/2, Figure 2b, are necessary. This scheme leads to elimination of all carriers and associated sideband harmonics up to the 2n

_{HB}times of the switching frequency.

- Sinusoidal reference;
- Third harmonic injection (THI);
- Switching frequency optimal (SFO).

_{DC}). Modulation index can be increased by including a common mode third-harmonic term into the reference signal of each phase leg, as shown in Figure 3a (green curve).

_{DC}.

_{offset}, compose SFO reference signal. The mathematical expression of the SFO signal for the three-phase system is:

_{a}(t), v

_{b}(t) and v

_{c}(t) are the sinusoidal reference that can be expressed in function of the modulation index M as (5):

_{offset}can be expressed as (6):

#### 1.2. Digital Control Boards for Power Converters

- Acquisition system, which provides signal conditioning and digital acquisition of electrical measures (usually current, voltage, frequency) and other quantities (usually solar irradiation, temperature, etc.);
- Digital controller, required for algorithms employment (filtering, identification, control, modulation of output signals and others);
- Human–machine interface (HMI), suitable for setup phase as well as for monitoring functions;
- Signal generator, allowing conversion of the digital signals to analog signals for the power components.

#### 1.3. Literature Survey

#### 1.4. Contributions and the Organization of Paper

## 2. Cascaded H-Bridge Inverter for Grid Connected Applications: Modelling and Control

#### 2.1. Mathematical Model of the System

_{a}(t), v

_{b}(t) and v

_{c}(t), referred on the n’ point, is obtained by summing output voltage of the series connected H-Bridges (7):

_{ji,k}(j = a…c; i,k = 1 or 2) are the switching state in which “1” represents that the switch is ON and “0” represents that the switch is OFF.

_{DC}for each H-Bridges and by defining the switching functions ${S}_{ji}\in \left\{-1,0,1\right\}$ as:

_{TR}and L

_{TR}(r

_{TR}= 25 mΩ and L

_{TR}= 108.23 μH) represent the short-circuit impedance reported on the low side of the transformer.

_{{a,b,c}}of the converter (15), grid currents i

_{g}

_{{a,b,c}}(16) and the capacitor voltages v

^{*}

_{{a,b,c}}(17), where r and r

_{g}are the resistance of the inductance L and L

_{g}of LCL filter.

_{f}and n’ and ${v}_{n{n}_{f}}$ is the voltage between the point n and n

_{f}that can be expressed by the Equation (18).

_{nnf}is equal to zero. In order to design the control system, it is necessary to develop an average model of the system. Generally, the average model takes into account the average values in a switching period T

_{sw}. In this way, the average phase voltages and average currents can be expressed as (19) and (20):

_{ji}(j = a…c; i = 1 or 2) is the modulation index of each H-Bridge module. Equations (21) and (22) represent the average model of the converter in a switching period.

#### 2.2. LCL Filter Design

_{DC}< 0.5% for IEEE 1574 and I

_{DC}< 1% for IEC 61727) and current harmonics. The standard harmonic current limits, defined by IEEE 1574 and IEC 61727 at the point of common coupling (PCC), are summarized in Table 1. Therefore, the level fixed of the total harmonic distortion (THD%) is <5%.

^{*}

_{g}can be determined as a function of L, using the index r (L

^{*}

_{g}= r·L). While, Capacitor value C

_{f}can be determined as a percentage x% of the delivered reactive power under rated conditions.

_{rms}, frequency 50 Hz and rated power of 600 W (parameters of the test bench in Laboratory of Electrical Applications-LEAP of the University of Palermo).

_{g}has been taken into account the inductance of the transformer, thus, can be expressed as L*

_{g}= L

_{g}+ L

_{TR}. Table 3 reports the current ripple attenuation depending of the r and x values.

_{g}present the lower values. Higher value of the converter side inductance were obtained with THIPOD modulation technique. This phenomenon is attributable at the higher number of the side band harmonics generated by POD carrier signals. In fact, also SPOD and SFOPOD present higher values of the converter side inductance compared others modulation techniques. Regarding the capacitor filter values C

_{f}, it is interesting to note that have been obtained similar values among the modulation techniques taken into account.

#### 2.3. Controller Design

_{f}.

_{T}is the sum of the internal resistance of the inductors (r

_{T}= r + r

_{g}+ r

_{TR}) and the L

_{T}is the sum of the inductance of the LCL filter and the short-circuit inductance reported on the low side of the transformer (L

_{T}= L + L

_{g}+ L

_{TR}).

_{I}equal to the plant time constant T

_{I}= L

_{T}/r

_{T}, with the aim to delete the slower plant pole and supposing a perfect pole-zero cancellation, the current closed-loop transfer function W(s) become of the second order Equation (24).

_{p}is the proportional gain, T

_{I}is the integral time constant and T is the sampling period.

_{p}depends on the inductance of the LCL filter. In this way, it is possible to evaluate the PI regulators parameters for each modulation techniques choosing a damping coefficient equal to 0.707. In Table 6 are reported the PI regulator parameters for each modulation techniques taken into account.

#### 2.4. Performances Evaluation

^{®}(version 4.1.1, The MathWorks, Inc., Natick, MA, USA) environment with the same parameters used for each modulation techniques taken into account and reported in Table 7.

#### 2.4.1. Phase Disposition

_{ga}obtained with SPD, THIPD, and SFOPD, respectively.

_{ab}(blue bars), converter side current I

_{a}(red bars) and grid side current I

_{ga}(yellow bars) obtained with SPD, THIPD, and SFOPD, respectively. The lower values of the grid side current harmonics, less of 0.3% referred to the fundamental amplitude, demonstrate the LCL filter effectiveness. It should be noted that in the spectra of the line voltage and currents appear only side band harmonics thanks to the three-wired connection.

_{SW}is the switching frequency, n is the bandwidth centered around the switching frequency, h is the harmonic order and V

_{1}is the fundamental amplitude.

_{ab}, converter side current I

_{a}and grid side current I

_{ga}.

#### 2.4.2. Phase Opposition Disposition and Alternative Phase Opposition Disposition

_{ga}obtained with SPOD, THIPOD, SFOPOD, SAPOD, THIAPOD, and SFOAPOD, respectively.

_{ab}(blue bars), converter side current I

_{a}(red bars) and grid side current I

_{ga}(yellow bars) obtained with SPOD, THIPOD, SFOPOD, SAPOD, THIAPOD, and SFOAPOD, respectively.

_{ab}, converter side current I

_{a}and grid side current I

_{ga}.

#### 2.4.3. Phase Shifted Disposition

_{ga}obtained with SPS, THIPS, and SFOPS, respectively.

_{ab}(blue bars), converter side current I

_{a}(red bars) and grid side current I

_{ga}(yellow bars) obtained with SPS, THIPS, and SFOPs, respectively.

## 3. Experimental Validation

#### 3.1. Test Bench

- -
- a prototype of FPGA-based control board (produced by DigiPower s.r.l);
- -
- Six prototypes of H-bridges (produced by DigiPower s.r.l);
- -
- A Three-phase LCL filter especially designed (produced by SDESLAB and LEAP of the University of Palermo);
- -
- Six DC sources with 24 V of rated voltage;
- -
- Three-phase variac to grid interface;
- -
- A Teledyne LeCroy WaveRunner 6Zi, scope, employed for the real-time acquisition of the waveforms and monitoring of the system.

#### 3.2. Control Algorithm Design

_{a}, v

_{b}and v

_{c}) and three current (i

_{a}, i

_{b}and i

_{c}) are acquired; the conversion process is subdivided in two sub-conversion process relatively for the voltages and currents with a conversion time equal to 6 μs, respectively. In this way, the operation are executed in parallel, so when finished the first sub-conversion process relatively to the voltages, the mathematic elaborations for PLL with voltages samples start jointly with the second sub-conversion process relatively to the currents. After the conversion process, the mathematic elaboration with a resolution of 32 bit Floating Point (FP) single precision and a clock reference equal to 100 MHz starts. In Table 12 are summarized the execution time of the main mathematic operation.

_{i}is the time-integral and u

_{i}(k − 1) is the k − 1 integral output. In order to optimize the execution time to evaluate the sinθ and cosθ, where θ is the instantaneous phase of the space vector voltage, a look-up table was used. Each value of the instantaneous phase was used as an address (from 0 to 6280) to determinate the values of the sinθ and cosθ. In the look-up table there are only a quarter of the sine waveform with a number of the sample equal to 1570 and it is possible to determinate the sinθ and cosθ values through a logic circuit. The block “Overflow Control” is necessary to limit the instantaneous phase value to 2π. In this way, the instantaneous phase of the space vector voltage θ assumes the sawtooth trend. In Table 13 are summarized the execution time of the main block of the PLL algorithm.

#### 3.3. Model Validation

_{rms}is the root mean square (rms) value of the phase voltage and V

_{rms,}

_{1}defines the rms value of the fundamental harmonic.

#### 3.4. Grid Connected Application

#### 3.4.1. Phase Disposition

_{a}(blue bars) and grid side current I

_{ga}(yellow bars) is shown in Figure 49b. The lower values of the harmonics of the grid side current demonstrate the effectiveness of the LCL filter.

_{n}/2.

#### 3.4.2. Phase Shifted

_{a}(blue bars) and grid side current I

_{ga}(yellow bars). The lower values of the harmonics of the grid side current demonstrate the effectiveness of the LCL filter.

## 4. Discussion

_{g}present the lower values (Table 4). Higher value of the converter side inductance were obtained with THIPOD modulation technique, phenomenon attributable to the higher number of the side band harmonics generated by POD carrier signals. Figure 14 (PD), 23 (POD and APOD) and 29 (PS) show the performances of the filtering by considering the different modulation techniques. For each techniques, the third harmonic of injected current is much reduced, so the comparison moves on the fifth harmonic: PD is around 1%, POD and APOD less than 0.5%, PS around 2%. Excellent performance of THIPOD for its very low values of fifth and also seventh harmonic, are remarkable, but the side inductance L is eight times the value for PD ones. By analyzing Figure 29, low order harmonics contents are present, in particular besides the fifth, seventh is predominant. Modulation techniques PS based have the higher values of the lower order harmonics compared with all modulation techniques previously described.

## 5. Conclusions

## Funding

## Acknowledgments

## Conflicts of Interest

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**Figure 2.**Multicarrier strategies for five-level converter: (

**a**) Phase Disposition (PD); (

**b**) Phase Opposition Disposition (POD); (

**c**) Alternative Phase Opposition Disposition (APOD); (

**d**) Phase Shifted (PS). For the first three modulation techniques, four carriers are required, for example in PD technique blue and red lines enable the voltage control of higher bridge, green and cyan the lower bridge. In PS each only two carriers are required since each phase leg has a modular control.

**Figure 3.**Reference signal for a phase of the converter: (

**a**) third harmonic injection (THI); (

**b**) switching frequency optimal (SFO). Blue waveform represents the fundamental, orange is the adjustment signal and blue is the modified reference.

**Figure 4.**Proposed modulation techniques with sinusoidal reference: (

**a**) Phase Disposition (PD); (

**b**) Phase Opposition Disposition (POD); (

**c**) Alternative Phase Opposition Disposition (APOD); and (

**d**) Phase Shifted (PS). Blue, red and orange sinusoidal signals represent the reference signals; interferences with the triangular signals generate the modulation angles for the four switches.

**Figure 5.**Proposed modulation techniques with THI reference: (

**a**) Phase Disposition PD; (

**b**) Phase Opposition Disposition POD; (

**c**) Alternative Phase Opposition Disposition APOD; and (

**d**) Phase Shifted PS. Blue, red and orange THI signals represent the reference signals; interferences with the triangular signals generate the modulation angles for the four switches.

**Figure 6.**Proposed modulation techniques with SFO reference: (

**a**) Phase Disposition (PD); (

**b**) Phase Opposition Disposition (POD); (

**c**) Alternative Phase Opposition Disposition (APOD); and (

**d**) Phase Shifted (PS). Blue, red and orange SFO signals represent the reference signals; interferences with the triangular signals generate the modulation angles for the four switches.

**Figure 10.**Phase voltage harmonic spectra centered around the switching frequency (10kHz) in percent respect to the fundamental amplitude of (

**a**) SPD, (

**b**) THIPD and (

**c**) SFOPD.

**Figure 11.**Converter side and grid side three-phase current with SPD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 12.**Converter side and grid side three-phase current with THIPD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 13.**Converter side and grid side three-phase current with SFOPD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 14.**Low order harmonics on the grid side current I

_{ga}for (

**a**) SPD, (

**b**) THIPD, and (

**c**) SFOPD.

**Figure 15.**Comparison of line voltage harmonic spectra V

_{ab}, converter side current I

_{a}and grid side current I

_{ga}centered around the switching frequency (10 kHz) in percent respect to the fundamental amplitude for (

**a**) SPD, (

**b**) THIPD, and (

**c**) SFOPD.

**Figure 16.**Phase voltage harmonic spectra centered around the switching frequency (10kHz) in percent respect to the fundamental amplitude of (

**a**) SPOD, (

**b**) THIPOD, (

**c**) SFOPOD, (

**d**) SAPOD, (

**e**) THIAPOD, and (

**f**) SFOAPOD.

**Figure 17.**Converter side and grid side three-phase current with SPOD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 18.**Converter side and grid side three-phase current with THIPOD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 19.**Converter side and grid side three-phase current with SFOPOD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 20.**Converter side and grid side three-phase current with SAPOD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 21.**Converter side and grid side three-phase current with THIAPOD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 22.**Converter side and grid side three-phase current with SFOAPOD. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 23.**Low order harmonics on the grid side current Iga for (

**a**) SPOD, (

**b**) THIPOD, (

**c**) SFOPD, (

**d**) SAPOD, (

**e**) THIAPOD, and (

**f**) SFOAPOD.

**Figure 24.**Comparison of line voltage harmonic spectra V

_{ab}, converter side current I

_{a}and grid side current I

_{ga}centered around the switching frequency (10 kHz) in percent respect to the fundamental amplitude for (

**a**) SPOD, (

**b**) THIPOD, (

**c**) SFOPOD, (

**d**) SAPOD, (

**e**) THIAPOD, and (

**f**) SFOAPOD.

**Figure 25.**Phase voltage harmonic spectra centered around four times of the switching frequency (10 kHz) in percent respect to the fundamental amplitude of (

**a**) SPS, (

**b**) THIPS, and (

**c**) SFOPS.

**Figure 26.**Converter side and grid side three-phase current with SPS. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 27.**Converter side and grid side three-phase current with THIPS. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 28.**Converter side and grid side three-phase current with SFOPS. (

**a**) Transient behavior in multiple cycles; (

**b**) Ripple magnification for converter side current; (

**c**) Ripple magnification for grid side current.

**Figure 29.**Low order harmonics on the grid side current I

_{ga}for (

**a**) SPS, (

**b**) THIPS, and (

**c**) SFOPS.

**Figure 30.**Comparison of line voltage harmonic spectra V

_{ab}, converter side current I

_{a}and grid side current I

_{ga}centered around the switching frequency (10 kHz) in percent respect to the fundamental amplitude for (

**a**) SPS, (

**b**) THIPS, and (

**c**) SFOPS.

**Figure 32.**A photograph of the prototype (

**a**) H-Brides and (

**b**) field programmable gate array (FPGA) control board.

**Figure 38.**Screenshot of the schematic block diagram of the pulse width modulation (PWM) modulator implemented in Quartus II environment for SPD modulation technique.

**Figure 42.**Comparison between the simulated (blue) and the experimental (yellow) THD% values: (

**a**) SPD line voltage, (

**b**) SPD phase voltage, (

**c**) SPOD line voltage, (

**d**) SPOD phase voltage, (

**e**) SAPOD line voltage, (

**f**) SAPOD phase voltage, (

**g**) SPS line voltage, and (

**h**) SPS phase voltage.

**Figure 43.**Comparison between the simulated (blue) and the experimental (yellow) THD% values: (

**a**) THIPD line voltage, (

**b**) THIPD phase voltage, (

**c**) THIPOD line voltage, (

**d**) THIPOD phase voltage, (

**e**) THIAPOD line voltage, (

**f**) THIAPOD phase voltage, (

**g**) THIPS line voltage, and (

**h**) THIPS phase voltage.

**Figure 44.**Comparison between the simulated (blue) and the experimental (yellow) THD% values: (

**a**) SFOPD line voltage, (

**b**) SFOPD phase voltage, (

**c**) SFOPOD line voltage, (

**d**) SFOPOD phase voltage, (

**e**) SFOAPOD line voltage, (

**f**) SFOAPOD phase voltage, (

**g**) SFOPS line voltage, and (

**h**) SFOPS phase voltage.

**Figure 45.**Comparison between the experimental THD% results: (

**a**) Sinusoidal line voltage, (

**b**) Sinusoidal phase voltage, (

**c**) THI line voltage, (

**d**) THI phase voltage, (

**e**) SFO line voltage, and (

**f**) SFO phase voltage.

**Figure 46.**Measured grid voltages (20 V/div) and grid currents (5 A/div) of the phase a and b obtained with SPD at the rated power.

**Figure 47.**Measured converter side currents (2 A/div) obtained with SPD at the rated power. (

**a**) Ripple in different cycles; (

**b**) Magnification of ripple.

**Figure 48.**Measured grid side currents (2 A/div) obtained with SPD at the rated power. (

**a**) Ripple in different cycles; (

**b**) Magnification of ripple.

**Figure 49.**Calculated (

**a**) low order harmonics of the grid side current and (

**b**) switching frequency harmonics spectra of the converter side and grid side currents.

**Figure 52.**Measured grid voltages (20 V/div) and grid currents (5 A/div) of the phase a and b obtained with SPS at the rated power.

**Figure 53.**Measured converter side currents (2 A/div) obtained with SPS at the rated power. (

**a**) Ripple in different cycles; (

**b**) Magnification of ripple.

**Figure 54.**Measured grid side currents (2 A/div) obtained with SPS at the rated power. (

**a**) Ripple in different cycles; (

**b**) Magnification of ripple.

**Figure 55.**Calculated (

**a**) low order harmonics of the grid side current and (

**b**) switching frequency harmonics spectra of the converter side and grid side currents.

Harmonic Order, h | Limit in % of Rated Current |
---|---|

h < 11 | 4.0 |

11 ≤ h < 17 | 2.0 |

17 ≤ h < 23 | 1.5 |

23 ≤ h < 35 | 0.6 |

h ≥ 35 | 0.3 |

PD | POD | APOD | PS | |
---|---|---|---|---|

Sine | 0.260 mH | 0.882 mH | 0.530 mH | 0.371 mH |

THI | 0.222 mH | 1.938 mH | 0.584 mH | 0.393 mH |

SFO | 0.260 mH | 0.882 mH | 0.530 mH | 0.371 mH |

Sine | THI | SFO | |||||||
---|---|---|---|---|---|---|---|---|---|

r | x% | i_{g}/i | r | x% | i_{g}/i | r | x% | i_{g}/i | |

PD | 1.40 | 1.94% | 10.09% | 1.40 | 2.38% | 10.29% | 1.20 | 2.38% | 10.03% |

POD | 0.40 | 1.94% | 10.21% | 0.10 | 3.25% | 10.85% | 0.40 | 1.94% | 10.21% |

APOD | 0.90 | 1.50% | 10.81% | 0.60 | 1.94% | 10.51% | 0.90 | 1.50% | 10.18% |

PS | 1.00 | 1.94% | 10.21% | 1.20 | 1.50% | 10.65% | 1.00 | 1.94% | 10.21% |

L (mH) | C_{f} (μF) | L^{*}_{g} (mH) | L_{g} (mH) | |
---|---|---|---|---|

SPD | 0.260 | 8.04 | 0.365 | 0.257 |

SPOD | 0.882 | 8.04 | 0.352 | 0.244 |

SAPOD | 0.530 | 6.21 | 0.477 | 0.369 |

SPS | 0.371 | 8.04 | 0.371 | 0.263 |

THIPD | 0.222 | 9.86 | 0.311 | 0.203 |

THIPOD | 1.938 | 13.47 | 0.193 | 0.085 |

THIAPOD | 0.584 | 8.04 | 0.350 | 0.242 |

THIPS | 0.393 | 6.21 | 0.471 | 0.363 |

SFOPD | 0.260 | 9.86 | 0.313 | 0.204 |

SFOPOD | 0.882 | 8.04 | 0.352 | 0.244 |

SFOAPOD | 0.530 | 6.21 | 0.424 | 0.316 |

SFOPS | 0.371 | 8.04 | 0.371 | 0.263 |

ΣL (p.u.) | x (%) | f_{res} (kHz) | |
---|---|---|---|

SPD | 0.025 | 1.94% | 4.54 |

SPOD | 0.050 | 1.94% | 3.53 |

SAPOD | 0.041 | 1.50% | 4.02 |

SPS | 0.030 | 1.94% | 4.11 |

THIPD | 0.021 | 2.38% | 4.44 |

THIPOD | 0.087 | 3.25% | 3.26 |

THIAPOD | 0.038 | 1.94% | 3.79 |

THIPS | 0.035 | 1.50% | 4.35 |

SFOPD | 0.023 | 2.38% | 4.24 |

SFOPOD | 0.050 | 1.94% | 3.53 |

SFOAPOD | 0.039 | 1.50% | 4.15 |

SFOPS | 0.030 | 1.94% | 4.11 |

Sine | THI | SFO | |||||||
---|---|---|---|---|---|---|---|---|---|

k_{p} | T_{I} (ms) | k_{i} | k_{p} | T_{I} (ms) | k_{i} | k_{p} | T_{I} (ms) | k_{i} | |

PD | 2.09 | 15.65 | 133.73 | 1.78 | 13.36 | 133.73 | 1.91 | 14.35 | 133.73 |

POD | 4.12 | 30.88 | 133.73 | 7.11 | 53.31 | 133.73 | 4.11 | 30.88 | 133.73 |

APOD | 3.36 | 25.20 | 133.73 | 3.12 | 23.36 | 133.73 | 3.18 | 23.87 | 133.73 |

PS | 2.48 | 18.58 | 133.73 | 2.88 | 21.63 | 133.73 | 2.48 | 18.58 | 133.73 |

Electric parameter | Value |
---|---|

Grid line Voltage | 50 V |

Rated current | 6 A |

Grid frequency | 50 Hz |

DC Voltages | 24 V |

Switching frequency | 10 kHz |

Inductance and resistance of the transformer (low side reported) | 108.23 μH 25 mΩ |

V_{ab} | I_{a} | I_{ga} | |
---|---|---|---|

SPD | 7.94% | 3.92% | 0.38% |

THIPD | 7.86% | 4.61% | 0.43% |

SFOPD | 8.29% | 4.08% | 0.38% |

V_{ab} | I_{a} | I_{ga} | |
---|---|---|---|

SPOD | 25.62% | 3.37% | 0.33% |

THIPOD | 29.12% | 1.72% | 0.18% |

SFOPOD | 30.60% | 4.12% | 0.40% |

SAPOD | 24.17% | 5.68% | 0.53% |

THIAPOD | 29.78% | 6.16% | 0.61% |

SFOAPOD | 30.65% | 7.21% | 0.77% |

V_{ab} | I_{a} | I_{ga} | |
---|---|---|---|

SPS | 23.51% | 1.80% | 0.0095% |

THIPS | 29.84% | 2.16% | 0.0117% |

SFOPS | 30.51% | 2.35% | 0.0124% |

**Table 11.**Technical features of the IRFB4115PBF device [57].

Voltage V_{dss} | 150 V |

Resistance R_{ds(on)} | 9.3 mΩ |

Current Id (silicon limited) | 104 A |

Turn on delay t_{D(on)} | 18 ns |

Rise time t_{R} | 73 ns |

Turn off delay T_{D(off)} | 41 ns |

Fall time t_{F} | 39 ns |

Reversal recovery t_{RR} | 86 ns |

Mathematic operation | Time |
---|---|

Conversion Integer to Floating (Integer 13 bit, FP 32bit) | 60 ns |

Sum or subtraction (FP 32 bit) | 140 ns |

Product (FP 32 bit) | 110 ns |

Operation | Time |
---|---|

ABC to DQ transformation (FP 32bit) | 880 ns |

PI regulator (FP 32 bit) | 540 ns |

Integral (FP 32 bit) | 270 ns |

Overflow control and look-up table (FP 32 bit) | 450 ns |

**Table 14.**Experimental THD% of the converter and grid side currents, obtained with SPD, for different values of the injected current into the grid.

I_{n}/3 | I_{n}/2 | 2I_{n}/3 | I_{n} | |
---|---|---|---|---|

Converter side current | 12.17% | 7.82% | 6.46% | 5.88% |

Grid side current | 7.97% | 4.78% | 4.26% | 3.72% |

**Table 15.**Experimental THD% of the converter and grid side currents, obtained with SPS, for different values of the injected current into the grid.

I_{n}/3 | I_{n}/2 | 2I_{n}/3 | I_{n} | |
---|---|---|---|---|

Converter side current | 12.28% | 8.41% | 6.80% | 5.64% |

Grid side current | 7.42% | 4.45% | 3.91% | 3.33% |

© 2018 by the author. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Viola, F.
Experimental Evaluation of the Performance of a Three-Phase Five-Level Cascaded H-Bridge Inverter by Means FPGA-Based Control Board for Grid Connected Applications. *Energies* **2018**, *11*, 3298.
https://doi.org/10.3390/en11123298

**AMA Style**

Viola F.
Experimental Evaluation of the Performance of a Three-Phase Five-Level Cascaded H-Bridge Inverter by Means FPGA-Based Control Board for Grid Connected Applications. *Energies*. 2018; 11(12):3298.
https://doi.org/10.3390/en11123298

**Chicago/Turabian Style**

Viola, Fabio.
2018. "Experimental Evaluation of the Performance of a Three-Phase Five-Level Cascaded H-Bridge Inverter by Means FPGA-Based Control Board for Grid Connected Applications" *Energies* 11, no. 12: 3298.
https://doi.org/10.3390/en11123298