Design Considerations for a 120 GHz MIMO Sparse Radar Array Based on SISO Integrated Circuits

This study aims to illustrate the main aspects of designing a modular 120 GHz Multiple-Input Multiple-Output (MIMO) sparse radar array (SRA) composed of multiple Single-Input Single-Output (SISO) Integrated Circuits (ICs). Although the scientific literature reports on 120 GHz integrated circuit prototypes, to the authors’ best knowledge, there are no commercial MIMO radars composed of multiple SISO ICs operating in the D-band spectrum. The design involves many challenges; indeed, the necessity to combine multiple chips with fixed dimensions and the presence of transmitting and receiving antennas on chips add many constraints for the antenna placement and, consequently, for the virtual array design. As an example, the minimum distance between the antennas must be at least equal to the chip width, which is in turn higher than half a wavelength and renders the array into a sparse configuration, thus raising many concerns regarding fixing the optimum inter-chip distance. Thus, this contribution can be considered as pioneering, being focused on the emerging concept of designing D-band MIMO radars by exploiting a modular approach.