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15 pages, 2668 KB

Open AccessCommunication

Time-Interleaved SAR ADC in 22 nm Fully Depleted SOI CMOS

by Trace Langdon and Jeff Dix

Chips 2025, 4(4), 40; https://doi.org/10.3390/chips4040040 - 25 Sep 2025

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This work presents the design and simulation of a time-interleaved successive approximation register (SAR) analog-to-digital converter (ADC) implemented in GlobalFoundries’ 22 nm Fully Depleted Silicon-on-Insulator (FD-SOI) CMOS process. Motivated by the increasing demand for high-speed electrical links in data center and AI/ML applications, the proposed ADC architecture targets medium-resolution, high-throughput conversion with optimized power and area efficiency. The design leverages asynchronous SAR operation, bootstrapped sampling switches, and a hybrid binary/non-binary capacitive digital-to-analog converter (DAC) to achieve robust performance across process, voltage, and temperature (PVT) variations. System-level modeling using channel operating margin (COM) methodology guided the specification of key circuit blocks, enabling efficient trade-offs between resolution, speed, and power. Post-layout simulations demonstrated effective number of bits (ENOB) performance consistent with system requirements, while Monte Carlo analysis confirmed the statistical yield. The converter achieved competitive figures of merit compared to state-of-the-art designs, as benchmarked against the Murmann ADC survey. This work highlights critical design considerations for scalable mixed-signal architectures in advanced CMOS nodes and lays the foundation for future integration in high-speed SerDes systems. Full article

(This article belongs to the Special Issue New Research in Microelectronics and Electronics)

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20 pages, 4456 KB

Open AccessArticle

Predicting the Characteristics of High-Speed Serial Links Based on a Deep Neural Network (DNN)—Transformer Cascaded Model

by Liyin Wu, Jingyang Zhou, Haining Jiang, Xi Yang, Yongzheng Zhan and Yinhang Zhang

Electronics 2024, 13(15), 3064; https://doi.org/10.3390/electronics13153064 - 2 Aug 2024

Cited by 2 | Viewed by 3684

Abstract

The design level of channel physical characteristics has a crucial influence on the transmission quality of high-speed serial links. However, channel design requires a complex simulation and verification process. In this paper, a cascade neural network model constructed of a Deep Neural Network (DNN) and a Transformer is proposed. This model takes physical features as inputs and imports a Single-Bit Response (SBR) as a connection, which is enhanced through predicting frequency characteristics and equalizer parameters. At the same time, signal integrity (SI) analysis and link optimization are achieved by predicting eye diagrams and channel operating margins (COMs). Additionally, Bayesian optimization based on the Gaussian process (GP) is employed for hyperparameter optimization (HPO). The results show that the DNN–Transformer cascaded model achieves high-precision predictions of multiple metrics in performance prediction and optimization, and the maximum relative error of the test-set results is less than 2% under the equalizer architecture of a 3-taps TX FFE, an RX CTLE with dual DC gain, and a 12-taps RX DFE, which is more powerful than other deep learning models in terms of prediction ability. Full article

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17 pages, 19423 KB

Open AccessArticle

Blind Separation of the Measured Mixed Cyclostationary Waveforms in Transmission Lines of the PCB

by Yury V. Kuznetsov, Andrey B. Baev, Maxim A. Konovalyuk and Anastasia A. Gorbunova

Electronics 2023, 12(15), 3272; https://doi.org/10.3390/electronics12153272 - 30 Jul 2023

Cited by 6 | Viewed by 1806

Abstract

Crosstalk is an undesirable factor that degrades the quality of data transmission in printed circuit boards (PCBs). The signal integrity (SI) in multiconductor transmission lines is controlled by using a large number of multiport tests and measurements, which require a lot of time and expensive laboratory equipment. Proposed signal processing methods based on blind identification allow a reduction in the measurement burden. Contrary to the traditional approach requiring knowledge of sampling time offset, input pseudorandom bit sequence (PRBS), and time delay between received data and transmitted PRBS, the proposed alternative method performs blind separation of measured data for the linear fit pulse response (LFPR) procedure. The waveform identification of the partial pulse responses is evaluated for additively mixed cyclostationary sources of the data, intersymbol interference, and crosstalk. A mixed matrix model of composed random vectors is considered. The proposed estimation procedure is based on preprocessing of measured data using principal component analysis (PCA) and following independent component analysis (ICA). It is shown that the proposed component analysis allows diagnostics of signal integrity using eye-diagram patterns and the channel operating margin (COM). Full article

(This article belongs to the Section Computer Science & Engineering)

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