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Keywords = amorphous oxide semiconductor (AOS)

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18 pages, 4516 KiB  
Article
Fabrication and Optoelectronic Properties of Advanced Quinary Amorphous Oxide Semiconductor InGaZnSnO Thin Film
by Hongyu Wu, Liang Fang, Zhiyi Li, Fang Wu, Shufang Zhang, Gaobin Liu, Hong Zhang, Wanjun Li and Wenlin Feng
Materials 2025, 18(9), 2090; https://doi.org/10.3390/ma18092090 - 2 May 2025
Viewed by 504
Abstract
As the typical representative of amorphous oxide semiconductors (AOS), quaternary indium gallium zinc oxide (IGZO) has been applied as the active layer of thin-film transistors (TFTs), but their mobility is still low (usually ~10 cm2/Vs). IGTO is reported to have larger [...] Read more.
As the typical representative of amorphous oxide semiconductors (AOS), quaternary indium gallium zinc oxide (IGZO) has been applied as the active layer of thin-film transistors (TFTs), but their mobility is still low (usually ~10 cm2/Vs). IGTO is reported to have larger mobility owing to the addition of Tin (Sn) in IZO. So, whether Sn doping can increase the optoelectronic properties of IGZO is a new topic worth studying. In this study, four series of quinary InGaZnSnO (IGZTO) oxide thin films were deposited on glass substrates using a high-purity IGZTO (In:Ga:Zn:Sn:O = 1:0.5:1.5:0.25:x, atomic ratio) ceramic target by RF magnetron sputtering. The effects of fabrication parameters (sputtering power, argon gas flow, and target-to-substrate distance) and film thickness on the microstructure, optical, and electrical properties of IGZTO thin films were investigated. The results show that all IGZTO thin films deposited at room temperature (RT) are amorphous and have a smooth and uniform surface with a low roughness (RMS of 0.441 nm, RA of 0.332 nm). They exhibit good average visible light transmittance (89.02~90.69%) and an optical bandgap of 3.47~3.56 eV. When the sputtering power is 90 W, the argon gas flow rate is 50 sccm, and the target-to-substrate distance is 60 mm, the IGZTO films demonstrate optimal electrical properties: carrier concentration (3.66 × 1019 cm−3), Hall mobility (29.91 cm2/Vs), and resistivity (0.54 × 10−2 Ω·cm). These results provide a valuable reference for the property modulation of IGZTO films and the potential application in optoelectronic devices such as TFTs. Full article
(This article belongs to the Special Issue The Microstructures and Advanced Functional Properties of Thin Films)
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10 pages, 3523 KiB  
Article
A Threshold Voltage Model for AOS TFTs Considering a Wide Range of Tail-State Density and Degeneration
by Minxi Cai, Piaorong Xu, Bei Liu, Ziqi Peng, Jianhua Cai and Jing Cao
Electronics 2022, 11(19), 3137; https://doi.org/10.3390/electronics11193137 - 30 Sep 2022
Viewed by 3046
Abstract
There have been significant differences in principle electrical parameters between amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) and silicon-based devices for their distinct conduction mechanisms. Additionally, threshold voltage is one of the key parameters in device characterization and modeling. In this work, a [...] Read more.
There have been significant differences in principle electrical parameters between amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) and silicon-based devices for their distinct conduction mechanisms. Additionally, threshold voltage is one of the key parameters in device characterization and modeling. In this work, a threshold voltage model is developed for AOS TFTs considering the various density of exponential tail states below the conduction band, including degenerate conduction. The threshold condition is defined where the density ratio of free carriers to the trapped carriers reaches a critical value depending on the distribution parameters of tail states. The resulting threshold voltage expression is fully analytical and is of clear physical meaning, with simple parameter extraction methods. Numerical and experimental verifications show that this model provides appropriate values of threshold voltage for devices with different sub-gap tail states, which could be a useful method for identifying the threshold voltage of a large variety of AOS TFTs. Full article
(This article belongs to the Section Semiconductor Devices)
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8 pages, 2641 KiB  
Article
Compact Integration of Hydrogen–Resistant a–InGaZnO and Poly–Si Thin–Film Transistors
by Yunping Wang, Yuheng Zhou, Zhihe Xia, Wei Zhou, Meng Zhang, Fion Sze Yan Yeung, Man Wong, Hoi Sing Kwok, Shengdong Zhang and Lei Lu
Micromachines 2022, 13(6), 839; https://doi.org/10.3390/mi13060839 - 27 May 2022
Cited by 10 | Viewed by 4670
Abstract
The low–temperature poly–Si oxide (LTPO) backplane is realized by monolithically integrating low–temperature poly–Si (LTPS) and amorphous oxide semiconductor (AOS) thin–film transistors (TFTs) in the same display backplane. The LTPO–enabled dynamic refreshing rate can significantly reduce the display’s power consumption. However, the essential hydrogenation [...] Read more.
The low–temperature poly–Si oxide (LTPO) backplane is realized by monolithically integrating low–temperature poly–Si (LTPS) and amorphous oxide semiconductor (AOS) thin–film transistors (TFTs) in the same display backplane. The LTPO–enabled dynamic refreshing rate can significantly reduce the display’s power consumption. However, the essential hydrogenation of LTPS would seriously deteriorate AOS TFTs by increasing the population of channel defects and carriers. Hydrogen (H) diffusion barriers were comparatively investigated to reduce the H content in amorphous indium–gallium–zinc oxide (a–IGZO). Moreover, the intrinsic H–resistance of a–IGZO was impressively enhanced by plasma treatments, such as fluorine and nitrous oxide. Enabled by the suppressed H conflict, a novel AOS/LTPS integration structure was tested by directly stacking the H–resistant a–IGZO on poly–Si TFT, dubbed metal–oxide–on–Si (MOOS). The noticeably shrunken layout footprint could support much higher resolution and pixel density for next–generation displays, especially AR and VR displays. Compared to the conventional LTPO circuits, the more compact MOOS circuits exhibited similar characteristics. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Transistors)
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8 pages, 19723 KiB  
Article
An Empirical Modeling of Gate Voltage-Dependent Behaviors of Amorphous Oxide Semiconductor Thin-Film Transistors including Consideration of Contact Resistance and Disorder Effects at Room Temperature
by Sungsik Lee
Membranes 2021, 11(12), 954; https://doi.org/10.3390/membranes11120954 - 1 Dec 2021
Cited by 3 | Viewed by 3446
Abstract
In this paper, we present an empirical modeling procedure to capture gate bias dependency of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) while considering contact resistance and disorder effects at room temperature. From the measured transfer characteristics of a pair of TFTs where [...] Read more.
In this paper, we present an empirical modeling procedure to capture gate bias dependency of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) while considering contact resistance and disorder effects at room temperature. From the measured transfer characteristics of a pair of TFTs where the channel layer is an amorphous In-Ga-Zn-O (IGZO) AOS, the gate voltage-dependent contact resistance is retrieved with a respective expression derived from the current–voltage relation, which follows a power law as a function of a gate voltage. This additionally allows the accurate extraction of intrinsic channel conductance, in which a disorder effect in the IGZO channel layer is embedded. From the intrinsic channel conductance, the characteristic energy of the band tail states, which represents the degree of channel disorder, can be deduced using the proposed modeling. Finally, the obtained results are also useful for development of an accurate compact TFT model, for which a gate bias-dependent contact resistance and disorder effects are essential. Full article
(This article belongs to the Special Issue Thin-Film Transistors)
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17 pages, 4264 KiB  
Article
Numerical Analysis of Oxygen-Related Defects in Amorphous In-W-O Nanosheet Thin-Film Transistor
by Wan-Ta Fan, Po-Tsun Liu, Po-Yi Kuo, Chien-Min Chang, I-Han Liu and Yue Kuo
Nanomaterials 2021, 11(11), 3070; https://doi.org/10.3390/nano11113070 - 15 Nov 2021
Cited by 14 | Viewed by 3021
Abstract
The integration of 4 nm thick amorphous indium tungsten oxide (a-IWO) and a hafnium oxide (HfO2) high-κ gate dielectric has been demonstrated previously as one of promising amorphous oxide semiconductor (AOS) thin-film transistors (TFTs). In this study, the more positive threshold [...] Read more.
The integration of 4 nm thick amorphous indium tungsten oxide (a-IWO) and a hafnium oxide (HfO2) high-κ gate dielectric has been demonstrated previously as one of promising amorphous oxide semiconductor (AOS) thin-film transistors (TFTs). In this study, the more positive threshold voltage shift (∆VTH) and reduced ION were observed when increasing the oxygen ratio during a-IWO deposition. Through simple material measurements and Technology Computer Aided Design (TCAD) analysis, the distinct correlation between different chemical species and the corresponding bulk and interface density of states (DOS) parameters were systematically deduced, validating the proposed physical mechanisms with a quantum model for a-IWO nanosheet TFT. The effects of oxygen flow on oxygen interstitial (Oi) defects were numerically proved for modulating bulk dopant concentration Nd and interface density of Gaussian acceptor trap NGA at the front channel, significantly dominating the transfer characteristics of a-IWO TFT. Furthermore, based on the studies of density functional theory (DFT) for the correlation between formation energy Ef of Oi defect and Fermi level (EF) position, we propose a numerical methodology for monitoring the possible concentration distribution of Oi as a function of a bias condition for AOS TFTs. Full article
(This article belongs to the Special Issue Nanomaterials for Electron Devices)
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13 pages, 6562 KiB  
Article
The Investigation of Indium-Free Amorphous Zn-Al-Sn-O Thin Film Transistor Prepared by Magnetron Sputtering
by Mingyu Zhang, Kuankuan Lu, Zhuohui Xu, Honglong Ning, Xiaochen Zhang, Junlong Chen, Zhao Yang, Xuan Zeng, Rihui Yao and Junbiao Peng
Coatings 2021, 11(5), 585; https://doi.org/10.3390/coatings11050585 - 17 May 2021
Cited by 5 | Viewed by 3336
Abstract
The indium-free amorphous oxide semiconductor thin film transistor (AOS-TFT) with aluminum (Al) electrodes shows broad application prospects in new-generation display technologies, such as ultra-high definition large-screen display, OLED display and 3D display. In this work, the thin film transistor (TFT) with a zinc-aluminum-tin-oxide [...] Read more.
The indium-free amorphous oxide semiconductor thin film transistor (AOS-TFT) with aluminum (Al) electrodes shows broad application prospects in new-generation display technologies, such as ultra-high definition large-screen display, OLED display and 3D display. In this work, the thin film transistor (TFT) with a zinc-aluminum-tin-oxide (ZATO) semiconductor as the active layer and an Al electrodes as the source and drain (S/D) was investigated. The optical, electrical and semiconductive properties of the ZATO films were evaluated by atomic force microscopy (AFM), ultraviolet–visible spectrophotometry and microwave photoconductivity decay (μ-PCD), respectively. The result shows that the film is smooth and transparent and has low localized states and defects at a moderate oxygen concentration (~5%) and a low sputtering gas pressure (~3 mTorr). After the analysis of the transfer and output characteristics, it can be concluded that the device exhibits an optimal performance at the 623 K annealing temperature with an Ion/Ioff ratio of 5.5 × 107, an SS value of 0.15 V/decade and a saturation mobility (μsat) of 3.73 cm2·V−1·s−1. The ZATO TFT at the 623 K annealing has a −8.01 V negative shift under the −20 V NBS and a 2.66 V positive shift under the 20 V PBS. Full article
(This article belongs to the Special Issue New Advances in Thin-Film Transistor)
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16 pages, 5468 KiB  
Article
Amorphous NdIZO Thin Film Transistors with Contact-Resistance-Adjustable Cu S/D Electrodes
by Xinyi Zhang, Kuankuan Lu, Zhuohui Xu, Honglong Ning, Zimian Lin, Tian Qiu, Zhao Yang, Xuan Zeng, Rihui Yao and Junbiao Peng
Membranes 2021, 11(5), 337; https://doi.org/10.3390/membranes11050337 - 30 Apr 2021
Cited by 6 | Viewed by 4020
Abstract
High-performance amorphous oxide semiconductor thin film transistors (AOS-TFT) with copper (Cu) electrodes are of great significance for next-generation large-size, high-refresh rate and high-resolution panel display technology. In this work, using rare earth dopant, neodymium-doped indium-zinc-oxide (NdIZO) film was optimized as the active layer [...] Read more.
High-performance amorphous oxide semiconductor thin film transistors (AOS-TFT) with copper (Cu) electrodes are of great significance for next-generation large-size, high-refresh rate and high-resolution panel display technology. In this work, using rare earth dopant, neodymium-doped indium-zinc-oxide (NdIZO) film was optimized as the active layer of TFT with Cu source and drain (S/D) electrodes. Under the guidance of the Taguchi orthogonal design method from Minitab software, the semiconductor characteristics were evaluated by microwave photoconductivity decay (μ-PCD) measurement. The results show that moderate oxygen concentration (~5%), low sputtering pressure (≤5 mTorr) and annealing temperature (≤300 °C) are conducive to reducing the shallow localized states of NdIZO film. The optimized annealing temperature of this device configuration is as low as 250 °C, and the contact resistance (RC) is modulated by gate voltage (VG) instead of a constant value when annealed at 300 °C. It is believed that the adjustable RC with VG is the key to keeping both high mobility and compensation of the threshold voltage (Vth). The optimal device performance was obtained at 250 °C with an Ion/Ioff ratio of 2.89 × 107, a saturation mobility (μsat) of 24.48 cm2/(V·s) and Vth of 2.32 V. Full article
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10 pages, 2680 KiB  
Article
Amorphous Oxide Thin Film Transistors with Nitrogen-Doped Hetero-Structure Channel Layers
by Haiting Xie, Guochao Liu, Lei Zhang, Yan Zhou and Chengyuan Dong
Appl. Sci. 2017, 7(10), 1099; https://doi.org/10.3390/app7101099 - 24 Oct 2017
Cited by 21 | Viewed by 8827
Abstract
The nitrogen-doped amorphous oxide semiconductor (AOS) thinfilm transistors (TFTs) with double-stacked channel layers (DSCL) were prepared and characterized. The DSCL structure was composed of nitrogen-doped amorphous InGaZnO and InZnO films (a-IGZO:N/a-IZO:N or a-IZO:N/a-IGZO:N) and gave the corresponding TFT devices large field-effect mobility due [...] Read more.
The nitrogen-doped amorphous oxide semiconductor (AOS) thinfilm transistors (TFTs) with double-stacked channel layers (DSCL) were prepared and characterized. The DSCL structure was composed of nitrogen-doped amorphous InGaZnO and InZnO films (a-IGZO:N/a-IZO:N or a-IZO:N/a-IGZO:N) and gave the corresponding TFT devices large field-effect mobility due to the presence of double conduction channels. The a-IZO:N/a-IGZO:N TFTs, in particular, showed even better electrical performance (µFE = 15.0 cm2・V−1・s−1, SS = 0.5 V/dec, VTH = 1.5 V, ION/IOFF = 1.1 × 108) and stability (VTH shift of 1.5, −0.5 and −2.5 V for positive bias-stress, negative bias-stress, and thermal stress tests, respectively) than the a-IGZO:N/a-IZO:N TFTs. Based on the X-ray photoemission spectroscopy measurements and energy band analysis, we assumed that the optimized interface trap states, the less ambient gas adsorption, and the better suppression of oxygen vacancies in the a-IZO:N/a-IGZO:N hetero-structures might explain the better behavior of the corresponding TFTs. Full article
(This article belongs to the Special Issue Thin-Film Transistor)
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