Low-Cost Active Power Filter Using Four-Switch Three-Phase Inverter Scheme
Abstract
:1. Introduction
2. Objective and Contribution of the Paper
2.1. Main Objective
2.2. Main Contribution
3. Concept of Shunt Active Power Filter
4. Reference Grid Currents Generation Methods
4.1. Based on Closed-Loop Control of DC Link Voltage of the SAPF
4.2. Based on Calculation of the First Harmonics of the Load Current
5. Principle of Operation of FSTPI
6. Investigated Schemes of SAPFs with FSTPI and SSTPI Using PSIM
6.1. Hardware Modeling in PSIM
6.2. Design of PI Controllers
6.3. Simulation Parameters
7. Obtained Results and Discussions
7.1. (Nonlinear Load): 3-Φ Diode Bridge Rectifier Feeding a Highly Inductive Load
7.2. (Highly Distorted Current): 3-Φ Diode Bridge Rectifier Loaded with a Capacitive Load
7.3. (Unbalanced Non-Linear Load): Three 1-Φ Diode Bridge Rectifiers Loaded with Unequal Capacitive Loads
8. Conclusions
- The total harmonic distortion (THD) of the grid current with the FSTPI scheme is 3.2%, while with the SSTPI scheme, it is 2.05%. Thus, the THD with the FSTPI is higher by 56%.
- The amplitude of the fifth-order harmonic in the supply current does not exceed 1% of the fundamental component in both schemes. In the FSTPI, the ratio (I5/I1) is 0.66%, while the corresponding ratio in the SSTPI is 0.18%.
- The input power factor (PF) in both schemes is almost unity (0.99).
- Both schemes of SAPFs produce the same average value of the DC link voltage, which is well-regulated to the desired set point (600 V) thanks to the PI voltage controllers of the outer voltage control loops. However, in the case of the FSTPI scheme, the dominant low-order harmonic of the DC link voltage pulsates at the supply frequency (60 Hz). Meanwhile in the case of the SSTPI, the dominant low-order harmonic of the DC link voltage pulsates at a rate six times the supply frequency (360 Hz).
- The operation of the FSTPI-based SAPF is reliable and effective under highly distorted loading conditions. After compensation, the THD of the grid currents is extremely improved from 125% to 9%, meanwhile the PF is improved from 0.624 to 0.99.
- The SAPF using the FSTPI is effective in compensating for the unbalanced nonlinear loading condition whose current waveform is highly distorted. The THD improves from 153% to 6.2%, meanwhile the PF improves from 0.544 to 0.99.
- Compared with the SSTPI scheme, the proposed SAPF with the FSTPI scheme provides a reduction in the number of power transistors, freewheeling diodes, and auxiliary driver/isolation circuits by 33.33%. Moreover, the number of Hall effect current and voltage transducers that are needed to implement the SAPF with the FSTPI is reduced by the same amount (33%), which reduces the overall capital cost of the SAPF system.
- The FSTPI scheme requires an additional two capacitors instead of two power semiconductor switches. Fortunately, the price of power capacitors is less than the price of power transistors, especially if their type is SiC.
- The FSTPI scheme provides a reduction in conduction power losses of 33% for the same inverter current compared with its SSTPI counterpart.
- Compared with the SSTPI scheme, the FSTPI suffers from an increase in switching power losses by 15.4% when both inverters operate at the same PWM switching frequency and the same inverter output voltage.
- Although the conventional SAPF scheme with the SSTPI provides a relatively superior performance in terms of AC currents drawn from the grid with a lower THD and a lower harmonic content of the DC link voltage, the SAPF based on the FSTPI is considered to be competitive with the conventional SAPF scheme in terms of the reduced number of power semiconductor devices and transducers needed to implement the overall system.
- The satisfactory performance achieved by the SAPFs with the FSTPI scheme makes the FSTPI scheme feasible and applicable when price reduction and fabricating economic SAPFs are of major concern.
Funding
Data Availability Statement
Conflicts of Interest
Nomenclature
Abbreviations | |
APF | Active power filter |
FSTPI, B4 | Four-switch three-phase inverter |
FFT | Fast Fourier transform |
FO-PID | Fractional-order PID |
IGBT | Insulated gate bipolar transistor |
LOH | Low-order harmonic |
MOSFET | Metal–oxide field-effect transistor |
THD | Total harmonic distortion |
PCC | Point of common coupling |
PF | Power factor |
PLL | Phase-locked loop |
PID | Proportional–integral–derivative |
PWM | Pulse width modulation |
SAPF | Shunt active power filter |
SCR | Silicon controlled rectifier |
SPWM | Sinusoidal PWM |
SiC | Silicon Carbide |
SSTPI, B6 | Six-switch three-phase inverter |
SVM | Space vector modulation |
VSI | Voltage source inverter |
WBG | Wide band gap |
Symbols | |
Reference filter currents | |
Reference supply (grid) currents | |
Instantaneous values of the load currents | |
Instantaneous values of the 1st harmonic of the nonlinear load currents | |
Peak value of the reference supply current | |
Reference DC link voltage | |
Instantaneous value of DC link voltage | |
S1, S3, S5, S4, S6, S2 | Switching signals of the six transistors of SSTPI |
S3, S5, S6, S2 | Switching signals of the four transistors of FSTPI |
C1, C2 | Capacitors of the 1st branch of FSTPI |
C | DC link capacitor of SAPFs |
Inductance of the inductor connected to the output of the SAPF | |
Inductance of the AC supply (grid inductance) | |
AC supply voltage | |
Kswt | Switching function of the inverter |
Transfer functions of PI controllers of the voltage and current loops, respectively | |
Open-loop gain function of the voltage control loop | |
Open-loop gain function of the current control loop | |
Closed-loop transfer function of the voltage control loop | |
Closed-loop transfer function of the current control loop | |
Proportional gains of the voltage and current controllers, respectively | |
, | Integral gains the voltage and current controllers, respectively |
Damping ratios of voltage and current control loops, respectively | |
Settling times of voltage and current control loops, respectively | |
Natural frequencies of voltage and current control loops, respectively | |
Supply radian frequency |
Appendix A
Appendix A.1. Derivation of PI Controller’s Gains of DC Voltage Control Loop
Appendix A.2. Derivation of PI Controller’s Gains of Inner Current Control Loop
Appendix B
Comparative Analysis of SAPFs Using FSTPI and SSTPI Schemes
Item | SSTPI | FSTPI | |
---|---|---|---|
Number of devices | Transistors and freewheeling diodes | 6 | 4 |
Isolation and driving circuits | 6 | 4 | |
Hall effect current transducers | 3 | 2 | |
Hall effect voltage transducers (for DC link voltage measurement) | 1 | 1 | |
Phase-locked loop (PLL) or Hall effect voltage transducers (for unity gain signal synchronized with the AC grid voltage) | 3 | 2 | |
Capacitors (DC link and one branch of the inverter power circuit) | 1 | 3 | |
Inverter output voltage | Normalized line–line or line–neutral (at the same DC link voltage) | 1 | |
Normalized required DC link voltage (for the same inverter output voltage | 1 | ||
Power losses | Normalized conduction losses (for the same inverter load current) | 1 | 0.666 |
Normalized switching losses (for the same inverter output voltage and current and at the same PWM switching frequency) | 1 | 1.154 | |
Normalized total power losses | 1 | = 0.91 | |
Power quality | Input PF | 0.99 | 0.99 |
Best achieved THD of AC grid current (at the same switching frequency, sampling time, passive filtering components) | 2% | 3% |
Item | Description | Percentage |
---|---|---|
Saving in the devices | Transistors and freewheeling diodes | 33.3% |
Isolation and driving circuits | 33.3% | |
Hall effect current transducers | 33% | |
Phase-locked loop (PLL) or Hall effect voltage transducers (for unity gain signal synchronized with the AC grid voltage) | 33.3% | |
Additional cost of capacitors | Two capacitors of one arm (branch of no power transistors) | 200% |
Undesired reduction in the inverter output voltage | For the same DC link voltage | |
Required additional increase in DC link voltage | For the same inverter output voltage | 73.2% |
Reduction (saving) in conduction power losses | For the same load current | 33.3% |
Increasing in switching power losses | At the same PWM switching frequency and for the same inverter output voltage and current | |
Saving in overall power losses | For the same operating conditions |
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Parameter | Value |
---|---|
AC supply () | 3-Φ: 208 V/60 Hz |
DC bus capacitor (C) | 4 mF |
FSTPI capacitors (C1, C2) | 1 mF |
Total inductance (L = Lf + Ls) | 4 mH |
Switching strategy | SPWM |
Switching frequency (FSWT) | 10.02 kHz |
Solver time step | 5 μs |
DC link voltage (VDC) | 600 V |
Item | Parameter | SAPF-SSTPI | SAPF-FSTPI |
---|---|---|---|
Supply Current | THD | 2.05% | 3.2% |
First Harmonic | 11.27 | 11.24 A | |
Third Harmonic | 0.0007 A | 0.077 A | |
I5/I1 | 0.18% | 0.66% | |
PF | 0.999 | 0.999 | |
DC link voltage | Minimum value | 599.96 | 599.85 |
Maximum value | 600.06 | 600.13 | |
Dominant LOH | 6 | 1 | |
First Harmonic | 0.0027 V | 0.064 V | |
Second Harmonic | 0.0007 V | 0.017 V | |
Third Harmonic | 0.0005 V | 0.0024 V | |
Fourth Harmonic | 9.4 × 10−5 V | 0.0067 V | |
Fifth Harmonic | 0.0002 V | 0.0131 V | |
Sixth Harmonic | 0.039V | 0.030 V |
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Azab, M. Low-Cost Active Power Filter Using Four-Switch Three-Phase Inverter Scheme. Electricity 2025, 6, 16. https://doi.org/10.3390/electricity6010016
Azab M. Low-Cost Active Power Filter Using Four-Switch Three-Phase Inverter Scheme. Electricity. 2025; 6(1):16. https://doi.org/10.3390/electricity6010016
Chicago/Turabian StyleAzab, Mohamed. 2025. "Low-Cost Active Power Filter Using Four-Switch Three-Phase Inverter Scheme" Electricity 6, no. 1: 16. https://doi.org/10.3390/electricity6010016
APA StyleAzab, M. (2025). Low-Cost Active Power Filter Using Four-Switch Three-Phase Inverter Scheme. Electricity, 6(1), 16. https://doi.org/10.3390/electricity6010016