# DC Charging Capabilities of Battery-Integrated Modular Multilevel Converters Based on Maximum Tractive Power

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## Abstract

**:**

## 1. Introduction

#### Contributions and Outline

## 2. Topology Review

_{arms}), and each arm is made up of several cascaded stages of power converters and is commonly referred to as submodules (SM) (N

_{sm,arm}SMs per arm). In the figure, the terminals ‘P’ and ‘N’ are used as the positive and negative terminals for DC charging, and the circuit breaker, $\overline{{\mathrm{CB}}_{\mathrm{n}}}$, in the open position ensures that the electric machine (EM) is disconnected from the BI-MMC during DC charging. Figure 1a,b present the double-star half-bridge (DSHB) and double-star full-bridge (DSFB) topologies, respectively, and Figure 1c,d gives the single-star half-bridge and single-star full-bridge topologies, respectively. In single-star topologies, in addition to $\overline{{\mathrm{CB}}_{\mathrm{n}}}$ open, it is also necessary to ensure that ${\mathrm{CB}}_{\mathrm{n}}$ is open for DC charging. In double-star BI-MMCs, arm inductors are used to reduce the amplitude of circulating currents. Still, in single-star topologies, there is no path for the circulating current during traction. Therefore, arm inductors are not required for such a design. Figure 1e illustrates the single-delta topology. In this topology, in addition to $\overline{{\mathrm{CB}}_{\mathrm{n}}}$ open, ${\mathrm{CB}}_{\mathrm{p}}$ and ${\mathrm{CB}}_{\mathrm{n}}$ should be in position ‘Y’ for DC charging. A detailed description of all the topologies is presented in [35]. The SMs are bidirectional by design due to the anti-parallel diode, and as a result, the AC side current can be controlled in both directions.

_{s(cells)}series and N

_{p(cells)}parallel cells, and DC-link capacitors modeled as an RLC circuit with an equivalent series resistance (ESR), equivalent capacitance, (C) and parasitic inductance between the capacitors and the high-side switches (ESL). N

_{s(cells)}defines the desired SM DC voltage (U

_{s}), and the required battery capacity per submodule defines N

_{p(cells)}. An SM consists of 2 or 4 switches (for HB- and FB–SMs, respectively), and each switch is made of N

_{p(mos)}parallel MOSFETs. The HB-SM, shown in fig:HBFBa, has two complementary switches S

_{1}and S

_{2}. When S

_{1}is ‘off’ (S

_{2}is ‘on’), u

_{sm}is equal to 0 V, referred to as the bypass state. Alternatively, when S

_{1}is ‘on’ (S

_{2}is ‘off’), the SM output voltage u

_{sm}is equal to the DC side voltage U

_{s}; this is referred to as the insertion state. The FB–SM, shown in fig:HBFBb, has four switches, S

_{1}, S

_{2}, and S

_{3}, S

_{4}, where S

_{1}, S

_{2}, and S

_{3}, S

_{4}are complementary switches. When either S

_{1}, S

_{3}, or S

_{2}, S

_{4}is ‘on’, u

_{sm}is 0 V (bypass states). When S

_{1}and S

_{4}are ‘on’ (S

_{2}and S

_{3}are ‘off’), then u

_{sm}is equal to U

_{s}(insertion state). Similarly, when S

_{2}and S

_{3}are ‘on’ (S

_{1}and S

_{4}are ‘off’), then u

_{sm}is equal to −U

_{s}(insertion state). The RMS output voltage of the HB-SM (U

_{sm(hb)}) and FB–SM (U

_{sm(fb)}) are:

_{max}is the maximum modulation index.

## 3. Total Number of Submodules

#### 3.1. CDC-T: Total Number of Submodules Determined by the Traction Voltage

_{ph}is calculated using the following relation:

_{ph}is the number of phases.

#### 3.2. CDC-C: Total Number of Submodules Determined by Maximum DC Charger Voltage

_{ph}. As a result, the BI-MMC cannot reach the maximum traction voltage, reducing traction power. Therefore, the total number of submodules (${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$) required to ensure ${\mathit{U}}_{\mathrm{pn}}$ > ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$ while also ensuring a maximum AC output voltage of U

_{ph}is determined as follows:

_{sm}) is altered, the total number of parallel cells per SM will also change. This is because the total energy stored in the batteries is the same. As a result, during charging, the change in the total number of SM batteries in series compensates for the change in the number of parallel cells per SM. Therefore, the battery losses in both CDC-T and CDC-C are identical.

## 4. Power Loss Calculations

#### 4.1. Power Loss during Traction

_{ds(on)}is the MOSFET on-state resistance, N

_{p(mos)}is the number of parallel MOSFETs per switch, t

_{sw(tran)}is the combined switching transient time, corresponding to the sum of current rise and voltage fall time at turn-on and the voltage rise and current fall time at a turn-off, i.e., ${t}_{\mathrm{sw}\left(\mathrm{tran}\right)}={t}_{\mathrm{ri}}+{t}_{\mathrm{fi}}+{t}_{\mathrm{rv}}+{t}_{\mathrm{fv}}$, and ${f}_{\mathrm{sw}}^{\mathrm{t}}$ is the MOSFET switching frequency. N

_{p(mos)}is calculated, considered a maximum case temperature, t

_{sw(tran)}is determined considering a maximum drain-to-source voltage ripple, and ${f}_{\mathrm{sw}}^{\mathrm{t}}$ is selected such that the DC-current harmonic components are bypassed by the DC-link capacitors [36].

_{sw}represents the number of switches per SM. It is important to mention that the SM circuit board contains the switches and the DC-link capacitors. As a result, the total losses per submodule include both ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}\left(\mathrm{t}\right)}$ and the capacitor losses per SM. However, due to the design choice of the DC-link capacitors, the capacitor losses per SM are far lower than ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}\left(\mathrm{t}\right)}$ [36]. Therefore, the total losses per submodule are equal to ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}\left(\mathrm{t}\right)}$.

_{sm(tot)}represents the total number of submodules presented in either CDC-A or -B.

#### 4.2. Power Loss during DC Charging

_{1}in HB-SM, and S

_{1}and S

_{3}in the FB–SM, bare the conduction losses; and during the bypass period, the other switches bare the conduction losses. The DC charging conduction losses per switch during the insertion- and bypass-states (${\mathit{P}}_{\mathrm{c},\mathrm{sw}\left(\mathrm{ins}\right)}^{\mathrm{l}\left(\mathrm{c}\right)}$ and ${\mathit{P}}_{\mathrm{c},\mathrm{sw}\left(\mathrm{byp}\right)}^{\mathrm{l}\left(\mathrm{c}\right)}$, respectively) are given as follows:

_{ds(on)}is the MOSFET on-state resistance.

## 5. Maximum DC Charging Power Calculations

## 6. Submodule Case Temperature

_{c}) is calculated using the following relation:

_{$\theta $ca}is the case of ambient thermal resistance (presented in Appendix A), ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ is the submodule losses, and T

_{a}is the ambient temperature.

## 7. Comparative Assessment

_{max}) of 0.85 was considered, allowing for 15% redundant submodules; 24 Ah Samsung NMC Li-ion cells were considered with nominal and minimum cell voltages of 3.7 V and 3.45 V, respectively. The minimum cell voltage selected from the open circuit voltage vs. state-of-charge curve corresponds to 65% depth-of-discharge. The total energy stored in the batteries of a 40-ton commercial vehicle is assumed to be one MWh. Appendix A shows the number of parallel MOSFETs per switch, the maximum drain-to-source resistances, the MOSFET switching frequencies, and the case of ambient thermal resistance, determined using the procedure shown in [36].

#### 7.1. Number of Submodules

_{s(cells)}.

#### 7.1.1. N_{s(cells)} Comparison

_{s(cells)}for a given topology. This is because as N

_{s(cells)}increase, the DC-side SM voltage (U

_{s}) increases, thus increasing the SM output RMS voltage (U

_{sm}), and this, in turn, reduces the total number of submodules required to have U

_{ph}(U

_{ph}is the same for all topologies and N

_{s(cells)}).

**Figure 4.**Total number of submodules determined by the traction voltage (${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$) and maximum DC charger voltage (${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}\star}$) for all topologies with 1, 6, and 12 N

_{s(cells)}.

#### 7.1.2. Topology Comparison

_{sm}for DSFB is two times more than that of DSHB because of the bi-polar nature of FB–SMs. For the same reason, SSFB has 50% lower ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ than SSHB, and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ for DSFB and SSHB are identical for a given N

_{s(cells)}. SDFB has $\sqrt{3}$ times higher ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ than that of SSFB because, in the SDFB, U

_{v}and U

_{ph}are equal.

_{ph}, thus resulting in lower tractive power. Therefore, in CDC-C, DSHB ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ are the same, and during DC charging, the ${\mathit{D}}_{\mathrm{c}}$ of DSHB is equal to ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$/${\mathit{U}}_{\mathrm{pn}}$. ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ for all other topologies is the same as ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}\star}$.

#### 7.2. Submodule Losses

_{s(cells)}. ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for both the DC charging scenarios is identical, and this is, by definition, i.e., ensuring that the submodule losses during charging and traction are identical.

#### 7.2.1. N_{s(cells)} Comparison

_{s(cells)}for a given topology. This is because of the increase in the conduction losses due to the high R

_{ds(on)}of the higher voltage class MOSFETs employed at higher N

_{s(cells)}.

#### 7.2.2. Topology Comparison

_{sw}than the DSHB for a given N

_{s(cells)}. For the same reason, ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for SSFB is two times more than in SSHB. ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for SSHB is almost four times as in DSHB because SSHB has two times more I

_{arm}than DSHB. For the same reason, SSFB has three times more ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ than DSFB. For 12 N

_{s(cells)}, ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ of SSHB is a factor of 3 higher than DSHB because SSHB has slightly higher N

_{p(mos)}than DSHB, and a detailed calculation for N

_{p(mos)}is described in [36]. For the same reason, SSFB has three times more ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ than DSFB at 12 N

_{s(cells)}. ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for SSFB is about three times higher than in SDFB because I

_{arm}for SSFB is $\sqrt{3}$ times greater than in SDFB.

#### 7.3. Total Semiconductor Losses

_{s(cells)}.

#### 7.3.1. N_{s(cells)} Comparison

_{s(cells)}. This is because as N

_{s(cells)}increases, the MOSFET R

_{ds(on)}increases but not in proportion to the total number of submodules (both ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$) decreases.

#### 7.3.2. Topology Comparison

_{s(cells)}and topology: the losses per submodule for both the cases (CDC-C and CDC-T) are identical (by definition). As a result, ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{t}\right)}$ and ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{c}\right)}$ are proportional to ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$, respectively. Therefore, all topologies except DSHB have higher ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{c}\right)}$ than ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{t}\right)}$ for a given N

_{s(cells)}. In DSHB, ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ are the same; thus, ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{t}\right)}$ and ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{c}\right)}$ are equal. ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{c}\right)}$ (CDC-C) for SSFB is about three times as ${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{t}\right)}$ (CDC-T) because ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ is about three times as ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$.

#### 7.4. Maximum DC Charging Voltage and Current

_{s(cells)}. Figure 7a gives the maximum BI-MMC DC link voltage (${\mathit{U}}_{\mathrm{pn}}$) and maximum MCS DC charger voltage (${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$). The figure shows that ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$ is independent of N

_{s(cells)}for a given topology. This is because in CDC-T, the ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ is designed such that all topologies have the same U

_{ph}, irrespective of N

_{s(cells)}, and in CDC-C, ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ is determined such that ${\mathit{U}}_{\mathrm{pn}}$ is equal to ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$, irrespective of N

_{s(cells)}. ${\mathit{U}}_{\mathrm{pn}}$ for DSHB in CDC-T and CDC-C are identical because both ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ for DSHB are equal. In CDC-T, the distribution of ${\mathit{U}}_{\mathrm{pn}}$ among topologies follows ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ for a given N

_{s(cells)}. However, in CDC-C, by definition, ${\mathit{U}}_{\mathrm{pn}}$ and ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$ are equal for all topologies except DSHB. ${\mathit{U}}_{\mathrm{pn}}$ for DSHB is higher than ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$ because ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ is greater than ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}\star}$.

_{s(cells)}increases, ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ increases marginally for a given topology. This is because ${f}_{\mathrm{sw}}^{\mathrm{t}}$ increases with the increase in N

_{s(cells)}. ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for CDC-T and CDC-C are similar for a given topology and N

_{s(cells)}, because ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for CDC-T and CDC-C are similar (by definition). ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for DSHB and DSFB are similar even though ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for DSFB is two times more than DSHB. This is because FB–SMs have twice the N

_{sw}as HB-SMs, for a given N

_{s(cells)}. For the same reason, ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for SSHB and SSFB are similar for 1 N

_{s(cells)}. At 6 and 12 N

_{s(cells)}, however, ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ SSFB is slightly lower than SSHB because these topologies have different N

_{p(mos)}. ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for SSFB is about two times more than in DSFB for a given N

_{s(cells)}. This is because ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for SSFB is about four times more than in DSFB. For the same reason, ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for SSHB is about twice as DSFB. DSFB and SDFB have similar ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ because these topologies have similar ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$.

#### 7.5. Maximum DC Charging Power

_{s(cells)}.

#### 7.5.1. N_{s(cells)} Comparison

_{s(cells)}increases, ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ increases marginally. This is because ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ increases marginally with an increase in N

_{s(cells)}.

#### 7.5.2. Topology Comparison

_{s(cells)}. In CDC-C, ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ for all topologies follows ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for a given N

_{s(cells)}because ${\mathit{U}}_{\mathrm{pn}}$ for all the topologies is the same.

_{s(cells)}. This is because ${\mathit{U}}_{\mathrm{pn}}$ for SSFB is half of that in DSFB, but ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$ for SSFB is two times more than in DSFB. For the same reason, ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ for SSHB is similar to that in DSHB. DSFB and SDFB have similar ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ because these topologies have similar ${\mathit{U}}_{\mathrm{pn}}$ and ${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$, irrespective of the DC charging scenario (CDC-T or CDC-C).

_{s(cells)}. ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ for SSFB in CDC-C is about three times greater than in CDC-T because ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ is about three times higher than ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$. For the same reason, DSFB, SSHB, and SDFB also have higher ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ in CDC-C than in CDC-T and is proportional to the difference between ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$.

#### 7.6. Submodule Temperature

_{p(mos)}is selected such that T

_{c}for all topologies is below 80 °C considering an ambient temperature of 40 °C, and is presented in Table A1. A minimum limit for N

_{p(mos)}of 4 is chosen to reduce the total losses. Figure 9 shows the T

_{c}for all topologies with 1, 6, and 12 N

_{s(cells)}at a maximum charging power of ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$.

#### 7.6.1. N_{s(cells)} Comparison

_{s(cells)}increases, T

_{c}also increases. This is because the MOSFET on-state resistance also increases with an increase in N

_{s(cells)}(Table A1), thereby increasing ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$.

#### 7.6.2. Topologies Comparison

_{c}than for a given N

_{s(cells)}. This is because, in the double-star topologies, the RMS output current is split equally between the two arms resulting in lower losses. The SDFB is slightly more than in DSFB because ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for SDFB is slightly more than in DSFB are similar. The T

_{c}for DSFB and DSHB are similar. This is because ${\mathit{P}}_{\mathrm{sm}}^{\mathrm{l}}$ for DSFB is twice as in DSHB, but DSFB has 50% lower R

_{$\theta $ca}than DSHB (see Table A1) since DSFB has twice as many switches as DSHB.

## 8. Discussion

## 9. Conclusions

_{s(cells)}have about 2.5 to 3.3 MW of ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$, about 30% of all the topologies with 1, 6, and 12 N

_{s(cells)}have ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ of about 1.5 to 2.5 MW and all the other topologies have ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ of about 800 kW to 1.5 MW. All the BI-MMC topologies can achieve 1 h or shorter charging time, corresponding to 1 C or higher charging current.

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

## Appendix A

_{p(mos)}) for all topologies at different N

_{s(cells)}, such that the case temperature does not exceed 80 °C calculated using the relation in [36]. Most topologies have four N

_{p(mos)}because the minimum number of parallel MOSFETs is limited to 4. The table also presents the maximum on-state resistance (${\mathit{R}}_{\mathrm{ds}\left(\mathrm{on}\right)}^{\mathrm{max}}$) for all topologies at different N

_{s(cells)}, and for a given N

_{s(cells)}, all topologies employ the same MOSFET. Furthermore, the table presents the MOSFET switching frequency during traction (${f}_{\mathrm{sw}}^{\mathrm{t}}$) for all topologies at different N

_{s(cells)}using the optimization principle presented in [36]. Finally, the table shows the SM case of ambient thermal resistance.

**Table A1.**The total number of parallel MOSFETs per switch, maximum MOSFET on-state resistance, MOSFET switching frequency during traction, and SM case-to-ambient thermal resistance for all topologies with 1, 6, and 12 N

_{s(cells)}.

Topology / N_{s(cells)} | 1 | 6 | 12 |
---|---|---|---|

Total number of parallel MOSFETs (N_{p(mos)}) | |||

DSHB | 4 | 4 | 4 |

DSFB | 4 | 4 | 4 |

SSHB | 4 | 5 | 6 |

SSFB | 4 | 4 | 5 |

SDFB | 4 | 4 | 4 |

Maximum MOSFET on-state resistance (${\mathit{R}}_{\mathrm{ds}\left(\mathrm{on}\right)}^{\mathrm{max}}$) | |||

- | 0.375 m$\Omega $ | 0.6 m$\Omega $ | 1.6 m$\Omega $ |

MOSFET switching frequency during traction (${f}_{\mathrm{sw}}^{\mathrm{t}}$) | |||

DSHB | 4.2 kHz | 7.5 kHz | 9.8 kHz |

DSFB | 2.5 kHz | 5.2 kHz | 8.8 kHz |

SSHB | 3.2 kHz | 5.5 kHz | 7.5 kHz |

SSFB | 1.8 kHz | 3.5 kHz | 6.2 kHz |

SDFB | 2.2 kHz | 4.8 kHz | 8.2 kHz |

SM case-to-ambient thermal resistance (R_{$\theta $ca}) | |||

DSHB | 0.46 K/W | 0.52 K/W | 0.24 K/W |

DSFB | 0.23 K/W | 0.27 K/W | 0.12 K/W |

SSHB | 0.46 K/W | 0.52 K/W | 0.24 K/W |

SSFB | 0.23 K/W | 0.27 K/W | 0.12 K/W |

SDFB | 0.23 K/W | 0.27 K/W | 0.12 K/W |

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**Figure 1.**Schematic of battery-integrated modular multilevel converters (BI-MMCs) for an N

_{ph}-phase system during DC charging. (

**a**) Double-star half-bridge (DSHB), (

**b**) double-star full-bridge, (

**c**) single-star half-bridge (SSHB), (

**d**) single-star full-bridge (SSFB), and (

**e**) single-delta full-bridge (SDFB) topologies [36].

**Figure 2.**Schematic of a megawatt DC charger and different charging strategies. (

**a**) megawatt Dc charger schematic and (

**b**) the constant current constant voltage (CC-CV) and constant current (CC) charging strategies.

**Figure 3.**Schematic of battery-integrated MMC submodules. (

**a**) half-bridge submodule (HB-SM) and (

**b**) full-bridge submodule (FB–SM) [36].

**Figure 5.**Total submodule losses for all the DC charging scenarios considering a maximum charging power of ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$ for all topologies with 1, 6, and 12 N

_{s(cells)}.

**Figure 6.**Total semiconductor losses considering both ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{t}}$ (${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{t}\right)}$), CDC-T, and ${\mathit{N}}_{\mathrm{sm}}^{\mathrm{c}}$ submodules (${\mathit{P}}_{\mathrm{sc}}^{\mathrm{l}\left(\mathrm{c}\right)}$), CDC-C, during traction at a maximum power of 400 kW for all topologies with 1, 6, and 12 N

_{s(cells)}.

**Figure 7.**The maximum BI-MMC DC link voltage and maximum DC charger current considering the two different DC charging scenarios: CDC-T and CDC-C for all topologies with 1, 6, and 12 N

_{s(cells)}with the maximum allowable DC voltage and current for MCS [34]. (

**a**) maximum BI-MMC DC link voltage (${\mathit{U}}_{\mathrm{pn}}$) and the maximum MCS DC charger voltage (${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$), and (

**b**) maximum DC charger current (${\mathit{I}}_{\mathrm{max}}^{\mathrm{c}}$) the maximum MCS DC charger current (${\mathit{I}}_{\mathrm{mcs}}^{\mathrm{c}}$).

**Figure 8.**The maximum DC charging power considering the two different DC charging scenarios, CDC-T and CDC-C, for all topologies with 1, 6, and 12 N

_{s(cells)}.

**Figure 9.**The submodule temperature for all topologies with 1, 6, and 12 N

_{s(cells)}at a maximum charging power of ${\mathit{P}}_{\mathrm{max}}^{\mathrm{c}}$.

Parameters | Symbol | Value |
---|---|---|

Maximum tractive power | ${\mathit{P}}_{\mathrm{max}}^{\mathrm{t}}$ | 400 kW |

AC phase-to-phase voltage | U_{v} | 440 V |

Electric machine nominal speed | - | 1000 rpm |

Load power factor | $cos\left(\varphi \right)$ | 0.9 |

Maximum modulation index | M_{max} | 0.85 |

MCS DC charging voltage ^{†} | ${\mathit{U}}_{\mathrm{dc}\left(\mathrm{c}\right)}^{\mathrm{max}}$ | 1250 V |

MCS DC charging current ^{†} | ${\mathit{I}}_{\mathrm{mcs}}^{\mathrm{c}}$ | 3000 A |

MOSFET CDC switching frequency | CDC–${f}_{\mathrm{sw}}^{\mathrm{c}}$ | ≈1 mHz |

Total energy stored in the batteries | E_{batt} | 1 MWh |

^{†}MCS standards [34].

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**MDPI and ACS Style**

Balachandran, A.; Jonsson, T.; Eriksson, L.
DC Charging Capabilities of Battery-Integrated Modular Multilevel Converters Based on Maximum Tractive Power. *Electricity* **2023**, *4*, 62-77.
https://doi.org/10.3390/electricity4010005

**AMA Style**

Balachandran A, Jonsson T, Eriksson L.
DC Charging Capabilities of Battery-Integrated Modular Multilevel Converters Based on Maximum Tractive Power. *Electricity*. 2023; 4(1):62-77.
https://doi.org/10.3390/electricity4010005

**Chicago/Turabian Style**

Balachandran, Arvind, Tomas Jonsson, and Lars Eriksson.
2023. "DC Charging Capabilities of Battery-Integrated Modular Multilevel Converters Based on Maximum Tractive Power" *Electricity* 4, no. 1: 62-77.
https://doi.org/10.3390/electricity4010005