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Article

Software-Defined Visible Light Communication for Internet of Things: A Low-Complexity Approach

Graduate School of Information Science and Electrical Engineering, Kyushu University, Fukuoka 819-0395, Japan
Telecom 2025, 6(2), 31; https://doi.org/10.3390/telecom6020031
Submission received: 2 April 2025 / Revised: 15 May 2025 / Accepted: 16 May 2025 / Published: 19 May 2025

Abstract

:
This work presents a software-defined visible light communication (SD-VLC) system that integrates carrierless amplitude and phase (CAP) modulation with an adaptive sign-data least mean squares (SDLMS) equalizer. The proposed solution is designed to address key challenges in VLC systems, such as LED bandwidth constraints, inter-symbol interference, and nonlinear distortions, and leverages the PYNQ platform to offer a flexible, reconfigurable, and cost-effective communication architecture tailored for IoT applications. Simulation results demonstrate that CAP modulation not only delivers high spectral efficiency but also inherently mitigates issues such as IQ imbalance and phase noise, thereby reducing hardware complexity. Moreover, the adaptive SDLMS equalizer significantly improves performance in multipath fading environments and reduces the bit error rate by approximately two orders of magnitude. These results underscore the potential of the proposed SD-VLC system to achieve low-cost and highly flexible wireless communication.

1. Introduction

As the demand for wireless data continues to grow, existing spectrum resources are under immense pressure. The urgent need for new spectral resources has become evident to keep up with this trend. In this context, visible light communication (VLC) technology has emerged as a promising solution to address the spectrum shortage [1,2,3,4,5,6]. VLC uses light-emitting diode (LED) lights for data transmission, making it particularly suitable for the upcoming ubiquitous computing and Internet of Things (IoT) ecosystems [7,8,9]. Although the visible light spectrum provides a wide bandwidth ranging from 400 to 800 THz, the inherent physical limitations of LED modulation bandwidth significantly constrain the potential for improving data transmission rates. As a result, despite its theoretical bandwidth advantage, the practical performance of VLC remains limited by hardware constraints. The primary objective of indoor VLC is to meet lighting requirements. Consequently, LEDs used in VLC systems typically have a much wider half-power angle compared to conventional optical wireless communication systems [10,11]. This wider half-power angle significantly increases the energy received by the receiver through the diffuse channel. Additionally, reflections from walls further enhance this effect. However, this also considerably increases inter-channel interference, which negatively impacts system performance.
In the era of ubiquitous connectivity, traditional VLC systems, which rely on fixed hardware architectures, lack flexibility and cannot accommodate the diverse application scenarios of the IoT. The integration of VLC and IoT offers a promising solution for high-speed, energy-efficient, and interference-free wireless communication. Software-defined VLC (SD-VLC) introduces a highly programmable communication platform that enables dynamic, software-based adjustments of modulation schemes, bandwidth allocation, and equalization algorithms without the need to modify the underlying hardware. This flexibility is particularly crucial for heterogeneous IoT environments, where devices exhibit significant variations in data rates, latency, and power consumption requirements. Furthermore, SD-VLC significantly reduces the deployment and maintenance costs of IoT networks by allowing communication protocols to be optimized through software updates, eliminating the need for costly hardware upgrades. By offering a flexible, adaptive, and cost-effective VLC-based communication solution, SD-VLC lays a solid foundation for the development of scalable, intelligent, and energy-efficient wireless ecosystems.
To fully leverage the advantages of SD-VLC, it is essential to adopt modulation and equalization techniques that align with the software-defined paradigm. Traditional analog-based approaches often rely on fixed circuit implementations, limiting their adaptability to dynamic channel conditions and diverse application scenarios. In contrast, digital modulation schemes provide greater flexibility, enabling software-based implementation and real-time reconfiguration. These digital methods reduce hardware complexity while maintaining high spectral efficiency, making them particularly suitable for software-defined optical communication systems. Similarly, adaptive equalization plays a crucial role in mitigating channel impairments in VLC, particularly in multipath fading environments. Digital equalization techniques, implemented within an SD-VLC framework, offer computationally efficient solutions for dynamically compensating signal distortions. By continuously adjusting equalization parameters through software-defined updates, the receiver can enhance its resilience against varying channel conditions. The combination of digital modulation and software-defined equalization enables a fully reconfigurable VLC system, improving adaptability, robustness, and overall system performance, while also facilitating seamless integration into IoT and next-generation wireless networks.
To address the challenges of implementing flexible and adaptive VLC systems, this work proposes an SD-VLC solution based on the PYNQ platform, an open-source framework that enables rapid prototyping of adaptive computing systems using Python in combination with programmable logic and microprocessors [12,13,14]. The proposed system achieves low complexity and real-time reconfigurability, making it suitable for diverse IoT deployment scenarios. By employing carrierless amplitude and phase (CAP) modulation, the system effectively reduces hardware complexity and eliminates IQ imbalance, while preserving high spectral efficiency under the constraints of intensity modulation and direct detection (IM/DD). In addition, an adaptive equalizer based on the sign-data least mean squares (SDLMS) algorithm [15] is integrated to dynamically mitigate inter-symbol interference (ISI) and nonlinear distortions, with significantly lower computational overhead compared to conventional LMS approaches. Extensive simulation results under both additive white Gaussian noise (AWGN) and multipath channel conditions demonstrate that the proposed approach can reduce the bit error rate (BER) by nearly two orders of magnitude, validating its effectiveness and robustness for resource-constrained VLC-based IoT applications. While existing SD-VLC studies have explored various modulation and equalization techniques, this work distinguishes itself by combining CAP modulation and SDLMS equalization in a fully reconfigurable system optimized for IoT scenarios. Instead of proposing entirely new algorithms, we focus on tailoring and integrating computationally efficient techniques into a hardware–software co-design framework using the PYNQ platform. This approach offers a practical balance between performance and complexity, demonstrating significant BER improvements while maintaining low power consumption—making it especially suitable for resource-constrained VLC-based IoT deployments. The main contributions of this work are summarized as follows:
  • An SD-VLC system is proposed on the PYNQ platform, enabling reconfigurability and low complexity suitable for IoT scenarios.
  • CAP modulation is employed to simplify hardware design while maintaining high spectral efficiency under IM/DD constraints.
  • A lightweight adaptive equalizer based on the SDLMS algorithm is integrated to enhance signal quality with minimal computational overhead.
The rest of this paper is structured as follows. Section 2 outlines the overall system architecture and discusses its applicability to IoT scenarios. Section 3 focuses on the baseband signal processing techniques, with particular attention to the design and modeling of CAP modulation and SDLMS-based equalization. In Section 4, we detail the simulation setup and evaluate system performance under different channel conditions. Finally, Section 5 summarizes the main findings and discusses potential directions for future work.

2. Architecture of SD-VLC System for IoT Applications

In VLC systems, modulation methods used in coherent wireless optical communication, such as optical phase modulation, cannot be directly applied because the transmitting source primarily uses LED lighting devices, whose emitted light is incoherent. Coherent modulation relies on a stable phase of the light wave, whereas the light emitted by LEDs is broadband, extended, and lacks a fixed phase relationship, making it impossible to directly apply modulation methods based on coherent detection (e.g., QAM, PSK) in the optical domain of VLC. Additionally, the receiver typically uses photodiodes for direct detection, while coherent detection usually requires a local oscillating light source and interferometry. Therefore, VLC primarily adopts IM/DD to accommodate the non-coherent characteristics of LEDs and to meet the illumination requirements. Moreover, the modulation signal in VLC must avoid flicker, and its modulation frequency typically falls within the kHz to MHz range, which is much higher than the critical flicker frequency of the human eye (approximately 100 Hz), ensuring that the emitted signal adheres to the real-valued, unipolar, and non-negative constraints.
Since VLC uses IM/DD for optical signal transmission, its modulation mainly relies on the variation of the luminous intensity of LEDs. However, the modulation bandwidth of LEDs is limited by factors such as carrier recombination time, the resistive–capacitive (RC) effects arising from the LED’s internal resistance and junction capacitance, and packaging materials, with a typical bandwidth usually in the range of 100 MHz, which is much lower than the GHz bandwidth of RF communication [16,17]. Therefore, to achieve high data rate transmission within the limited bandwidth, modulation techniques with high spectral efficiency, such as orthogonal frequency division multiplexing (OFDM) [18], need to be adopted in the electrical domain. These techniques optimize the spectral efficiency of the signal, enabling VLC to carry information more efficiently and meeting the needs of diverse applications, such as smart lighting, IoT device interconnection, and indoor positioning. Building on this, SD-VLC enables the system to adaptively select modulation methods, optimize resource allocation, and dynamically adjust signal processing strategies according to different IoT application scenarios through a flexible software control architecture to enhance communication performance. Figure 1 illustrates the application of SD-VLC in IoT scenarios, including key areas such as smart lighting, vehicle-to-vehicle, and industrial automation.
The SD-VLC architecture depicted in Figure 1 integrates software-controlled signal processing with programmable hardware for flexible and efficient VLC-enabled IoT applications. This system is implemented on the ZYNQ platform, leveraging the PYNQ framework, where the processing system (PS), running ARM/Linux, supports network applications, while the programmable logic (PL), based on a high-speed FPGA, ensures flexibility and real-time communication adaptability. A critical component of this system is the analog front-end (AFE), which enables both illumination and communication and is analyzed in detail with respect to its design and impact on VLC performance [19]. Meanwhile, the digital front-end (DFE) module serves as a bridge between the digital and analog domains. However, it is important to note that the digital down converter (DDC) and digital up converter (DUC) in this work do not perform traditional spectral shifting to intermediate frequency (IF) or radio frequency (RF), as seen in conventional software-defined radio (SDR) systems. Instead, their primary function is to ensure that the transmitted signal satisfies the real-valued, unipolar, and non-negative constraints required by VLC. The choice of the PYNQ platform is motivated by its integration of a processor and programmable logic on a single chip, enabling efficient hardware implementation of digital baseband functions, such as modulation and equalization, while maintaining flexibility through software-defined control. This architecture simplifies development and reduces overhead compared to conventional SDR setups that require separate computing and radio hardware. PYNQ thus offers a practical balance between hardware efficiency and reconfigurability, making it particularly suitable for SD-VLC systems in IoT environments.
The baseband processing (BBP) unit, as illustrated in Figure 2, is the key aspect of this study, and the following sections will explore low-complexity modulation and equalization techniques, which are critical for optimizing VLC system performance. The transmitter (Tx) path consists of channel coding followed by CAP modulation, generating the transmitted signal s m from the input bit sequence b m . The receiver (Rx) path includes CAP demodulation and an equalization stage based on the SDLMS algorithm, processing the received signal r n to recover the original bit sequence b n .

3. Modeling of BBP Unit in SD-VLC System

In this section, we first analyze the performance of CAP modulation, which is used to achieve high spectral efficiency and efficient baseband signal transmission in VLC systems. This is followed by an evaluation of SDLMS equalization, which helps mitigate ISI and improve signal recovery.

3.1. Performance Analysis of CAP Modulation

Figure 3 illustrates the CAP modulation and demodulation process in a VLC system. The Tx path begins with QAM mapping, followed by an interpolation stage ( k ), which increases the sampling rate. The complex signal is then separated into real and imaginary components, which are passed through orthogonal waveform filters: the in-phase filter ( h I ( t ) ) and the quadrature filter ( h Q ( T t ) ). The outputs are combined to form the transmitted CAP signal. At the Rx path, the received signal undergoes matched filtering using the in-phase ( h I ( t ) ) and quadrature ( h Q ( Q t ) ) filters, ensuring optimal signal recovery. The filtered signals are recombined into a complex signal, which is then downsampled ( k ) and QAM-demapped to reconstruct the original bitstream { b n } . This structure ensures efficient spectral utilization and robustness against channel impairments, making CAP a suitable modulation scheme for VLC systems.
CAP modulation offers an efficient way to encode data in two-dimensional signal space without relying on a conventional local oscillator. Instead, it employs two orthogonal signature waveform filters, h I ( t ) and h Q ( t ) , which modulate the signal in separate quadrature components. This design not only improves spectral efficiency but also eliminates IQ imbalance issues commonly encountered in traditional IQ modulation schemes, making CAP particularly suitable for VLC systems operating under IM/DD constraints. At the transmitter, these orthogonal filters shape the signal before transmission; at the receiver, matched complementary filters recover the original data with minimal inter-component interference. The impulse responses of the two orthogonal filters are expressed as follows:
h I ( t ) = g ( t ) cos ( 2 π f c t ) h Q ( t ) = g ( t ) sin ( 2 π f c t ) .
Here, g ( t ) represents the raised cosine filter (RCF), which is used to shape the waveform of the baseband signal and is crucial for minimizing ISI. The modulation frequency f c must be higher than the highest baseband frequency, ensuring effective separation of the orthogonal components in the passband signal. By carefully tuning the rolloff factor (R) and symbol period (T) of g ( t ) , CAP modulation balances bandwidth efficiency and robustness to channel impairments.
g ( t ) = sin ( π t / T ) π t / T · cos ( π R t / T ) 1 4 R 2 t 2 / T 2 .
Both the transmitter and the receiver are made in the digital domain. The transmitter’s signature filters are designed as fixed finite-impulse response (FIR) filters. CAP differs from QAM in utilizing a square-root RCF for pulse shaping and performing frequency up-conversion in two consecutive steps to create a passband signal centered around the designated carrier frequency. CAP is executed using two FIR filters in a single step, as shown in Figure 4. In this process, the input symbol sequences are up-sampled to align with the FIR filter’s sampling rate, whereas the signal received by the detector is down-sampled to match the filters h I ( T t ) and h Q ( T t ) in accordance with the original symbol rate. The receiver employs inverse filtering, followed by the application of a digital FIR filter in the baseband domain to mitigate ISI in frequency-selective channels.
In SD-VLC systems, CAP modulation was proposed as an alternative to QAM modulation [20,21]. One of the key advantages of CAP over QAM is that it inherently avoids IQ imbalance, which is a common issue in analog QAM systems due to the nonlinearity of analog components. IQ imbalance introduces distortions, such as DC offset, amplitude mismatch, and phase shift, leading to constellation stretching, translation, or rotation. These distortions degrade signal integrity and require additional IQ imbalance compensation in QAM-based systems. Unlike QAM, CAP utilizes orthogonal filters instead of IQ carriers to perform baseband frequency shifting, eliminating the need for precise phase and amplitude matching of IQ components. Moreover, by introducing multi-dimensional orthogonal filters [22,23], CAP enables a significant improvement in spectral efficiency, making it a more efficient modulation scheme for SD-VLC systems. Given these advantages, CAP modulation is a promising alternative to analog QAM, providing both robustness against IQ imbalance and enhanced spectral utilization in VLC applications.
In SD-VLC systems, digital LO-based QAM and CAP modulation eliminate the need for analog components, improving flexibility and robustness. Digital QAM, implemented via a numerically controlled oscillator (NCO), requires IQ mixing, carrier recovery, and phase synchronization, increasing computational complexity. CAP, on the other hand, replaces explicit carrier modulation with FIR-based orthogonal filtering, reducing the number of multiplications and simplifying DSP implementation. Compared to QAM in Table 1, both approaches improve stability while offering comparable spectral efficiency. CAP further eliminates IQ imbalance and phase noise issues, making it a more hardware-efficient choice for SD-VLC applications.

3.2. Performance Analysis of SDLMS Equalization

One of the key challenges in VLC systems is mitigating ISI and channel distortions caused by LED bandwidth limitations, multipath effects, and signal impairments introduced by IM/DD transmission. Traditional analog pre-distortion techniques are often used to compensate for LED nonlinearity by applying an inverse response function to the input signal, thereby improving linearity and extending the effective modulation bandwidth [24,25,26,27,28]. However, these analog solutions suffer from implementation complexity, including the need for precision analog circuit design, manual tuning of resistive and capacitive components, sensitivity to temperature and process variations, and limited reconfigurability. Such characteristics hinder scalability and adaptability, especially in IoT environments requiring frequent reconfiguration. To overcome these limitations, SD-VLC leverages digital signal processing techniques, particularly LMS-based adaptive equalization, which provides real-time adaptability, low computational complexity, and robustness against hardware-induced distortions [29]. Unlike analog pre-distortion, digital equalization dynamically adjusts filter coefficients based on the received signal, allowing it to effectively mitigate residual ISI and signal degradation without requiring precise LED characterization [30].
Figure 5 illustrates a schematic of an SDLMS equalizer, which is a variation of the LMS algorithm. For an SDLMS equalizer, only the signs of the input data are used for weight updates, reducing computational complexity. The input signal x (at a rate of symbol-spaced 1 / T ) enters a tapped delay line, which consists of a series of delay elements, producing delayed versions of the signal u 1 , u 2 , , u L . These delayed samples are then multiplied by a set of adaptive weights ( w 1 , w 2 , , w L ) and summed to generate the equalized output signal y.
If the training mode is enabled, a reference signal d is used for supervised learning. The error calculation block computes the difference e between y and d, and this error signal is fed into an adaptive algorithm that dynamically updates the weights to minimize ISI and channel distortions. The LMS equalizer operates by iteratively adjusting its filter coefficients using a gradient descent approach, ensuring that the equalized output closely approximates the desired signal. The equalizer weight vector of the LMS algorithm is given by
w ( n ) = α w ( n 1 ) + μ e ( n ) sign [ u ( n ) ] , ( 0 α 1 )
where μ is the step size controlling the adaptation speed. The given formula is designed for dynamically updating the adaptive equalizer weights in order to minimize the error e and optimize equalization performance. This process relies on an adaptive learning mechanism that continuously adjusts the equalizer coefficients based on the observed error between the desired signal d and the actual output y. When the equalized output deviates significantly from the desired value, the adaptive algorithm modifies the weight coefficients to reduce this discrepancy. The adjustment direction is determined by the sign of the error, where a positive error increases the weight, thereby amplifying the corresponding signal component, while a negative error decreases the weight to reduce its influence. This sign-based update rule ensures that the system effectively mitigates ISI and channel distortions by dynamically compensating for variations in the received signal. Over time, the weights gradually converge to optimal values, allowing the equalizer to adapt to changing channel conditions with minimal computational complexity. Compared to conventional LMS algorithms, which rely on full error magnitude for weight updates, the SDLMS approach simplifies computation by only considering the error direction, making it more suitable for hardware-efficient implementations such as VLC and wireless communication systems. This balance between computational efficiency and real-time adaptability enables SDLMS to enhance signal integrity while maintaining low implementation complexity, making it an ideal choice for bandwidth-limited and noise-sensitive environments.
Figure 6 illustrates the performance analysis of SDLMS equalization under different step sizes ( μ ). Part (a) represents the original input signal, while part (b) shows the input signal corrupted by noise, demonstrating the impact of channel distortions and noise interference. As the step size μ increases, the equalization process converges more rapidly, effectively mitigating noise and channel-induced distortions in fewer iterations. However, this accelerated convergence also introduces larger fluctuations in the step error, leading to increased variations in weight updates and potential instability in the steady-state solution. For a small step size ( μ = 0.01 ), part (c) shows relatively small but stable step error fluctuations, part (d) presents the equalized output gradually recovering the sinusoidal waveform, and part (e) depicts the remaining difference between the equalized and original signals, showing minimal residual distortion. In contrast, for μ = 0.1 , part (f) reveals a more noticeable increase in step error fluctuations, part (g) displays an equalized output that more closely aligns with the original signal, and part (h) further illustrates a reduction in the difference between the equalized and original signals, indicating improved performance. When μ = 0.5 ; however, part (i) demonstrates significant fluctuations in step error, suggesting that the equalizer adapts much faster but at the expense of greater instability, part (j) shows that while the equalized output rapidly aligns with the original signal, transient deviations remain prominent, and part (k) indicates that the residual error between the equalized and original signals is still relatively high. These findings underscore the critical role of step size selection in SDLMS equalization, highlighting the trade-off between convergence speed and steady-state error. Achieving an optimal balance in μ is essential to ensure robust performance in VLC systems, where dynamic channel conditions necessitate efficient and stable adaptive equalization.
Among various adaptive equalization techniques, the LMS algorithm offers efficient ISI suppression with relatively fast convergence, making it suitable for high-speed VLC applications. However, the computational complexity of LMS, primarily due to the requirement for multiplications in the weight update process, limits its feasibility in low-power and embedded VLC systems. To address this issue, the SDLMS algorithm provides a simplified alternative by replacing full-value multiplications with sign-based updates, significantly reducing computational overhead. Although SDLMS achieves lower power consumption and improved robustness against LED nonlinearities, it exhibits slower convergence and a slightly higher residual error compared to LMS. The quantitative comparison in Table 2 indicates that LMS achieves faster BER and MSE convergence under comparable equalization performance, whereas SDLMS offers significantly lower computational complexity, making it more suitable for hardware-constrained VLC applications such as IoT devices. These findings highlight the trade-off between computational efficiency and equalization performance, emphasizing the importance of selecting an appropriate algorithm based on the system’s power constraints and accuracy requirements.

4. Modeling of CAP16 Modulator and SDLMS Equalizer for SD-VLC System

We construct a simplified end-to-end simulation model to evaluate the proposed SD-VLC system. The Tx consists of a PRBS generator and a CAP16 modulator. The signal propagates through both AWGN and multipath channels, where the latter includes one dominant line-of-sight (LOS) path and several delayed non-LOS components, forming a Rician-like fading model. At the Rx, the CAP16 demodulator processes the signal, followed by an SDLMS equalizer to suppress ISI and nonlinear distortion. System performance is evaluated in terms of BER, which reflects transmission reliability, and mean square error, which characterizes the equalizer’s convergence behavior. Simulations are carried out under varying SNR conditions, with different step sizes and tap lengths, to evaluate both transmission reliability and equalizer convergence behavior.
Figure 7 illustrates the error estimation with the SDLMS algorithm. The SDLMS algorithm maintains stability even with slower convergence, ensuring effective adaptation to varying signal conditions. The step size μ in SDLMS equalization plays a central role in determining both the convergence speed and steady-state performance. According to adaptive filter theory, a larger μ accelerates convergence but may lead to greater residual error and even instability, whereas a smaller μ improves stability and reduces the error floor at the cost of slower adaptation. The result illustrates the evolution of the error for different step sizes. As μ increases from 0.01 to 0.05, the algorithm converges faster, but the steady-state error fluctuations also become more pronounced, consistent with the theoretical trade-off. For VLC systems, where channel conditions fluctuate, SDLMS’s ability to maintain stability while adapting to the signal makes it ideal for resource-constrained applications. Therefore, selecting the right step size is essential for ensuring both efficient performance and robust equalization.
Figure 8 shows the BER performance of the VLC system employing a CAP16 modulator and an SDLMS equalizer. The results indicate that employing a 6-tap SDLMS equalizer significantly improves link performance compared to the case without equalization, where the multipath effects render the received signal almost entirely unrecognizable. The use of SDLMS decreases the BER by approximately two orders of magnitude in the multipath channel. In the inset, a scatter plot at an SNR of 10 dB illustrates the received constellation after equalization. With equalization, the constellation points are noticeably clustered closer to their ideal positions, demonstrating that the adaptive equalizer effectively mitigates ISI and recovers the transmitted symbols. These results underscore the importance of adaptive equalization in CAP-based VLC systems, especially under challenging channel conditions where multipath effects and channel distortions can severely degrade performance. In the multipath channel, the BER curve exhibits slight fluctuations beyond 8 dB. This is attributed to residual ISI becoming the dominant error source as noise diminishes, especially when the SDLMS equalizer has limited taps or fixed step size, preventing full compensation of the channel dispersion.

5. Conclusions

This work has introduced an innovative SD-VLC system that combines CAP modulation and adaptive SDLMS equalization to overcome the inherent limitations of LED-based VLC systems, including limited modulation bandwidth, ISI, and nonlinear distortions. By implementing the system on the PYNQ platform, we have demonstrated a flexible and scalable solution suitable for diverse IoT applications. Simulation results show that, in multipath environments, the proposed equalization approach improves BER performance by nearly two orders of magnitude compared to the uncompensated case, where multipath effects render the received signal almost entirely unrecognizable. These promising results validate the effectiveness of our approach and highlight its potential for achieving energy-efficient and robust VLC in dynamic channel conditions.
Furthermore, addressing challenges such as ambient light interference and ensuring interoperability with established IoT protocols is essential for translating SD-VLC from simulations to real-world applications, representing a valuable direction for continued exploration. In terms of practical deployment, hardware cost and energy consumption are critical factors for commercialization. In the proposed system, CAP modulation eliminates the need for digital carrier generation and IQ mixing, while the SDLMS equalizer simplifies adaptive processing by using only sign operations for weight updates. Specifically, these choices reduce the use of multipliers and logic resources in FPGA or embedded platforms, thereby lowering power consumption and hardware complexity. As a result, the system is particularly appropriate for VLC-based IoT applications, where low cost and energy efficiency are often prioritized. Building on the current signal processing framework, future extensions of this work will aim to address practical deployment issues, including ambient light interference, nonlinear behavior of LEDs, and the complexity of hardware implementation, which are critical for realizing robust SD-VLC systems in real-world IoT applications.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

All data supporting the findings of this study are already included within this article.

Conflicts of Interest

The author declares no conflicts of interest.

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Figure 1. Conceptual diagram of the proposed SD-VLC system for IoT applications.
Figure 1. Conceptual diagram of the proposed SD-VLC system for IoT applications.
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Figure 2. Block diagram of the BBP unit for the proposed SD-VLC system.
Figure 2. Block diagram of the BBP unit for the proposed SD-VLC system.
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Figure 3. Block diagram of the CAP modulation and demodulation process.
Figure 3. Block diagram of the CAP modulation and demodulation process.
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Figure 4. An illustrative example of (a) the frequency response and (b) the impulse responses of the in-phase filter h I ( t ) and quadrature filter h Q ( t ) used in a CAP modulator, with f c = 2 MHz , symbol period = 1.3 μ s , roll-off factor = 0.3 , 8 samples per symbol, and a filter span of 4 symbols.
Figure 4. An illustrative example of (a) the frequency response and (b) the impulse responses of the in-phase filter h I ( t ) and quadrature filter h Q ( t ) used in a CAP modulator, with f c = 2 MHz , symbol period = 1.3 μ s , roll-off factor = 0.3 , 8 samples per symbol, and a filter span of 4 symbols.
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Figure 5. Block diagram of the adaptive SDLMS equalizer.
Figure 5. Block diagram of the adaptive SDLMS equalizer.
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Figure 6. Performance analysis of SDLMS equalization under different step sizes ( μ ). Sub-figures (a,b) show the original input signal and the input signal with noise, respectively. The results for μ = 0.01 , 0.1 , 0.5 are presented in (ck), where (c,f,i) illustrate the step error; (d,g,j) show the equalized output; and (e,h,k) depict the difference between the equalized and original signals. As μ increases, the equalization process converges faster, while the fluctuations in step error become more pronounced.
Figure 6. Performance analysis of SDLMS equalization under different step sizes ( μ ). Sub-figures (a,b) show the original input signal and the input signal with noise, respectively. The results for μ = 0.01 , 0.1 , 0.5 are presented in (ck), where (c,f,i) illustrate the step error; (d,g,j) show the equalized output; and (e,h,k) depict the difference between the equalized and original signals. As μ increases, the equalization process converges faster, while the fluctuations in step error become more pronounced.
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Figure 7. The error of the SDLMS equalizer with different step sizes μ . (a) μ = 0.01 . (b) μ = 0.05 .
Figure 7. The error of the SDLMS equalizer with different step sizes μ . (a) μ = 0.01 . (b) μ = 0.05 .
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Figure 8. The BER performance with CAP16 modulation and SDLMS equalization comparison between AWGN and multipath channels over a range of SNR values, with an inset showing the received constellation diagram at a high SNR of 10 dB.
Figure 8. The BER performance with CAP16 modulation and SDLMS equalization comparison between AWGN and multipath channels over a range of SNR values, with an inset showing the received constellation diagram at a high SNR of 10 dB.
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Table 1. Comparison of QAM and CAP in VLC systems.
Table 1. Comparison of QAM and CAP in VLC systems.
QAMCAP
Carrier GenerationDigital NCONo carrier needed
Computational ComplexityHigh (IQ mixing + phase tracking)Lower (FIR-based filtering)
Hardware ComplexityModerate (NCO + multipliers)Low (FIR filters only)
IQ ImbalancePresent (sensitive to errors)None (no IQ separation)
Phase Noise SensitivityModerate (requires phase tracking)None (no explicit carrier)
Spectral EfficiencyComparable to CAPComparable to QAM
Suitability for IoT VLCFlexibleSimple
Table 2. Quantitative comparison of LMS and SDLMS equalization in VLC systems.
Table 2. Quantitative comparison of LMS and SDLMS equalization in VLC systems.
LMSSDLMS
Computational Complexity O ( N ) (Multiplications + Additions) O ( 1 ) (Only Additions)
Multiplications per Iteration N + 1 0
Additions per IterationNN
Convergence SpeedRapidSlower
MSE ReductionRapidSlower
Power ConsumptionHighLow
Suitability for IoT VLCHigh Processing DemandLow-Power Applications
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Che, M. Software-Defined Visible Light Communication for Internet of Things: A Low-Complexity Approach. Telecom 2025, 6, 31. https://doi.org/10.3390/telecom6020031

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Che M. Software-Defined Visible Light Communication for Internet of Things: A Low-Complexity Approach. Telecom. 2025; 6(2):31. https://doi.org/10.3390/telecom6020031

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Che, Ming. 2025. "Software-Defined Visible Light Communication for Internet of Things: A Low-Complexity Approach" Telecom 6, no. 2: 31. https://doi.org/10.3390/telecom6020031

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Che, M. (2025). Software-Defined Visible Light Communication for Internet of Things: A Low-Complexity Approach. Telecom, 6(2), 31. https://doi.org/10.3390/telecom6020031

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