Low-Offset In-Plane Sensitive Hall Arrangement ^†

Abstract

A novel in-plane sensitive Hall arrangement consisting of two identical n-Si three-contact (3C) elements and realized in a common technological process, is presented. In the solution, the minimization of the offset and its temperature drift is achieved by cross-coupling of the outer device contacts. This terminals’ connection provides equalizing currents between the two substrates which strongly compensate the inevitable difference in the electrical conditions in the two parts of the arrangement. As a result, the residual offset of both integrated Hall elements at the output V_out(0) and its temperature drift are strongly minimized. The residual offset is about 160 times smaller than the single-configuration one. The obtained output voltage-to-residual offset ratio at sensitivity of S_RI ≈ 98 V/AT is very promising, reaching 6 × 10³ at temperature T = 40 °C and induction 1 T. As a result, increased metrological accuracy for numerous applications is achieved. For a first time through the novel arrangement a suppression of sensitivity in the presence of external magnetic field could be achieved in order to obtain permanent offset information. This is one of the key results in the Hall device investigation.

1. Introduction

Offset is an enormous disadvantage of Hall effect devices with differential output measured in the absence of a magnetic-field only. This drawback changes the sensor’s output in an unpredictable way. The most probable reasons for the occurrence of the offset are: the electrical asymmetry (resulting from geometrical errors in the masks’ positioning in the technological production process) caused by the geometry in the location of the peripheral contacts with respect to the central one, the inevitable structure damages and imperfections of the silicon substrates, the mechanical and temperature stress and strain (caused most often by the chip’s capsulation) and more, [1,2,3,4,5]. This problem is crucial in many areas of sensor applications, like robotics, mechatronics, navigation, contactless automation, position sensors, angular displacement detection, automobile industry including ABS systems. For example, the 3C, 4C, 5C and 6C in-plane sensitive Hall devices have relatively high offset, larger than the offset of the orthogonal Hall plates, alongside with substantial temperature drift. These defects seriously impede measurement accuracy. The most common solutions removing these problems are very complicated and costly—for example, dynamic offset cancelation by various current spinning techniques. Such approach does not match the ordinary Hall element and its transduction principle. This paper suggests a novel simple, but sufficiently effective in-plane sensitive silicon Hall arrangement, ensuring low offset and low temperature drift.

2. Sensor Layout and Operation Principle

The novel Hall configuration consists of two identical n-Si substrates, parallel to one another, Figure 1. On the top surface of each of the structures, three identical rectangular n⁺-n contacts are formed—C₁, C₂, C₃ and C₄, C₅, C₆, respectively, Figure 1 and Figure 2. The supply source ES is connected to both middle contacts C₂ and C₅.

The differential output V_out(B) of the Hall arrangement is between contacts C₁ and C₃ (or C₄ and C₆). The measured magnetic field B is parallel to the long sides of the contacts. When power supply Es is fed, by cross-coupling of the outer contacts C₁–C₆ and C₃–C₄, in the substrate bulks, two equal and opposite currents I_C2 and −I_C5 start to flow, I_C2 = |−I_C5| ≡ I_s, Figure 1.

The experimental prototype has been fabricated using part of the processing steps applied in bipolar IC technology. The resistivity of the n-Si substrate is ρ ≈ 7.5 Ω.cm (n0 ≈ 4 × 10¹⁵ cm⁻³). Similarly to [6], four masks are used. The size of contacts C₁ … C₆ is 50 × 10 μm², the distance between the central and the outer contacts is 25 μm and the width of the р-ring on the chip surface is about 30 μm. The penetration of the current trajectories into the n-Si substrates reaches a depth of 30–40 μm. The operational volume of the device is about 100 × 70 × 40 μm³ [7].

The action of the in-plane Hall arrangement is the following. When the two central contacts C₂ and C₅ are connected to supply ES, in the bulk of the two substrates, two opposite-direction and equal-value current components, I_C2,1 and −I_C2,3, I_C5,4 and −I_C5,6, respectively, flow. The planar central contacts C₂ and C₅, as well as the outer contacts C₁ and C₃, and C₄ and C₆ respectively, form equipotential planes where, in the absence of magnetic field, В = 0, the currents flowing through them are always perpendicular to the upper side of the chip. The current lines penetrate deep into their volumes. The depth at fixed concentration of the dopant donors N_D in the substrates depends on the ratio between the width of the central contacts and the distance between them and the outer electrodes. The maximal value of the depth in n-Si at N_D ≈ 10¹⁵ cm⁻³ constitutes about 40 μm. Therefore, the trajectories of the carriers are curvilinear, [1,2,3]. In the general case, at the output V_out(0), in the absence of magnetic field, В = 0, parasitic output offset V_out(0) ≠ 0 is available, which is not related with metrology. In the proposed solution, Figure 1, the minimization and/or removal of the offset is achieved by the direct connection of contacts C₁ and C₆, and C₃ and C₄, respectively. This short-circuit results in the flowing of compensation equalizing currents between the two identical Hall structures in the absence of magnetic field, В = 0.

The application of the measured magnetic field В ≠ 0 in parallel to the long sides of the contacts results in lateral deflection of the current lines along the entire length of their non-linear trajectory. This is due to the action of Lorentz forces F_L,i, F_L = qV_dr × B, where q is the electron’s elementary charge, and V_dr is the vector of the mean drift velocity of the electrons in the substrates, [1,3]. Of key importance is the effect of the force F_L on the components I₂ and I₅ through the central contacts C₂ and C₅. As a result of the Lorentz deflection, the non-linear trajectories shrink and expand, respectively. For this reason, on planar contacts C₁ and C₃, and C₄ and C₆, Hall potentials V_H,C1(B) = V_H,C6(B) and −V_H,C4(B) = −V_H,C3(B) are generated simultaneously. Actually, the measured magnetic field В disturbs the electric symmetry of the current trajectories with respect to the central contacts. Therefore, on the differential output V_out(B) of the arrangement, Figure 1, Hall voltage V_H(B) ≡ V_H,C1–C3(B) arises. This signal is a linear and odd function of the strength of the supply current and the magnetic field В. On the respective outer contacts C₁–C₆ and C₃–C₄, Hall potentials with the same sign and value are generated. The solution from Figure 1 reduces drastically the offset. The configuration features yet another advantage, which is one of the key results in this investigation. If contacts C₁ and C₄, and C₃ and C₆ are connected using electronic switch, for example, then Hall potentials (Hall voltage) compensation (nulling) occurs:

V_H,C1(B) = |−VH,C4(B)| and V_H,C3(B) = |−V_H,C6(B)|.

As a result, the magnetosensitivity in the two identical configurations is lacking. The only remaining signal is the parasitic offset. In this case the output is between contacts C₁ and C₃ or C₄ and C₆. The purpose is to achieve at any time information about the negative offset in output signal, regardless the available external magnetic field. Such approach is proposed for the first time in the sensorics of Hall elements.

3. Results

The output characteristics V_out(B) of the microdevice are presented in Figure 3. The obtained relative current magnetosensitivity is S_RI ≈ 98 V/AT. The non-linearity NL does not exceed 0.6% within the range 0.5 T ÷ −0.5 T.

The temperature dependences of the single-substrate offset V_ss(0) and the residual offset V_out(0) of the arrangement, at a supply current I_s = 3 mA and field B = 0 in the temperature range – 10 ≤ T ≤ 80 °C, are shown in Figure 4. The temperature coefficient of the offset drift reaches no more than 0.1%/°C. The obtained output voltage-to-residual offset ratio, for example at T = 40 °C, reaches around 6 × 10³ at induction B = 1 T. This is a very promising result. At first approximation the residual offsets measured at field B = 0 and induction B = 0.35 T are on a straight line, Figure 5.

4. Conclusions

The new solution is a combination of innovative circuit technology and device design through which, with one supply current, high magnetosensitivity in both substrates is generated. The original connection of the outer contacts reduces substantially the inevitable parasitic offset by flowing of equalizing currents.

For the first time in the Hall effect sensors, through the new arrangement, complete suppression of magnetosensitivity in the presence of magnetic field could be achieved. This result follows from the identity of the two 3C structures and the common supply current. This allows to be obtained at any time information about the value and sign of the offset for the purpose of its extraction from the sensor’s output signal. The proposed in-plane sensitive Hall arrangement features multi-purpose industrial applicability.