Design and Performance Evaluation of a Flatness-Based Controller for a Three-Phase Three-Level NPC Shunt Active Power Filter

Abstract

The widespread adoption of nonlinear loads in industry has introduced significant power quality issues in electric power distribution grids. The integration of these nonlinear loads has led to the proliferation of serious power quality problems such as the generation of harmonics and reactive power that negatively impact the quality and stability of the electrical grid. In addition to eliminating current harmonics, a shunt active power filter (APF) can also provide reactive power compensation. By dynamically adjusting the reactive power injection, these APFs can improve the power factor of the system and maintain the desired voltage regulation. The proposed control leverages the differential flatness property of the SAPF system, allowing for exact linearization and simplified tracking control without requiring complex modulation techniques. In this paper, a flatness-based control scheme is proposed for a three-phase three-level Neutral Point Clamped (NPC) APF. The main objectives of this work are twofold. The first objective is to mitigate current harmonics and compensate the reactive power drawn by nonlinear loads. The second objective focuses on maintaining a stable DC-link capacitor voltage of the active power filter (APF). To meet these requirements, a cascaded control structure is used, where the external loop regulates the DC-link voltage, while the inner loop is responsible for harmonic current compensation. The effectiveness of the proposed control strategy is validated through simulation results obtained using the MATLAB/Simulink R2024a environment.

1. Introduction

Harmonic current is typically generated by nonlinear loads such as switch-mode power converters, variable speed motors, drives and battery chargers [1]. According to international standards and norms, power systems can tolerate a certain level of harmonics. However, the proliferation of nonlinear loads led to this current becoming dominant, hence making the electrical grid not fulfill the international standards [2]. The presence of this harmonic current in the power system results in increased power losses and hence a degradation of the system’s efficiency, damage in electrical equipment, and interferences with radio and telecom signals.

In the past, passive filters have been a common solution to mitigate harmonic current problems in power systems [3]. Passive filters are simple and low-cost solutions, but they have several disadvantages, such as the risk of resonance and bulky size. With the rapid advancements in power semiconductor device technology, active power filters (APFs) have emerged as a more effective solution for addressing current harmonics issues [4,5]. One of the most widely adopted APF topologies is the Shunt APF (SAPF), which operates by injecting compensation currents in opposition to the undesired harmonic currents. The traditional two-level Voltage Source Inverter (VSI) has been the most commonly used power converter in SAPF applications. However, the two-level VSI faces limitations, particularly in terms of the quality of the generated voltage waveforms, hence necessitating a high filtering effort and an increased filter size. To overcome the drawbacks of the two-level inverters, multilevel voltage inverters have been introduced [6,7]. Multilevel inverters can generate higher quality waveforms than their two-level counterparts. This makes them more suitable for medium and high-power applications [8]. One of the multilevel inverter topologies that has received attention from researchers for high power applications is the Neutral-Point-Clamped (NPC) inverter, which was simultaneously introduced by Baker [9] and Nabae et al. [10] in 1981. NPC inverters are characterized by low voltage stress on switching devices and offer a more cost-effective solution than the Flying Capacitor (FC) and Modular Multilevel Converter (MMC) topologies [11]. The transition from passive filters to APFs, and the adoption of multilevel inverter topologies, such as the NPC inverter, have been key advancements in addressing the growing harmonic challenges in modern power systems. In addition to the commonly cited advantages related to device voltage stress and overall cost, the selection of a three-level NPC converter is also motivated by its favorable balance between performance and implementation complexity. For the power range and harmonic compensation objectives addressed in this work, the three-level structure provides sufficiently low output distortion while maintaining high reliability and industrial maturity. Furthermore, it ensures efficient natural DC-bus midpoint balancing and exhibits lower switching losses under the adopted modulation scheme compared with other multilevel variants such as ANPC. Higher-level converters (e.g., five-level) could offer incremental performance gains, but at the expense of significantly increased control complexity, sensing requirements, computation effort, and real-time constraints. Therefore, the three-level NPC topology represents an optimal compromise for the proposed application.

On the other hand, among the most used control strategies in power electronics applications are those based on a linear approach, such as resonant controllers in the natural $abc$-frame, Proportional Integral (PI) controllers in the $dq$-frame, and sliding mode controllers. While these control strategies remain popular due to their simplicity and historical success, they suffer from many limitations such as harmonic susceptibility and parameter sensitivity [12,13]. Flatness-based control stands out among other control strategies thanks to its unique approach to handling nonlinear systems, unlike traditional methods such as Proportional Integral Derivative (PID) control [14], which rely on linear approximations and may struggle with complex nonlinear dynamics. Flatness-based control directly exploits the system’s inherent nonlinear structure, which allows for explicit trajectory planning and precise tracking without the need for linearization or gain tuning [15]. In contrast to adaptive control, which often requires robust parameter adjustments, or sliding mode control with variable switching frequency, flatness-based control offers a more straightforward and computationally efficient solution for nonlinear systems exhibiting the flatness property [16].

The modulation technique employed in this work is Space Vector Pulse Width Modulation (SVPWM) [17,18]. The SVPWM method helps to stabilize the DC-link voltage and reduce the current ripple content, further enhancing the overall system performance.

In this work, the focus is on the control of a three-phase three-level NPC APF. The proposed solution offers significant advantages in terms of effectively compensating for harmonic current. The control structure is developed using a cascaded approach with two main loops. An inner loop is designed based on the flatness control approach; this strategy is used to compensate for the harmonic current, providing excellent steady-state performance. The outer loop is implemented using a PI controller; this later is responsible for regulating the output voltage to track the desired reference.

The remainder of this paper is structured as follows. Section 2 describes the SAPF system and its mathematical modeling. Section 3 describes the development of the control strategy, and Section 4 presents simulation results demonstrating the effectiveness of the proposed controller.

2. System Overview and Dynamic Modeling

2.1. System Overview

The three-phase, three-level NPC APF system is shown in Figure 1. It is parallel connected via a smoothing inductor $\left({L_f,r}_f\right)$ with the grid and the nonlinear load consisting of an uncontrolled full-bridge rectifier feeding a DC load of type $\left(R,L\right)$.

The three-level NPC inverter has three legs, and each one has four Insulated Gate Bipolar Transistors (IGBTs): $S_{1j}$, $S_{2j}$, $S_{3j}$, and $S_{4j}$($j=a,b,c$), connected in series. The bus voltage $\left(v_1+v_2\right)$ is split by the connection of two equal series capacitors with capacitances $C_1=C_2=C$. Each leg is completed by the addition of two clamp diodes $D_{1j}$ and $D_{2j}$ providing the connection to the neutral point $\mathrm{o}$ [19].

The NPC inverter is capable of providing three distinct output voltage levels: the positive DC bus voltage $v_1$, zero-voltage, and the DC bus negative voltage ${-v}_2$. For a one phase operation, when IGBTs $S_{1j}$ and $S_{2j}$ are turned on, the output is connected to $v_1$; when $S_{2j}$ and $S_{3j}$ are turned on, the output is connected to zero; and when $S_{3j}$ and $S_{4j}$ are turned on, the output is connected to ${-v}_2$. The input signal (${\mu }_j\mathsf{ϵ}\left\{1,0,-1\right\}$) determines the state of the IGBTs ($S_{1j}$, $S_{2j}$, $S_{3j}$, and $S_{4j}$) according to

Table 1. States of ${\mu }_j$.

${\mathit{S}}_{1\mathit{j}}$	${\mathit{S}}_{2\mathit{j}}$	${\mathit{S}}_{3\mathit{j}}$	${\mathit{S}}_{4\mathit{j}}$	${\mathit{\mu }}_{\mathit{j}}$	${\mathit{v}}_{\mathit{j}}$
1	1	0	0	1	$v_1$
0	1	1	0	0	0
0	0	1	1	−1	${-v}_2$

.

2.2. System Dynamic Modeling

Using Kirchhoff’s Voltage Law (KVL), the voltages across the filter inductors in the $abc$-frame can be expressed as follows:

$$L_f{\displaystyle \frac{d}{dt}}\left(\begin{array}{c}{i}_{fa}\\ i_{fb}\\ i_{fc}\end{array}\right)=\left(\begin{array}{c}{v}_a\\ v_b\\ v_c\end{array}\right)-\left(\begin{array}{c}{v}_{ga}\\ v_{gb}\\ v_{gc}\end{array}\right)-r_f\left(\begin{array}{c}{i}_{fa}\\ i_{fb}\\ i_{fc}\end{array}\right)$$

(1)

The voltage vector ${\left(\begin{array}{ccc}{v}_a& v_b& v_c\end{array}\right)}^T$ provided by the NPC inverter can be expressed by:

$$\left(\begin{array}{c}{v}_a\\ v_b\\ v_c\end{array}\right)={\displaystyle \frac{1}{6}}\left(\begin{array}{ccc}2& -1& -1\\ -1& 2& -1\\ -1& -1& 2\end{array}\right)\left(\left(\begin{array}{c}{\mu }_a\\ {\mu }_b\\ {\mu }_c\end{array}\right)v_s+\left(\begin{array}{c}{{\mu }_a}^2\\ {{\mu }_b}^2\\ {{\mu }_c}^2\end{array}\right)v_d\right)$$

(2)

where $v_s=v_1+v_2$ and $v_d={v_1-v}_2.$ The grid voltages are considered balanced and sinusoidal, hence the grid voltage vector can be expressed as follows:

$$v_g\left(t\right)=E_g\left(\begin{array}{c}\mathrm{s}\mathrm{i}\mathrm{n}\left({\omega }_{g}t\right)\\ \mathrm{s}\mathrm{i}\mathrm{n}\left({\omega }_{g}t-{\displaystyle \frac{2\pi }{3}}\right)\\ \mathrm{s}\mathrm{i}\mathrm{n}\left({\omega }_{g}t-{\displaystyle \frac{4\pi }{3}}\right)\end{array}\right)$$

(3)

where $E_g$ and ${\omega }_g$ represent the amplitude and angular frequency of the three-phase power grid, respectively.

According to Kirchhoff’s Current Law (KCL), the DC-link voltages dynamics are described by:

$$C{\displaystyle \frac{d}{dt}}\left(\begin{array}{c}{v}_1\\ v_2\end{array}\right)=-\left(\begin{array}{ccc}{\mu }_a+{{\mathrm{\mu }}_a}^2& {\mu }_b+{{\mathrm{\mu }}_b}^2& {\mu }_c+{{\mathrm{\mu }}_c}^2\\ {\mu }_a-{{\mathrm{\mu }}_a}^2& {\mu }_b-{{\mathrm{\mu }}_b}^2& {\mu }_c-{{\mathrm{\mu }}_c}^2\end{array}\right){\displaystyle \frac{i_f}{2}}$$

(4)

where $i_f\hspace{0.17em}={\left(\begin{array}{ccc}{i}_{fa}& i_{fb}& i_{fc}\end{array}\right)}^T$.

Based on the above developments, the dynamic model of the three-level NPC SAPF in the natural abc-frame, including the DC-link capacitor dynamics, switching states, grid voltages, and grid currents, is given by:

$$L_f{\displaystyle \frac{d{i}_f\hspace{0.17em}}{dt}}={\displaystyle \frac{1}{6}}M\left(\mu v_s+{\mu }^2{v}_d\right)\hspace{0.33em}-r_f{i}_f\hspace{0.17em}-v_g$$

(5a)

$$C{\displaystyle \frac{d}{dt}}\left(\begin{array}{c}{v}_1\\ v_2\end{array}\right)=-\left(\begin{array}{ccc}{\mu }_a+{{\mathrm{\mu }}_a}^2& {\mu }_b+{{\mathrm{\mu }}_b}^2& {\mu }_c+{{\mathrm{\mu }}_c}^2\\ {\mu }_a-{{\mathrm{\mu }}_a}^2& {\mu }_b-{{\mathrm{\mu }}_b}^2& {\mu }_c-{{\mathrm{\mu }}_c}^2\end{array}\right){\displaystyle \frac{i_f}{2}}$$

(5b)

where

$$v_g={\left(\begin{array}{ccc}{v}_{ga}& v_{gb}& v_{gc}\end{array}\right)}^T, M=\left(\begin{array}{ccc}2& -1& -1\\ -1& 2& -1\\ -1& -1& 2\end{array}\right),$$

$$\mu ={\left(\begin{array}{ccc}{\mu }_a& {\mu }_b& {\mu }_c\end{array}\right)}^T, {\mu }^2={\left(\begin{array}{ccc}{{\mu }_a}^2& {{\mu }_b}^2& {{\mu }_c}^2\end{array}\right)}^T.$$

Using the Concordia’s transformation, the three-phase system in the $abc$-frame is converted to a stationary two-axis $\alpha \beta$-frame, given as:

$${\displaystyle \frac{d{i}_{f\alpha \beta }}{dt}}=-{\displaystyle \frac{1}{L_f}}\left(r_f{i}_{f\alpha \beta }+v_{g\alpha \beta }-{\displaystyle \frac{v_s}{2}}{\mu }_{\alpha \beta }-{\displaystyle \frac{v_d}{\sqrt{6}}}N\right)$$

(6a)

$$C{\displaystyle \frac{d}{dt}}\left(\begin{array}{c}{v}_1\\ v_2\end{array}\right)=-{\displaystyle \frac{1}{2}}\left(A{i}_{f\alpha \beta }+{\displaystyle \frac{1}{\sqrt{6}}}B{i}_{f\alpha \beta }\right)$$

(6b)

where

$$i_{f\alpha \beta }={\left(\begin{array}{cc}{i}_{f\alpha }& i_{f\beta }\end{array}\right)}^T; v_{g\alpha \beta }={\left(\begin{array}{cc}{v}_{g\alpha }& v_{g\beta }\end{array}\right)}^T; {\mu }_{\alpha \beta }={\left(\begin{array}{cc}{\mu }_{\alpha }& {\mu }_{\beta }\end{array}\right)}^T; N=\left(\begin{array}{c}{\displaystyle \frac{{{\mathrm{\mu }}_{\alpha }}^2-{{\mathrm{\mu }}_{\beta }}^2}{2}}\\ -{\mathrm{\mu }}_{\alpha }{\mathrm{\mu }}_{\beta }\end{array}\right);$$

$$A=\left(\begin{array}{cc}{\mu }_{\alpha }& {\mu }_{\beta }\\ {\mu }_{\alpha }& {\mu }_{\beta }\end{array}\right); B=\left(\begin{array}{cc}{{{\mu }_{\alpha }}^2-{\mu }_{\beta }}^2& \hspace{0.17em}-{2\mu }_{\alpha }{\mu }_{\beta }\\ -\left({{{\mu }_{\alpha }}^2-{\mu }_{\beta }}^2\right)& {2\mu }_{\alpha }{\mu }_{\beta }\hspace{0.17em}\end{array}\right)$$

In terms of the sum and difference in capacitor voltages, the previous switched mathematical model can be written as follows:

$${\displaystyle \frac{d{i}_{f\alpha \beta }}{dt}}=-{\displaystyle \frac{1}{L_f}}\left(r_f{i}_{f\alpha \beta }+v_{g\alpha \beta }-{\displaystyle \frac{v_s}{2}}{\mu }_{\alpha \beta }-{\displaystyle \frac{v_d}{\sqrt{6}}}N\right)$$

(7a)

$$C{\displaystyle \frac{d}{dt}}\left(\begin{array}{c}{v}_s\\ v_d\end{array}\right)=-\left(\begin{array}{cc}{\mu }_{\alpha }& {\mu }_{\beta }\\ {\displaystyle \frac{{{{\mu }_{\alpha }}^2-{\mu }_{\beta }}^2}{\sqrt{6}}}& {\displaystyle \frac{2{\mu }_{\alpha }{\mu }_{\beta }}{\sqrt{6}}}\end{array}\right)i_{f\alpha \beta }$$

(7b)

The switched model (7a) and (7b) employs a discontinuous control input ${\mu }_{\alpha \beta }$. This model is useful for performing accurate numerical simulations but not suitable for continuous controller design. By averaging the system dynamics over a switching period $T_s$, the following design-oriented averaged model is obtained.

$${\displaystyle \frac{d{\mathsf{ī}}_{f\alpha \beta }}{dt}}=-{\displaystyle \frac{1}{L_f}}\left(r_f{\mathsf{ī}}_{f\alpha \beta }+v_{g\alpha \beta }-{\displaystyle \frac{{\overline{v}}_s}{2}}{u}_{\alpha \beta }-{\displaystyle \frac{1}{\sqrt{6}}}N{\overline{v}}_d\right)$$

(8a)

$$C{\displaystyle \frac{d}{dt}}\left(\begin{array}{c}{\overline{v}}_s\\ {\overline{v}}_d\end{array}\right)=-\left(\begin{array}{cc}{u}_{\alpha }& u_{\beta }\\ {\displaystyle \frac{{{u_{\alpha }}^2-u_{\beta }}^2}{\sqrt{6}}}& {\displaystyle \frac{2u_{\alpha }{u}_{\beta }}{\sqrt{6}}}\end{array}\right){\mathsf{ī}}_{f\alpha \beta }$$

(8b)

where the overbar stands for averaging with respect to time over one switching cycle. It is worth noting that the average model corresponding to the three-level NPC inverter has a quadratic nonlinearity with respect to the input control signals $u_{\alpha }$ and $u_{\beta }$, in contrast to the two-level inverter which can be modeled by a bilinear model.

2.3. Space Vector Pulse Width Modulation Strategy

Space Vector Pulse Width Modulation (SVPWM) is an advanced technique used to control the switches in a three-phase voltage source inverter [20,21]. The key steps of the SVPWM technique are:

• Space vector representation: The three-phase output voltages are represented as a single rotating space vector in the $\alpha \beta$ plane;
• Switching pattern determination: SVPWM determines the optimal switching pattern for the inverter switches to synthesize the desired output voltage space vector. This process is achieved by selecting the appropriate inverter switching states and their corresponding durations;
• Pulse width modulation: The determined switching pattern is then used to generate the gate signals for the inverter switches using pulse width modulation.

2.3.1. Space Vector Representation

The reference voltage vector ${\overrightarrow{V}}_{ref}$ for the three-phase voltages $v_{abc}={\left(\begin{array}{ccc}{v}_a& v_b& v_c\end{array}\right)}^T$ can be expressed as follows [22]:

$${\overrightarrow{V}}_{ref}={\displaystyle \frac{2}{3}}\left(v_a+v_b{e}^{j{\displaystyle \frac{2\pi }{3}}}+v_c{e}^{-j{\displaystyle \frac{2\pi }{3}}}\right)$$

(9)

The $\alpha \beta$ components of this reference voltages are given by the following expression:

$${\overrightarrow{V}}_{ref}=v_{\alpha }+j{v}_{\beta }$$

(10)

The polar coordinate (magnitude $\left|{\overrightarrow{V}}_{ref}\right|$ and angle ($\theta$)) of the reference voltage vector $\overrightarrow{V_{ref}}$ are straightforward from (11):

$$\left|{\overrightarrow{V}}_{ref}\right|=\sqrt{{v_{\alpha }}^2+{v_{\beta }}^2}$$

(11)

$$\theta ={\tan }^{-1}\left({\displaystyle \frac{v_{\beta }}{v_{\alpha }}}\right)$$

(12)

In a three-level inverter, each phase can have three operating states: $\left\{0,1,2\right\}$, which correspond to the voltage levels ${-v}_2,0,$ and $v_1$ respectively (assuming that $v_1=v_2={\displaystyle \frac{v_s}{2}}$). Since there are three phases, and each phase can be in one of the three states, the total number of possible working states for the three-level inverter is $3^3=27$. These 27 working states can be represented as 27 space vectors in the $\alpha \beta$-frame, as shown in Figure 2. By disregarding the redundant states, the reference voltage vector ${\overrightarrow{V}}_{ref}$ can only take 18 different positions in the $\alpha \beta$-frame, based on the switching states of the three-level inverter. These 18 positions are arranged in two hexagons in the $\alpha \beta$-frame. Hexagon 1 has 6 positions, corresponding to 6 switching states. Hexagon 2 has 12 positions, corresponding to 12 switching states. Each position on the two hexagons is produced by a unique set of switching states.

There exists also one position at the origin of the diagram, corresponding to the three switching states 222, 111, and 000.

The positions of the reference voltage vector ${\overrightarrow{V}}_{ref}$ on the $\alpha \beta$ plane divide the diagram into six triangular sectors that can be represented by a variable $S$ whose value depends on the angle $\theta$ of the reference space vector according to the following expression:

$$S=\left\{\begin{array}{ccc}1& \mathrm{i}\mathrm{f}& 0\le \theta \le {\displaystyle \frac{\pi }{3}}\\ 2& \mathrm{i}\mathrm{f}& {\displaystyle \frac{\pi }{3}}\le \theta \le {\displaystyle \frac{2\pi }{3}}\\ 3& \mathrm{i}\mathrm{f}& {\displaystyle \frac{2\pi }{3}}\le \theta \le \pi \\ 4& \mathrm{i}\mathrm{f}& \pi \le \theta \le {\displaystyle \frac{4\pi }{3}}\\ 5& \mathrm{i}\mathrm{f}& {\displaystyle \frac{4\pi }{3}}\le \theta \le {\displaystyle \frac{5\pi }{3}}\\ 6& \mathrm{i}\mathrm{f}& {\displaystyle \frac{5\pi }{3}}\le \theta \le 2\pi \end{array}\right.$$

(13)

Each of these six sectors is divided into 4 smaller triangular regions. As an example, the sector corresponding to $S=1$ is illustrated in Figure 3. The complete space vector diagram is then divided into a total of 24 triangular regions.

2.3.2. Switching Pattern Determination

From the polar coordinates of the reference vector ${\overrightarrow{V}}_{ref}$, one can determine which value $S$ of the sector and which region $r$ in the $\alpha \beta$-frame that vector is located. The reference vector ${\overrightarrow{V}}_{ref}$ is located in terms of the polar coordinates according to the following expression in terms of the parameters $a$ and $b$, see Figure 3:

$$a=\left(\cos \left(\theta \right)-{\displaystyle \frac{1}{\sqrt{3}}}\sin \left(\theta \right)\right)\left|{\overrightarrow{V}}_{ref}\right|$$

(14a)

$$b={\displaystyle \frac{2}{\sqrt{3}}}\sin \left(\theta \right)\left|{\overrightarrow{V}}_{ref}\right|$$

(14b)

As an example, the regions of the first sector $\left(S=1\right)$ are as follows:

$$\begin{array}{ccc}r=1& \mathrm{i}\mathrm{f}& a\le {\displaystyle \frac{1}{2}} \mathrm{a}\mathrm{n}\mathrm{d} b\le {\displaystyle \frac{1}{2}} \mathrm{a}\mathrm{n}\mathrm{d} \left(a+b\right)\end{array}\le {\displaystyle \frac{1}{2}}$$

$$\begin{array}{ccc}r=2& \mathrm{i}\mathrm{f}& a\le {\displaystyle \frac{1}{2}} \mathrm{a}\mathrm{n}\mathrm{d} b\le {\displaystyle \frac{1}{2}} \mathrm{a}\mathrm{n}\mathrm{d} \left(a+b\right)\end{array}\ge {\displaystyle \frac{1}{2}}$$

$$\begin{array}{ccccccc}r=3& \mathrm{i}\mathrm{f}& b\ge {\displaystyle \frac{1}{2}}& & & & \end{array}$$

$$\begin{array}{ccccccc}r=4& \mathrm{i}\mathrm{f}& a\ge {\displaystyle \frac{1}{2}}& & & & \end{array}$$

Following the same procedure, all the other sectors can be determined.

2.3.3. Pulse Width Modulation

As discussed previously, the reference voltage vector ${\overrightarrow{V}}_{ref}$ can be represented by its magnitude $\left|{\overrightarrow{V}}_{ref}\right|$ and angle $\theta$ on the $\alpha \beta$ plane. The three nearest voltage space vectors are selected based on their proximity to ${\overrightarrow{V}}_{ref}$ in this plane. This proximity is determined by considering both the magnitude and angle of the voltage space vectors.

Let the three nearest voltage space vectors be denoted as $\overrightarrow{v_a}$, $\overrightarrow{v_b}$, and $\overrightarrow{v_c}$. These vectors can be described by their magnitudes $v_a$, $v_b$, $v_c$, and their angles with respect to the $\alpha$ reference axis. The three nearest voltage space vectors $\overrightarrow{v_a}$, $\overrightarrow{v_b}$, and $\overrightarrow{v_c}$ are selected such that the reference voltage vector ${\overrightarrow{V}}_{ref}$ can be approximated or represented by a linear combination of these vectors. Let $T_a$, $T_b$, and $T_c$ represent the dwell times of the three nearest voltage space vectors $\overrightarrow{v_a}$, $\overrightarrow{v_b}$, and $\overrightarrow{v_c}$, respectively, within each sampling period $T_s$. According to volt-second balance [23,24], one can write:

$${T_s\overrightarrow{V}}_{ref}=T_a{\overrightarrow{v}}_a+T_b{\overrightarrow{v}}_b+T_c{\overrightarrow{v}}_c$$

(15a)

$$T_s=T_a+T_b+T_c$$

(15b)

When the reference voltage vector ${\overrightarrow{V}}_{ref}$ is located in the second region ($r=2$) of the first sector, the following expression can be written:

$$T_s\left|{\overrightarrow{V}}_{ref}\right|\left(\begin{array}{c}\cos \left(\theta \right)\\ \sin \left(\theta \right)\end{array}\right)=T_a{v}_a+T_b{v}_b+T_c{v}_c$$

(16)

where $v_a$, $v_b,$ and $v_c$ are given by: $v_a={\displaystyle \frac{1}{3}}{v}_s\left(\begin{array}{c}\cos \left(0\right)\\ \sin \left(0\right)\end{array}\right)=\left(\begin{array}{c}{\displaystyle \frac{v_s}{3}}\\ 0\end{array}\right),$

$$v_b={\displaystyle \frac{\sqrt{3}}{3}}{v}_s\left(\begin{array}{c}\cos \left({\displaystyle \frac{\pi }{6}}\right)\\ \sin \left({\displaystyle \frac{\pi }{6}}\right)\end{array}\right)=\left(\begin{array}{c}{\displaystyle \frac{v_s}{2}}\\ {\displaystyle \frac{\sqrt{3}{v}_s}{6}}\end{array}\right),v_c={\displaystyle \frac{1}{3}}{v}_s\left(\begin{array}{c}\cos \left({\displaystyle \frac{\pi }{3}}\right)\\ \sin \left({\displaystyle \frac{\pi }{3}}\right)\end{array}\right)=\left(\begin{array}{c}{\displaystyle \frac{v_s}{6}}\\ {\displaystyle \frac{\sqrt{3}{v}_s}{6}}\end{array}\right).$$

From (16), one gets:

$$T_s\left|{\overrightarrow{V}}_{ref}\right|\mathrm{c}\mathrm{o}\mathrm{s}\left(\theta \right)=v_s\left(T_a{\displaystyle \frac{1}{3}}+T_b{\displaystyle \frac{1}{2}}+T_c{\displaystyle \frac{1}{6}}\right)$$

(17a)

$$T_s\left|{\overrightarrow{V}}_{ref}\right|\mathrm{s}\mathrm{i}\mathrm{n}\left(\theta \right)={\displaystyle \frac{\sqrt{3}}{6}}{v}_s\left(T_b+T_c\right)$$

(17b)

where $T_a$, $T_b$ and $T_c$ are given by:

$$T_a=T_s-2k\mathrm{s}\mathrm{i}\mathrm{n}\left(\theta \right)$$

(18a)

$$T_b=2k\mathrm{s}\mathrm{i}\mathrm{n}\left({\displaystyle \frac{\pi }{3}}+\theta \right)-T_s$$

(18b)

$$T_c=T_s-2k\mathrm{s}\mathrm{i}\mathrm{n}\left({\displaystyle \frac{\pi }{3}}-\theta \right)$$

(18c)

with $k={\displaystyle \frac{3\left|{\overrightarrow{V}}_{ref}\right|T_s}{{\sqrt{3}v}_s}}$.

The calculation of dwell times for the upper half-phase in region 2 of the first sectors is given in Figure 4. The calculation method is the same for all sectors [25,26].

3. Control Law Synthesis via Differential Flatness

The controller consists of two principal loops. The first one is an AC current control scheme founded on the principle of differential flatness; it is designed to generate the required reactive and harmonic current components to counteract the distortions introduced by the nonlinear load. The outer loop is dedicated to the regulation of the DC-link voltage and employs a PI controller. The overall control architecture is illustrated in Figure 5.

The reference currents for the SAPF are derived from those of the nonlinear load ($i_{L\alpha }$ and $i_{L\beta }$) using the PQ theory [27,28] as illustrated in Figure 6. This method is based on transforming the three-phase voltages and currents from the $abc$ frame into the $\alpha \beta$ one. In the latter, the complex power can be expressed as:

$$s_L=p_L+j{q}_L$$

(19)

where $p_L$ is the real power and $q_L$ is the imaginary one that can be expressed as follows:

$$\left(\begin{array}{c}{p}_L\\ q_L\end{array}\right)=\left(\begin{array}{cc}{v}_{g\alpha }& v_{g\beta }\\ -v_{g\beta }& v_{g\alpha }\end{array}\right)\left(\begin{array}{c}{i}_{L\alpha }\\ i_{L\beta }\end{array}\right)$$

(20)

$v_{g\alpha }$ and $v_{g\beta }$ are the $\alpha$ and $\beta$ components of the voltage vector, respectively, and $i_{L\alpha }$ and $i_{L\beta }$ are the $\alpha$ and $\beta$ components of the current vector, respectively.

The instantaneous real and imaginary powers, $p_L$ and $q_L$, can be decomposed into two components: DC components $P_L$ and $Q_L$, which represent the average of the real and imaginary powers, and AC components ${\tilde{p}}_L$ and ${\tilde{q}}_L$, which represent the harmonic part. Their expressions can be written as follows:

$$\left(\begin{array}{c}{p}_L\\ q_L\end{array}\right)=\left(\begin{array}{c}{P}_L+{\tilde{p}}_L\\ Q_L+{\tilde{q}}_L\end{array}\right)$$

(21)

The harmonic reference currents are generated based on the oscillating power component ${\tilde{p}}_L$ of the real power $p_L$, together with the total imaginary power $q_L$. The corresponding compensation currents references in the $\alpha \beta$ frame are obtained as follows:

$$\left(\begin{array}{c}{i}_{f\alpha }^{\ast }\\ i_{f\beta }^{\ast }\end{array}\right)={\displaystyle \frac{1}{v_{g\alpha }^2+v_{g\beta }^2}}\left(\begin{array}{cc}{v}_{g\alpha }& -v_{g\beta }\\ v_{g\beta }& v_{g\alpha }\end{array}\right)\left(\begin{array}{c}{\tilde{p}}_L-p_{dc}\\ q_L\end{array}\right)$$

(22)

where $p_{dc}$ is an additional power that constitutes the control signal for regulating the DC bus voltage.

3.1. High-Bandwidth Current Control Scheme

In a differentially flat system, the system variables consist of state vector $x$ and input vector $u$, and can be expressed in terms of a set of specific variables called the flat outputs $y$ and their time derivatives [29,30]:

$$y=\varphi \left(x,u,\dot{u},\dots ,u^{\left(s\right)}\right)$$

(23a)

$$x=\phi \left(y,\dot{y},\dots ,y^{\left(r\right)}\right)$$

(23b)

$$u=\psi \left(y,\dot{y},\dots ,y^{\left(r+1\right)}\right)$$

(23c)

More precisely, a system is said to be differentially flat if there exists a flat output vector $y\in {\mathbb{R}}^m$ such that all the system states $x\in {\mathbb{R}}^n$ and control inputs $u\in {\mathbb{R}}^m$ can be expressed as algebraic functions of the flat output and a finite number of its time derivatives.

The steps involved in the synthesis of a flatness controller for a power system are summarized below:

• Verification of the differential flatness: The first step is to check the flatness conditions expressed in (23a), (23b) and (23c);
• Reference trajectory planning: The second step is designing the desired references for the flat outputs of the control system;
• Control law synthesis: The third step is to synthesize the control laws that will allow the regulation of flat outputs to their reference trajectories in terms of the flat outputs and their derivatives.

3.1.1. Verification of Differential Flatness

Let $x_{\alpha \beta }={\left(\begin{array}{cc}{i}_{f\alpha }& i_{f\beta }\end{array}\right)}^T$ be the state vector of the system. To meet the control requirements, the candidate flat output vector is chosen as follows:

$$y_{\alpha \beta }=\left(\begin{array}{c}{y}_{\alpha }\\ y_{\beta }\end{array}\right)=\left(\begin{array}{c}{i}_{f\alpha }\\ i_{f\beta }\end{array}\right)=\varphi \left(x_{\alpha \beta }\right)$$

(24)

According to (24), the state vector is expressed as follows:

$$x_{\alpha \beta }=\left(\begin{array}{c}{i}_{f\alpha }\\ i_{f\beta }\end{array}\right)=\left(\begin{array}{c}{y}_{\alpha }\\ y_{\beta }\end{array}\right)=\phi \left(y_{\alpha \beta }\right)$$

(25)

Therefore, the second condition for the system to be flat is verified.

Equation (8a) can be used to express the input vector $u_{\alpha \beta }={\left(\begin{array}{cc}{u}_{\alpha }& u_{\beta }\end{array}\right)}^T$ as a function of the flat output and its derivative:

$$u_{\alpha \beta }={\displaystyle \frac{2}{{\overline{v}}_s}}\left(v_{g\alpha \beta }-{\displaystyle \frac{N\overline{v_d}}{\sqrt{6}}}+r_f{\overline{y}}_{\alpha \beta }+L_f{\displaystyle \frac{d{\overline{y}}_{\alpha \beta }}{dt}}\right)\equiv \psi \left(y_{\alpha \beta },{\dot{y}}_{\alpha \beta }\right)$$

(26)

3.1.2. Reference Trajectory Planning

The trajectory planning defines the evolution of all the system state variables, not just the flat outputs [31,32]. By imposing a known trajectory, it is possible to predict, analytically, the evolution of the system state variables. This analytical prediction is valuable for the control design and implementation, as it allows for precise control of the system behavior. The ability to plan and control the trajectory of flat outputs is a key advantage of differential flatness-based control.

To generate smooth reference signals for the output components, the reference vector $y_{\alpha \beta }^{\ast }={\left(\begin{array}{cc}{y}_{\alpha }^{\ast }& y_{\beta }^{\ast }\end{array}\right)}^T$ is filtered by a second-order system. The resulting reference trajectory is then given by:

$$y_{f\alpha \beta }^{\ast }=\left(\begin{array}{c}{y}_{f\alpha }^{\ast }\\ y_{f\beta }^{\ast }\end{array}\right)={\displaystyle \frac{1}{{\left(1+\tau s\right)}^2}}\left(\begin{array}{c}{y}_{\alpha }^{\ast }\\ y_{\beta }^{\ast }\end{array}\right)$$

(27)

where τ is a positive quantity representing the filter time constant.

3.1.3. Control Law Synthesis

A state feedback law is employed to make $y_{\alpha \beta }$ track the reference $y_{f\alpha \beta }^{\ast }$, which is the filtered version of reference vector $y_{\alpha \beta }^{\ast }$ [33]. The state feedback controller is expressed as follows:

$${\displaystyle \frac{de}{dt}}+k_{1}e+k_2\int e dt=0$$

(28)

where $e=y_{f\alpha \beta }^{\ast }-y_{\alpha \beta }$ is the error vector.

The integral terms in the state feedback controller ensure a zero static error. The coefficients $k_1$ and $k_2$ of the regulators are designed such that the operating point is stable and the system exhibits a desired dynamic performance.

Using (28), the dynamics of $y_{\alpha \beta }$ can be described by the following differential equation:

$${\displaystyle \frac{d{y}_{\alpha \beta }}{dt}}=\left(\begin{array}{c}{\gamma }_{\alpha }\\ {\gamma }_{\beta }\end{array}\right)={\displaystyle \frac{d{y}_{f\alpha \beta }^{\ast }}{dt}}+k_{1}e+k_2\int e dt$$

(29)

Let ${\gamma }_{\alpha \beta }$ = ${\displaystyle \frac{d{y}_{\alpha \beta }}{dt}}$. By using (26), the input vector $u_{\alpha \beta }$ can be expressed in terms of the variable ${\gamma }_{\alpha \beta }$ as follows:

$$u_{\alpha \beta }={\displaystyle \frac{2}{{\overline{v}}_s}}\left(v_{g\alpha \beta }-{\displaystyle \frac{N{\overline{v}}_d}{\sqrt{6}}}+r_f{\overline{y}}_{f\alpha \beta }+L_f{\overline{\gamma }}_{\alpha \beta }\right)$$

(30)

In a three-level NPC inverter with balanced DC-link capacitor voltages $\left(v_1=v_2\right)$, $u_{\alpha \beta }$ becomes:

$$u_{\alpha \beta }={\displaystyle \frac{2}{{\overline{v}}_s}}\left(v_{g\alpha \beta }+r_f{\overline{y}}_{f\alpha \beta }+L_f{\overline{\gamma }}_{\alpha \beta }\right)$$

(31)

In the Laplace domain, Equation (28) becomes:

$$\left(s^2+2\zeta {\omega }_{n}s+{{\omega }_n}^2\right)E(s)=0$$

(32)

where $\zeta$ and ${\omega }_n$ are given by:

$${\omega }_n=\sqrt{k_2} \mathrm{and} \zeta ={\displaystyle \frac{1}{2}}\sqrt{{\displaystyle \frac{{k_1}^2}{k_2}}}$$

The desired closed-loop damping ratio $\zeta$ and natural frequency ${\omega }_n$ can be imposed by appropriately selecting the values of the coefficients $k_1$ and $k_2$.

3.2. Outer-Loop Control Strategy for DC Bus Voltage Regulation

One of the control objectives in the SAPF is to maintain the voltage level at its DC side at a desired reference value. The first step in the outer control loop design is to obtain the dynamic model relating the DC-link voltage ${\overline{v}}_s$ with the reference currents $i_{f\alpha \beta }^{\ast }$.

Using (8b), the dynamics of ${\overline{v}}_s$ and ${\overline{v}}_d$ can be described by the following set of differential equations:

$$C{\displaystyle \frac{d{\overline{v}}_s}{dt}}=-\left(u_{\alpha }{\mathsf{ī}}_{f\alpha }+u_{\beta }{\mathsf{ī}}_{f\beta }\right)$$

(33a)

$$C{\displaystyle \frac{d{\overline{v}}_d}{dt}}=-{\displaystyle \frac{1}{\sqrt{6}}}\left(\left({{u_{\alpha }}^2-u_{\beta }}^2\right){\mathsf{ī}}_{f\alpha }+2u_{\alpha }{u}_{\beta }{\mathsf{ī}}_{f\beta }\right)$$

(33b)

By replacing the control signals $u_{\alpha }$ and $u_{\beta }$ by their expressions in (31), the dynamics of ${\overline{v}}_s$ in (33a) become as follows:

$$C{\displaystyle \frac{d{\overline{v}}_s}{dt}}=-{\displaystyle \frac{2}{v_s}}\left({\overline{y}}_{\alpha }f+{\overline{y}}_{\beta }g\right)$$

(34)

where $f$ and $g$ are given by:

$$f=L_f{\overline{\gamma }}_{\alpha }+r_f{\overline{y}}_{\alpha }+v_{g\alpha }+{\displaystyle \frac{1}{2\sqrt{6}}}\left({u_{\beta }}^2-{u_{\alpha }}^2\right){\overline{v}}_d, {\overline{y}}_{\alpha }={\mathsf{ī}}_{f\alpha }$$

$$g=L_f{\overline{\gamma }}_{\beta }+r_f{\overline{y}}_{\beta }+v_{g\beta }+{\displaystyle \frac{1}{\sqrt{6}}}{u}_{\alpha }{u}_{\beta }{\overline{v}}_d, {\overline{y}}_{\beta }={\mathsf{ī}}_{f\beta }$$

The following three assumptions are considered.

Assumption 1.

The impedance of (${L_f, r}_f$) is negligible.

Assumption 2.

The two DC voltages${\overline{v}}_1$and${\overline{v}}_2$are equal.

Assumption 3.

The inner current loop is significantly faster than the DC link voltage loop, which leads to$i_{f\alpha \beta }{=i}_{f\alpha \beta }^{\ast }$.

The relationship between ${\overline{v}}_s$ and the reference currents $i_{f\alpha \beta }^{\ast }$ becomes as follows:

$$C{\displaystyle \frac{d{\overline{v}}_s}{dt}}=-{\displaystyle \frac{2}{{\overline{v}}_s}}\left({\overline{i}}_{f\alpha }^{\ast }{v}_{g\alpha }+{\overline{i}}_{f\beta }^{\ast }{v}_{g\beta }\right)$$

(35)

The second step in the outer control design is to obtain the dynamic model relating the variable $v_s$ to the control signal, which is in this case the power $p_{dc}$. To do this, we replace the reference currents calculated by (22) in (34), hence obtaining:

$$C{\displaystyle \frac{d{\overline{v}}_s}{dt}}=-{\displaystyle \frac{2}{{\overline{v}}_s}}{\overline{p}}_{dc}$$

(36)

By rearranging (36), one obtains:

$$C{\displaystyle \frac{d{{\overline{v}}_s}^2}{dt}}=-4{\overline{p}}_{dc}$$

(37)

The voltage ${\overline{v}}_s$ can be tuned to its desired reference value $v_s^{\ast }$ by controlling the squared voltage ${{\overline{v}}_s}^2$ to ${{(v}_s^{\ast })}^2$. A simple PI controller [34] can be used for this purpose, as illustrated in Figure 7.

The corresponding closed-loop system transfer function $H\left(s\right)$ is given by:

$$H\left(s\right)={\displaystyle \frac{{{\overline{v}}_s}^2\left(s\right)}{{\overline{v}}_s^{\ast 2}\left(s\right)}}={\displaystyle \frac{4\frac{k_i}{C}\left(1+\frac{k_p}{k_i}s\right)}{s^2+4\frac{k_p}{C}s+4\frac{k_i}{C}}}$$

(38)

where $k_p$ and $k_i$ are, respectively, the proportional and the integral gains of the voltage controller.

The characteristic equation of the system can be written as:

$$P\left(s\right)=s^2+2{\zeta }_1{\omega }_{d}s+{\omega }_d^2$$

(39)

where ${\omega }_d$ is the damped natural frequency, and ${\zeta }_1$ refers to the damping factor corresponding to the voltage loop that is given by:

$${\zeta }_1=\sqrt{{\displaystyle \frac{{k_p}^2}{C{k}_i}}} \mathrm{and} {\omega }_d=\sqrt{{\displaystyle \frac{4k_i}{C}}}$$

(40)

Remark 1.

The proposed controller relies on a dual-loop structure combining an external PI regulator for the DC-bus and an internal flatness-based control law for current shaping. From an implementation standpoint, the computational burden remains comparable to that of a conventional PI-based scheme. In fact, the flatness-based internal loop only involves the real-time evaluation of simple algebraic expressions and first-order derivatives, as shown in the control law of (28). These derivatives are obtained using low-order filtering, which avoids the need for numerical differentiation or iterative algorithms. No matrix inversion, optimization routine, or multivariable solver is required. Consequently, the execution time of the entire dual-loop structure remains very close to that of a classical current PI regulator with a few harmonic compensators. This makes the proposed strategy fully compatible with real-time implementation on standard DSP platforms operating at sampling frequencies of 10–20 kHz.

4. Simulation-Based Control Validation

The proposed SAPF model is implemented in the MATLAB/Simulink R2024b environment and performs the numerical simulation. The results will be used to evaluate the effectiveness of the three-level NPC inverter and the proposed flatness-based controller in mitigating power quality issues and improving the overall system performance. The simulation parameters are summarized in

Table 2. System parameters.

Parameters	Values
RMS value of the grid voltage and frequency	220 V, 50 Hz
Reference DC voltage $v_s^{\ast }$	800 V
Impedance at the input of the polluting load $L_c$	0.1 mH
Filter impedance $L_f,r_f$	$2 \mathrm{m}\mathrm{H}, 8 \mathrm{m}\mathbf{\Omega }$
Diode bridge $L,R$	$20 \mathrm{m}\mathrm{H}, 20 \mathbf{\Omega }$
Capacitors $C$$, C_L$	$1 \mathrm{m}\mathrm{F}$$, 1 \mathrm{\mu }\mathrm{F}$

and

Table 3. Control parameters.

Parameters	Values
Inner loop	$\zeta =$$1, {\omega }_n=$$9000 \mathsf{\pi } \mathrm{rad}/\mathrm{s}, k_1=7.9\times {10}^8$$, k_2=5.6\times { 10}^4$
Outer loop	$\zeta =$$0.5, { \omega }_d=$ 100 π rad/s

. The controller parameters $k_1$ and $k_2$ were determined using the flatness-based control approach. A PI controller was carefully tuned to ensure stable and efficient regulation, while meeting the desired dynamic specifications such as settling time and overshoot.

To assess the performance of the system in cascade with its controller, the following conditions are taken into account:

• Performance in the presence of DC bus voltage variation.
• Performance analysis under load transition: from nonlinear to mixed nonlinear and linear $\left(R_L,L_L\right)$ load.
• Performance with system parameter variation.

4.1. Performance in the Presence of DC Bus Voltage Variation

The proposed controller is evaluated under a step change in the dc-bus voltage reference from 800 V to 900 V. Figure 8 illustrates the voltages $v_1$ and $v_2$. Under ideal conditions, these voltages should remain balanced. However, due to the neutral-point’s fluctuations, a slight imbalance can be observed.

As shown in Figure 9, the control signal $p_{dc}$ varies according to the DC bus voltage changes, but its averaged value remains constant in steady-state operation. Tracking-wise, it is noticeable that $v_s$ follows its reference $v_s^{\ast }$ tightly and with a short time-response.

The load currents are shown in Figure 10. The waveforms of these currents are not sinusoidal, indicating the presence of harmonics and therefore a high level of harmonic distortion. Figure 11 shows the load current for phase $a$. The THD coefficient of the load currents before filtering is 29.20% (see Figure 12), confirming the high harmonic content.

It is worth noting that harmonic analysis was carried out using the FFT tool of the Powergui block under steady-state conditions. A fundamental frequency of 50 Hz and a time window of 80 ms (four cycles) were selected, yielding a frequency resolution of 12.5 Hz. Harmonic components at integer multiples of the fundamental frequency were obtained by extracting the corresponding FFT frequency bins, enabling reliable harmonic assessment and THD computation.

Figure 13 shows the filter currents, which contain the harmonic components to be compensated in order to achieve a sinusoidal grid voltage. The SAPF, controlled by the flatness-based strategy, injects opposing harmonic currents to cancel out distortions caused by nonlinear loads. As a result, the grid current waveform is corrected to a near-sinusoidal shape, improving power quality.

The tracking performance between the filter’s current and its reference is represented in Figure 14 for phase $a$. The results show that the suggested flatness-based controller is able to generate a current that perfectly tracks its reference, thereby confirming the efficiency of the control strategy.

The filtered source currents are illustrated in Figure 15. The source currents are nearly sinusoidal, indicating an improvement in power quality. To quantify this improvement, Figure 16 presents the corresponding Total Harmonic Distortion (THD), which has been successfully reduced to 2.26%.

As shown in Figure 17, the current is in phase with the voltage, indicating a near-unity power factor.

A comparative review of representative state-of-the-art controllers (a PI controller [35], Predictive control [36], and an Artificial Neural Network controller [37]) has been added in

Table 4. Benchmarking of the proposed flatness-based control against existing approaches.

	Flatness Control	PI Controller	Predictive Control	Artificial Neural Networks Controller
THD	3.47%	4.2%	4.51%	4.32%
Settling time for $v_{dc}$	0.15 s	Not provided	Not provided	0.2 s

, using key metrics reported in the literature such as post-compensation grid-current THD, DC-bus voltage settling time, and implementation complexity. The results indicate that the proposed flatness-based strategy achieves THD and dynamic performance comparable to or better than these methods while requiring fewer terms, no predictive optimization, and no repetitive structures. Its explicitly derived control law also reduces computational burden and eliminates the need for high-order observers or extensive memory buffers. Overall, the method offers a favorable performance-complexity trade-off relative to existing approaches.

4.2. Performance Analysis Under Load Transition: From Nonlinear to Mixed Nonlinear and Linear Load

The system performance is evaluated during a transition from a standalone nonlinear load to a combined nonlinear and linear load at 0.2 s. Figure 18 shows that the DC bus voltage remains regulated at 800 V during the transition from a purely nonlinear load to a combined nonlinear and linear load. Despite the sudden change in load type, the controller maintains tight tracking of the voltage reference while ensuring stability. Moreover, the controller actively compensates for disturbances while preserving the DC-link voltage, with only minor deviations attributed to neutral-point fluctuations (as seen in Figure 18 for $v_1$ and $v_2$ voltages). Figure 19 shows the corresponding control signal $p_{dc}$, which stays bounded regardless of the load change.

Figure 20 illustrates the load currents with a transition from a pure nonlinear to a combined load at 0.2 s. As can be seen in Figure 21, a visible sinusoidal fundamental component can be observed after the load transition but with a highly distorted waveform, which is typical of nonlinear loads. The THD has decreased from 29.20% to 18.50% (see Figure 22).

Figure 23 shows the compensation currents generated by the active power filter, ensuring total neutralization of both harmonic currents and reactive power.

After the linear load is added, the current waveforms change developing a new quadrature component to supply the required reactive power while maintaining harmonic cancelation. The current amplitude increases to accommodate both compensation needs, demonstrating the controller’s adaptive capability. The control strategy based on the flatness approach guarantees a sufficiently fast response (see Figure 24). Even if the reference signal has a wide bandwidth due to high harmonic content, the compensation current perfectly tracks its reference in order to attenuate harmonics and compensate for the reactive power demanded by the load.

Figure 25 illustrates the waveforms of the mains current after filtering, in the presence of a nonlinear load. The proposed controller offers ample dynamic performance, as evidenced by the fact that the resulting mains current has waveforms that are practically sinusoidal and in phase with the mains voltage. This clearly shows that the power factor correction is effective (see Figure 26).

4.3. Performance with System Parameter Variation

Controller robustness is assessed under NPC inverter parameter variations. The simulation investigates the system response to a 20% increase in $C_1$ at 0.2 s, followed by a return to the original value at 0.4 s. The other system parameters remain unchanged. Figure 27 shows that the DC bus voltage in the NPC inverter is regulated to 800 V. Despite the 20% variation in $C_1$, the system maintains precise voltage regulation, with deviations limited to less than 0.5%. The system demonstrates fast recovery after each parameter change, proving its adaptability to sudden component variations.

The individual capacitor voltages $v_1$ and $v_2$ exhibit imbalance, caused by the neutral-point’s current fluctuations during the transition. This imbalance confirms the inherent challenge of neutral-point stability in NPC topologies, even when the total DC bus voltage remains perfectly regulated. The control signal demonstrates the controller’s ability to maintain system stability through parameter variations while preserving all performance characteristics (see Figure 28).

Figure 29, Figure 30, Figure 31, Figure 32, Figure 33 and Figure 34 illustrate that the proposed controller maintains the desired performance despite the operating changes introduced in this test. It is clear that the deterioration in control performance remains very limited despite the variations performed. In particular, the grid currents after filtering remain sinusoidal and in phase with the voltage. This proves the ability of the system to compensate for the produced harmonics and neutralize their effect on the grid side.

5. Conclusions

In summary, the paper proposes a novel approach for controlling a three-phase SAPF based on a three-level NPC inverter using a differential flatness-based nonlinear controller. The proposed strategy demonstrates that it can compensate harmonics and reactive currents. The source current THD is reduced to below 2.26%, which meets the limit of 5% set by international standards [38]. The controller effectively regulates the DC-link voltage to its desired reference. It has been formally demonstrated that the proposed solution achieves the control objectives. The simulation results show that the proposed control strategy is effective in enhancing power quality by reducing harmonics and reactive power, while maintaining proper DC-link voltage regulation.