Degradation-Conscious Multiobjective Optimal Control of Reconfigurable Li-Ion Battery Energy Storage Systems ^†

Abstract

Lithium-ion battery energy storage systems are made from sets of battery packs that are connected in series and parallel combinations depending on the application’s needs for power. To achieve optimal control, advanced battery management systems (ABMSs) with health-conscious optimal control are required for highly dynamic applications where safe operation, extended battery life, and maximum performance are critical requirements. The majority of earlier research assumed that the battery cells in these energy storage systems were identical and would vary uniformly over time in terms of cell characteristics. However, in real-world situations, the battery cells might behave differently for a number of reasons. Overcharging and over-discharging are caused by an electrical imbalance that results from the cells’ differences in properties and capacity. Therefore in this study, a stratified real-time control scheme was developed for the dual purposes of minimizing the capacity fade and the energy losses of a battery pack. Each of the cells in the pack is represented by a degradation-conscious physics-based reduced-order equivalent circuit model. In view of the inconsistencies between cells, the proposed control scheme uses a state estimator such that the parametric values of the circuit elements in the cell model are determined and updated in a decentralized manner. The minimization of the capacity fade and energy losses is then formulated as a multiobjective optimization problem, from which the resulting optimal control strategy is realized through the switching actions of a modular multilevel series-parallel converter which interconnects the battery pack to an external AC system. A centralized controller ensures optimal switching sequence of the converter leading to the maximum utilization of the capacity of the battery pack. Both simulation and experimental results are used to verify the proposed methodologies which aim at minimizing the battery degradation by reconfiguring the battery cells dynamically in accordance with the state of health (SOH) of the pack.

1. Introduction

Battery energy storage systems (BESSs) can provide an effective way to improving the utilization of uncertain renewable energy resources in power systems [1]. Li-ion batteries are considered to be an ideal candidate for such an application due to their high energy/weight ratio, lack of memory effect, and low self-discharge, among many others advantages [2]. However, Li-ion battery cells are subjected to degradation due to ageing or cycling. One main cause of the degradation is the formation of solid electrolyte interphase (SEI) in the anode electrodes. These irreversible side reactions have adverse impacts on the Li-ion’s availability. Furthermore, the SEI tends to increase the internal resistance and self-discharge of cells among other undesirable effects [3]. As a result, conventional battery management systems are often designed to provide estimates of the state of charge (SOC) and state of health (SOH) of the cells so that proper control actions can be taken to prevent damage or catastrophic failures of the BESS. More advanced battery management systems (ABMSs) use mathematical cell models to undertake the state estimation and control strategy design [2]. The models can usually handle the nonlinear behaviour and electrochemical constraints within the cells [4].

BESS used in low, medium, and high-voltage power applications would involve the management and control of many cells with appropriate cell configurations. Conventionally, the cells are connected in fixed wiring arrangements in the form of battery packs. Often all the cells in a pack are assumed to be identical throughout their operating life [5]. In practice, however, this assumption is hardly valid due to imperfections in the cell manufacturing process [6], and the inconsistencies between cells are exacerbated as the BESS operates. For application to single batteries, recently proposed control-oriented, health-aware charging strategies are promising; however, they are typically set up offline, do not take into account battery parameter variations or ageing mechanisms, and may require a significant amount of computational work when applied to large battery packs with cell inconsistencies [7]. Due to the limited information on the batteries’ operational states, the battery packs are operated in a narrow operating band and not at their actual achievable capacity [8,9,10]. Therefore, the performance of a battery pack very much depends on that of the weakest cell [11]. The imbalance in cells leads to lower reliability and efficiency and failure tolerance of the pack [12]. To mitigate cell imbalance, passive and active balancing techniques have been used extensively. Some power converters can be used not only as an interface but also as an SOC and SOH balancer. For example, modular multilevel converters (MMCs) and cascaded H-bridge modular multilevel converters (CHMMC) used to interface batteries into mains grid can bypass or series connect cells due to their increased degree of freedom but without having full balancing capabilities. To realize comprehensive cell balancing, additional power electronic circuits or/and more complex control strategies are required [13,14]. Towards achieving effective balancing of cells in a BESS, an extended version of MMC called MMSPC was proposed in [15] which has a parallel connectivity feature with full bridge modules. Although the MMSPC would entail a higher number of semiconductor switches and complexity in the associated control strategies, these disadvantages are readily offset by the many desirable improvements, such as higher efficiency, more flexible balancing, and low source impedance apart from general advantages common to MMCs, such as output voltage quality, higher reliability, and the cost-effective use of low-voltage switches [16,17,18].

The next-generation reconfigurable battery pack (RBP) is a state-of-the-art battery interfacing technique that combines CHMMC and ABMS [19]. The RBP can be used to enhance the BESS energy utilization efficiency [20,21]; acquire balanced system operation [22]; increase charge delivery over a longer operating time [21,23]; increase in life span; and customize terminal ranges for voltage, power, and current [20,24,25]; and balance charge and temperature [26,27,28]. To achieve these benefits, several optimization algorithms have been reported in the literature. In [21], for example, the total power converter losses are minimized during one control period using online and offline algorithms to maximize the energy conversion efficiency. However, these methods do not take into account cell degradation and inconsistencies. Dynamic programming is reported in [29,30] to solve the multistage optimization problem and to minimize total energy loss during charge balance and total capacity loss. Even in these studies, the age-dependent electrochemical parameter variations during the cell lifetime are not taken into consideration. Moreover, these methods suffer from high computational burden, infeasible hardware design, limited cell configuration, and difficulty in achieving global optimality [31].

In view of the above identified shortcomings, an RBP is proposed which utilizes a control mechanism that identifies the optimal cell configuration by taking cell inconsistencies and electrochemical parameter variations into account. The monitoring and control of individual cells is achieved by using a modular multilevel series parallel converter (MMSPC) which has the ability to dynamically switch battery cells into series, parallel, or a combination of these connections. The proposed ABMS can minimize the cell degradation and energy losses in the converter leading to a reduction in the rate of capacity loss in the battery pack and the maximum battery pack utilization. Towards achieving ABMS in this work, a multiobjective optimization (MOO) strategy and a modified hierarchical optimization (MHO) strategy are introduced.

While MOO tries to determine the optimal switching configuration over a quarter cycle, by minimizing battery capacity and converter losses, MHO attempts to find the switching configuration command for each time-step by considering instantaneous battery capacity and converter losses. The main contribution of this paper is the reconfiguration of cells with consideration given to the inconsistencies due to degradation.

Accordingly, this paper is organized as follows: Li-ion battery models are briefly discussed, and the physics-based reduced-order equivalent circuit model (ROECM) is presented in Section 2; RBP with MMSPC topology and converter losses are presented in Section 3; the proposed control mechanisms is presented in Section 4; the ABMS design is presented in Section 5; simulation and experimental results are presented in Section 6; the results are discussed in the Section 7; and the main findings of this work are summarized in Section 8.

2. Li-Ion Battery Cell Models

2.1. Electrochemical Models

Due to their relative simplicity, ease of implementation, and low computational overhead, empirical and equivalent circuit models (ECMs) of battery cells have often been adopted in commercial BMSs. However, these models often do not consider the changing operating conditions of the cells and the nonlinearities of the electrochemical processes occurring within the cells. Such operating conditions and nonlinearities will in turn result in changes in the parametric values of the model parameters. Therefore, a BMS incorporating these models can lead to reduced reliability and safety of the BESS operations [2].

In contrast, the electrochemical battery models provide detailed insights into the cell’s internal dynamics, enabling the internal battery states such as the battery SOC and SOH to be estimated accurately. Doyle et. al. has developed the physics-based two-dimensional (P2D) model based on the concentrated solution and the porous electrode theories to describe the dynamics of the electrochemical reactions inside the battery cells [32]. However, the coupled nonlinear partial differential and algebraic equations in the P2D model increase the model complexity and hence the computational burden, making it unsuitable for use in the real-time control application of the battery [33].

In view of the modelling difficulty, considerable efforts have been applied to simplifying the P2D model further. Towards this end, novel models such as the reduced-order electrochemical physics-based equivalent circuit models have been developed and have been shown to be able to replicate the behaviour of the cell’s internal dynamics with sufficient accuracy but at much lower computational effort than the P2D model [8,34].

2.2. Reduced-Order Equivalent Circuit Model

The reduced-order equivalent circuit model (ROECM) developed in [8] is derived from the single particle model (SPM), a simplified version of the electrochemical battery model. ROECM takes advantage of well-established electric circuit theory and the strength of cell electrochemical model. It is scalable and sufficiently accurate for up to a 1C rate operating condition. With the assumed negligible spatial variations in the Li-ion concentration, ROECM is computationally efficient because the partial differential equations contained in the P2D model can be replaced by ordinary differential equations. Moreover, a most attractive feature of the ROECM is that it provides physical interpretation to the circuit parameters and the internal state variables. Readers are invited to read [8] for further information.

According to the literature, the side reactions in the positive electrode are usually negligible compared to the side reactions in the negative electrode [3]. Hence, the cell resistance ($R_{\mathrm{eq}}$) increases with the degradation due to the increase in SEI film resistance ($R_{\mathrm{f}}$) in the negative electrode. The ROECM allows estimation of the battery SOC and SOH to be readily obtainable, as detailed in [8]. Please refer Appendix A for SPM and ROECM schematic diagrams and governing equations.

3. A Reconfigurable Li-Ion Battery Pack

3.1. Topology

As explained in Section I, MMSPC [15] provides a battery pack the ability to dynamically switch battery cells into series, parallel, bypass, or a combination of these connections [18]. It thus increases the degree of freedom to rearrange the cell configurations in the battery pack in real time [35]. Figure 1 shows the proposed three-phase BESS with a five-layer battery pack arrangement. The five layers are in order of cell, block, sub-bank, bank, and phase. MMSPC is implemented at block level to achieve cell level management.

Table 1. Proposed three-phase BESS parameters.

Parameter	Symbol
Phase voltage	V${}_{phase}$
Energy per cell	E${}_{cell}$
No of cells per block	N
Number of blocks	M
Number of sub-bank	K
Number of bank	J
Total cells	3NMKJ
Energy	3NMKJ E${}_{cell}$

shows the parameters of the proposed three-phase BESS. Figure 2 shows a block of cells with N number of modules. Each module is shown to contain a battery cell and an MMSPC converter. Through the open-and-close combination of the switches $S_1–S_8$, there are seven possible interconnection states between the modules $M_k$ and $M_{k+1}$ such that a short circuit between the $k^{th}$ and $k+1^{th}$ cells can be avoided [18,35]. It is through this flexibility in the interconnections between the modules that one can control the loss of energy storage capacities and the increase in the SEI film resistances in the cells. The corresponding ON and OFF position for the seven interconnections are provided in Figure 2 and are as follows: series positive (s+), series negative (s−), bypass positive (b+), bypass negative (b−), parallel positive (p+), parallel negative (p−), and zero (0).

In this work, the phase shift-pulse width modulation (PS-PWM) scheme is used to determine the switching command in configuring the module interconnection states. In Figure 2, $L_k$ is the intermediate interconnection state between the $M_k$ and $M_{k+1}$ modules, whereas $L_N$ is the termination interconnection. A triangular carrier waveform $W_k$ is assigned to $k^{th}$ module, and the phase shift between the adjacent carrier waveform is ${\Phi }_k=(360/\left(2N\right))(k-1)$, $k=(1,2,\dots ,N)$ as shown in Figure 5a. The sinusoidal reference signal, $V_{\mathrm{ref}}$, is compared against $\pm C_k$ to obtain $L_k$ or $L_N$. The logical rules used to determine $L_k$ and $L_N$ are as follows:

$$L_k=\left\{\begin{array}{cc}s+;\hfill & V_{\mathrm{ref}}\left(t\right)\ge \left|C_k\left(t\right)\right|\hfill \\ s-;\hfill & V_{\mathrm{ref}}\left(t\right)\le \left|C_k\left(t\right)\right|\hfill \\ p+;\hfill & -C_k\left(t\right)<V_{\mathrm{ref}}\left(t\right)\le C_k\left(t\right)\hfill \\ p-;\hfill & C_k\left(t\right)<V_{\mathrm{ref}}\left(t\right)\le -C_k\left(t\right).\hfill \end{array}\right.$$

(1)

$$L_N=\left\{\begin{array}{cc}s+;\hfill & V_{\mathrm{ref}}\left(t\right)\ge \left|C_n\left(t\right)\right|\hfill \\ s-;\hfill & V_{\mathrm{ref}}\left(t\right)\le \left|C_n\left(t\right)\right|\hfill \\ b+;\hfill & -C_n\left(t\right)<V_{\mathrm{ref}}\left(t\right)\le C_n\left(t\right)\hfill \\ b-;\hfill & C_n\left(t\right)<V_{\mathrm{ref}}\left(t\right)\le -C_n\left(t\right).\hfill \end{array}\right.$$

(2)

For example, s+ is activated for interconnect $L_k$ when $V_{\mathrm{ref}}$ is higher in magnitude than both the $C_k$ and $-C_k$. Other switching patterns can be similarly obtained by following (1) and (2), as shown in Figure 5b–e.

3.2. Energy Losses in the Pack

The power switches in the MMSPC are nonideal, as they have limited power-handling capacity, finite on/off-state resistance, and limited switching speed. Hence, during the MMSPC operation, these will lead to switching, conduction, and parallelization losses and the consequent temperature increase in the modules, as well as voltage and charge imbalances in the battery pack. As a result, cells in a battery pack are subjected to varied operating conditions, leading to uneven degradation between the cells. Therefore, the losses are important considerations, and they need to be minimized.

Switching losses ($E_{\mathrm{loss},\mathrm{sw}}$) are proportional to the switching frequency and to the number of switching transitions [15]. Switching losses per module can be determined using (3).

$$E_{\mathrm{loss},\mathrm{sw},t}=(1/2){\delta }_k{V}_k{I}_k(t_{\mathrm{on}}+t_{\mathrm{off}})$$

(3)

where, ${\delta }_k$ is the number of switching transitions, $V_k$ and $I_k$ are the voltage and current of the $k^{th}$ module, $t_{\mathrm{on}}$ and $t_{\mathrm{off}}$ are the turn-on and turn-off times of the semiconductor switch, respectively, over the time period $\mathsf{\Delta }t$.

Conduction losses ($E_{\mathrm{loss},\mathrm{cd}}$) are due to the voltage drop across the power switches and the cell’s internal resistance. Over time interval $\mathsf{\Delta }t$, $E_{\mathrm{loss},\mathrm{cd}}$ is calculated using the forward voltage drop $V_{\mathrm{ce},u}$ and current $I_u$ of the $u^{th}$ semiconductor switch, the equivalent resistance $R_{\mathrm{EQ}}$ of the pack, and the current $I_{\mathrm{load}}$ as in (4).

$$E_{\mathrm{loss},\mathrm{cd}}=\sum _u{V}_{\mathrm{ce},u}{I}_u+R_{\mathrm{EQ}}{I}_{\mathrm{load}}^2\mathsf{\Delta }t$$

(4)

With the total resistances of the series- and parallel-connected modules denoted as $R_{\mathrm{s}}$ and $R_{\mathrm{p}}$, respectively, $R_{\mathrm{EQ}}$ can be obtained from the following:

$$R_{\mathrm{EQ}}=(R_{\mathrm{p}}+R_{\mathrm{s}})$$

(5)

$$R_{\mathrm{p}}=\sum _{g=1}^{n^p}(1/\sum _{j\in n_g^p}1/R_j)$$

(6)

$$R_{\mathrm{s}}=\sum _{j=1}^{n^s}{R}_j$$

(7)

Here, $n^p$ and $n^s$ are the number of parallel- and series-connected sets of modules in the pack, whereas $n_g^p$ is the $g^{th}$ parallel-connected set of modules in the pack where $g\in 1,2,3,\dots ,n^p$. $R_j$ is the cell resistance of the $j^{\mathrm{th}}$ module.

Parallelization losses ($E_{\mathrm{loss},\mathrm{pr}}$) are due to unequal initial open-circuit voltages between two or more parallel-connected modules [15]. It is calculated using the equivalent capacitance ($C_{\mathrm{eq}}$) and the voltage difference ($\mathsf{\Delta }V$) for a parallel connected set of modules, as shown in (8). The sets of modules with the smallest voltage difference should be connected in parallel to minimize parallelization losses. However, the individual module capacitance C tends to decrease with the degradation due to the capacity loss in the cell [8].

$$E_{\mathrm{loss},\mathrm{pr}}=(1/2)C_{\mathrm{eq}}\mathsf{\Delta }{V}^2$$

(8)

$$\mathsf{\Delta }{V}^2=\sum _{g=1}^{n^p}\sum _{j\in n_g^p}\sum _{a\in n_g^p:j<a}{(V_{\mathrm{cell},j}-V_{\mathrm{cell},a})}^2$$

(9)

where $V_{\mathrm{cell},j}$ and $V_{\mathrm{cell},a}$ are the measured voltages of cells in modules j${}^{\mathrm{th}}$ and a${}^{\mathrm{th}}$ which are elements of the set of parallel-connected modules $n_p^g$.

4. Control Mechanism

Control and management of the BESS is governed by its ABMS, the high level schematic diagram of which is shown on Figure 3. The ABMS is composed of an electrochemical battery model, i.e., the ROECM described in Section 2.2 and a scheduler. Based on the measured cell input current, temperature, and cell electrochemical parameters, the ROECM allows the cell voltage and other state variables, including the $SOC\left(t\right)$ and $SOH\left(t\right)$ to be determined. In this work, the cell $SOC\left(t\right)$ and $SOH\left(t\right)$ are defined in the same manner as in [8], i.e., the ratio between the cell’s positive electrode available capacity to the cell capacity at beginning of life (BOL) and the ratio between the cell’s remaining capacity to the cell capacity at BOL, respectively viz:

$$SOC\left(t\right)=(q^{+}\left(t\right)-q_{\mathrm{loss}}\left(t\right))/q_{\max ,0}$$

(10)

$$SOH\left(t\right)=(q_{\max ,0}-q_{\mathrm{loss}}\left(t\right))/q_{\max ,0}$$

(11)

where $q^{+}\left(t\right)$ is the positive electrode capacity, $q_{\mathrm{loss}}\left(t\right)$ is the capacity loss, and $q_{\max ,0}$ is the cell capacity at BOL.

Next, the scheduler identifies the optimal cell arrangement intended to minimize both the capacity and energy losses of the pack. In this work, two possible approaches to the scheduler design are considered and compared. These approaches are based on the multiobjective and hierarchical optimization procedures and are described in Section 4.1.1 and Section 4.1.2, respectively.

At the input of the ABMS, a phase-locked loop (PLL) and a current controller are used to synchronize the battery pack terminal voltage to the grid voltage. The voltage reference waveform is then fed to the PS-PWM modulator in which the output level command is obtained using the logical rules (1) and (2). The obtained output level command (OLC) is sent to the scheduler to identify the required number of modules that need to be connected in the series to produce the power/voltage requirement. The estimated SOC, SOH, and the energy loss information are also fed to the scheduler to perform the optimization, and as a result, the optimal configuration command is identified among all the possible connection arrangements. In this way, the battery block reconfigures the cell arrangement so that the required block terminal voltage and power are met.

4.1. Scheduler Functionality

4.1.1. Multiobjective Optimization-Based Scheduler

Multiobjective optimization (MOO) can be used to determine the optimal switching configuration commands to reconfigure cells in the battery block. The two main objectives are to minimize capacity loss and energy loss across a given time horizon $\forall t\in \{1,2,\dots ,T\}$.

The decision variable in this multiobjective optimization is the choice of switching configuration command sequence $\xi =({\xi }_1,{\xi }_2,\dots ,{\xi }_T)$ from the set of all possible command sequences $\varphi$. An element ${\xi }_t$ of the command sequence $\xi$ represents a module configuration command at time step t, with ${\xi }_{t,i}\in \{s+,s-,p+,p-,b+,b-\}$ giving the individual interconnection command for cell $i\in \{1,2,\dots ,N\}$. ${\xi }_{t,i}$ represents how cell i connects to cell $i+1$ or the termination interconnection for cell N. Thus, the minimization of the total capacity loss of the battery pack ($Q_{\mathrm{loss}}$) over a time step t can be expressed by the following function:

$$min{Q}_{\mathrm{loss}}=\underset{\xi \in \varphi }{min}\sum _{t=1}^T\sum _{i=1}^N{q}_{\mathrm{loss},i}\left(t\right|{\xi }_t)$$

(12)

In (12), $q_{\mathrm{loss},i}\left(t\right|{\xi }_t)$ is the capacity loss of the $i^{th}$ cell over time step t when operating under module configuration command ${\xi }_t$.

The total energy loss of the battery pack ($E_{\mathrm{loss}}$) can be obtained by adding the switching loss (3), conduction loss (4), and parallelization loss (8) of all the modules. The objective of minimizing the total energy loss can be expressed as follows:

$$\begin{array}{c}\hfill min{E}_{\mathrm{loss}}=\underset{\xi \in \varphi }{min}\sum _{t=1}^T\left(\sum _{k=1}^N(1/2){\delta }_{k,t}({\xi }_{t-1},{\xi }_t)V_{k,t}({\xi }_t,I_{\mathrm{load},t}\right)\\ \hfill I_{k,t}({\xi }_t,I_{\mathrm{load},t})(t_{\mathrm{on}}+t_{\mathrm{off}})+R_{\mathrm{EQ},t}\left({\xi }_t\right)I_{\mathrm{load},t}^2\mathsf{\Delta }t+\\ \hfill \sum _{g=1}^{n^p\left({\xi }_t\right)}(1/2)C_{\mathrm{eq},g}\left({\xi }_t\right)\mathsf{\Delta }{V}^2\left({\xi }_t\right))\end{array}$$

(13)

In this optimization process, $I_{\mathrm{load},t}$ for $t=1,\dots ,T$ is the input parameter. Any variable which can be calculated for a given ${\xi }_t$ is represented as a function of ${\xi }_t$. ${\xi }_0$ is the initial state where all the switches are turned open. It is assumed that the cell voltages are always maintained within the respective upper/lower cutoff voltages. This is done in order to prevent the over-charging/discharging of the cells and to ensure the safe operation of the cells. It is also assumed that the input current to each module is maintained at less than 1C because for grid-connected battery banks, their input current tends to be below this level.

Therefore, the minimization of the total capacity loss and energy loss of the pack depends on ${\xi }_t$. In this work, ${\xi }_t$ is determined by applying MOO and subsequent use of its Pareto front. In general, the technique combines two or more independent objective functions and identifies a set of nondominated solutions from the search space, termed the Pareto frontier. The Pareto frontier set consists of all solutions for which one objective cannot be improved without detriment to the other objective. In the context of the present investigation, the Pareto frontiers are identified by considering the Equations (12) and (13) as the main objectives. All possible connectivity arrangements between the modules and over a quarter cycle of the sinusoidal reference waveform are considered in the search space $\varphi$. Let N denote the number of modules and n the number of cell voltage levels needed to obtain the required voltage output. Then, the total number of sequences are equal to ${\Pi }_{r=0}^n{}^N{C}_r$.

The step-by-step procedure for the MOO-based scheduler is shown in Figure 4. First, the scheduler gathers the data required for execution. The modes of operations are charging and discharging, and four modules are considered in this study. For such an arrangement and over a complete mains frequency cycle, ${\left({\Pi }_{{r=0}^4}{}^4{C}_r\right)}^4=84,934,656$, different switching sequences can be identified to produce a nine-level sinusoidal waveform with the maximum allowable peak-to-peak voltage that the four cells can generate. Therefore, to reduce the curse of dimensionality, a quarter cycle is chosen as the time horizon. Hence, with ${\Pi }_{{r=0}^4}{}^4{C}_r=96$, different switching sequences can be identified, as shown in Figure 5, and constitute $\varphi$. According to the voltage levels, Figure 5 shows the MMSPC cell arrangement with the interconnections introduced in Section 3.1. To present a better visualization, cell configuration schematics for sequence 96 are shown in the figure. In Figure 5f, the graph shows the nine-level waveform generated by the modulator and the pack output voltage. As mentioned in Section 1, the capacity fade is primarily due to the SEI film formation in the negative electrode during charging. Therefore, for each $\xi$, when the mode of operation is charging, both capacity and energy losses are to be minimized. Hence, both (12) and (13) objectives need to be satisfied. Whereas, when the mode of operation is discharging, only (13) needs to be satisfied as only the energy losses are presented in the pack. For objective (12), the total capacity of the pack is found for the considered time horizon. Similarly, for objective (13), the total energy loss is found by the addition of switching, conduction, and parallelization losses using (3), (4), and (8). Once the total capacity loss and energy losses are calculated for all $\varphi$, the dual objective data matrix ($96\times 2$) is created. In this way, the Pareto frontier set is identified, and the switching sequence which gives the minimum capacity and energy losses is chosen as the Pareto optimal solution. If there is no obvious solutions in the identified Pareto frontier set, the dual objective data matrix is normalized, and the switching sequence which has the minimum normalized Euclidean distance from the utopia point (i.e., a hypothetical solution where the optimal value for each objective can be achieved concurrently) is chosen as the Pareto optimal switching sequence. Then, this sequence is used as the optimal switching configuration command.

4.1.2. Modified Hierarchical Optimization-Based Scheduler

As the Li-ion battery’s capacity fading is a relatively slow process, unlike the MOO approach described earlier, a hierarchical optimization procedure could be a possible alternative approach to determine ${\xi }_t$. In the hierarchical approach, the capacity loss minimization is to be performed over a predefined time horizon while the minimization of the pack energy losses is to be carried out over every switching time step. Although a hierarchical optimization for energy loss minimization has been proposed in [18], in the present work, the hierarchical optimization procedure has been modified to include the capacity loss minimization as the first objective in the hierarchy.

An example flow diagram for hierarchical optimization is shown in Figure 6. In the figure, SOH levels and cell resistances from the battery model and the measured cell voltages are taken as inputs for the scheduler. Then, hierarchically, cell configurations identified as possibly not satisfying the corresponding criteria are eliminated. The eliminated sequences are outlined in red, and the sequences that are carry forward to the next level are outlined in green in the decisions column.

In level 1, to minimize capacity loss, the scheduler observes the output level command from the modulator and the battery pack’s present SOH. By analysing these inputs, at first, the scheduler sorts the individual cells by their SOH. Then, it generates all possible switching configuration commands by rearranging the modulator output level command (OLC) for time step t: ${\theta }_t^1=\{{\psi }_t:\psi \in \xi \}$. Next, the scheduler identifies a set of feasible switching configurations from ${\theta }_t^1$ and gives priority to higher SOH cells to be connected in series. Suppose the modulator OLC is (p+, s+, p+, s+) as in Figure 6. For the aforementioned OLC, there are six possible switching configuration commands for ${\theta }_t^1$ (S1, S2, S3, S4, S5, S6), and three of them are selected as ${\theta }_t^2$ (S1, S2, S3) based on the individual cell SOH within level 1 of the hierarchy.

In level 2, to minimize switching loss, the number of switch transitions per changing state needs to be minimized within time step t [18]. The number of switch transitions per change in interconnection $\delta ({\xi }_{t-1,i},{\psi }_{t,i})$ is given in (14).

$$\delta ({\xi }_{t-1,i},{\psi }_{t,i})=\left\{\begin{array}{cc}0,\hfill & \mathrm{no}\mathrm{change}\mathrm{in}\mathrm{states}\mathrm{from}{L}^{\prime }\hfill \\ 8,\hfill & s+\to s-ors-\to s+\hfill \\ 4,\hfill & \mathrm{all}\mathrm{other}\mathrm{possible}\mathrm{transitions}.\hfill \end{array}\right.$$

(14)

Here, ${\xi }_{t-1,i}$ is the previous switching state of the $i^{\mathrm{th}}$ cell configuration command and ${\psi }_{t,i}$ is the $i^{\mathrm{th}}$ feasible switching state of the switching configuration commands in ${\theta }_t^2$ where ${\xi }_{t-1,i}\in \{s+,s-,p+,p-,b+,b-\}$ and ${\psi }_{t,i}\in \{s+,s-,p+,p-,b+,b-\}$. Since the total number of switch transitions for the battery pack is to be minimised, the scheduler observes ${\xi }_{t-1,i}$ and carries forward the switching configurations in ${\theta }_t^2$, which satisfy the following objective function (15).

$$min{S}_{loss,t}=\underset{{\psi }_t\in {\theta }_t^2}{min}\sum _{i=1}^N\delta ({\xi }_{t-1,i},{\psi }_{t,i})$$

(15)

Therefore, S1 and S2 are carried forward to the next level, and S3 is eliminated as it contributes to the highest switching transitions.

In level 3, cell resistances are taken as the inputs to minimize the conduction loss. As the voltage drop due to the power switches cannot be avoided, the only way to achieve minimum impedance is to select an optimal configuration of the series-parallel combinations of the modules within the pack [15]. Based on this, the scheduler selects configurations in ${\theta }_t^3$ which have the least equivalent resistance $R_{EQ}$, as expressed by the objective function (16).

$$min{C}_{loss,t}=\underset{{\psi }_t\in {\theta }_t^3}{min}{R}_{EQ}\left({\psi }_t\right)$$

(16)

In the final level, to minimize parallelization loss, the scheduler similarly selects the module configuration which has the least voltage difference between the parallel-connected cells in ${\theta }_t^4$. The objective function for parallelization loss is expressed as (17).

$$min{P}_{loss,t}=\underset{{\psi }_t\in {\theta }_t^4}{min}\mathsf{\Delta }{V}^2\left({\psi }_t\right)$$

(17)

Finally, the configuration which is not eliminated is chosen as the module configuration command. Therefore, out of S1 and S2, S1 is selected as ${\xi }_t$, as it contributes least to the parallelisation losses.

5. Advanced Battery Management System Design

The proposed system utilises the MMSPC topology to interconnect multiple storage elements and change their connection configuration regularly. The chosen storage elements were connected to a MMSPC built using MOSFETs. The proposed solution ensures a physically small and modular design focusing on scalability. The control system was designed on a layered master–slave arrangement where each layer controller is responsible for a number of slave controllers. At the block level, a motherboard manages N daughterboards that were wired together and regulated in order to supply the MOSFET drivers with communication, power, and switching sequence. Each cell needs a converter module; thus, the daughterboards were built with a compact footprint to ensure dense storage capacity matching the small format Li-ion package (18650) [36].

Figure 7 outlines the design overview and responsibilities of the daughterboard and motherboard modules in order of priority with physical connections and mappings outlined by the connecting traces. The motherboard was assigned to perform modulation, scheduling, and optimisation algorithms. The modulator uses the the phase shifted PWM and the reference voltage waveform generated by the phase-locked loop (PLL) and the current controller to generate the output level command (OLC), and the scheduler uses the OLC to generate the module configuration command after taking the proposed optimization technique into consideration. To guarantee that the computational challenges of the optimisation methods are solved locally in an acceptable amount of time, the motherboard was fit with a high-performance processor. The daughterboard controller was assigned to switching MOSFETS; sensing the voltage, current, and, temperature of the cells; identifying parameters; and estimating states using the cell electrochemical model. The interintegrated circuit (I2C) protocol was chosen as the primary communication method between the motherboard and daughterboards. The communication is conducted in the form of data packets by sending a general all-call command to all daughterboard modules to update the switching states. Due to the inherent delay in receiving the general all-call by the daughterboards, a fixed time delay was included to compensate for the delay and ensure MOSFETs’ consistent switching. State estimation completed in daughterboards uses the amount of time left between switching state updates [36].

6. Simulation and Experimental Validation

Simulations were conducted in MATLAB Simulink simulation environment on a PC with an Intel Core i7-8700 CPU @ 3.2 GHz and 16 GB RAM with a continuous solver selected. For the experiments, the test setup shown in Figure 8 was used with four 18650 $LiFeP{O}_4$ cells with 1.6 Ah capacity. Other properties of the cells are listed in

Table A3. Battery Parameters.

Physical Meaning (Unit)	Positive Electrode	Negative Electrode
Particle radius (m)	$2\times {10}^{-6}$	$2\times {10}^{-6}$
Solid phase diffusion coefficient (${\mathrm{m}}^2/\mathrm{s}$)	$1\times {10}^{-14}$	$3.9\times {10}^{-14}$
Specific surface area of electrode (${\mathrm{m}}^{-1}$)	$8.85\times {10}^5$	$7.236\times {10}^5$
Length of the electrode (m)	$80\times {10}^{-6}$	$88\times {10}^{-6}$
Volume fraction of the solid phase	$0.59$	$0.49$
Theoretical maximum concentration in the solid phase ($\mathrm{mol}·{\mathrm{m}}^{-3}$)	51,555	30,555
Stoichiometry for an empty battery at BOL	0.95	0.03
Stoichiometry for a full battery at BOL	0.4870	0.8851
Electrode rate constant ($\mathrm{A}·{\mathrm{m}}^{2.5}$ $·{\mathrm{mol}}^{-1.5}$)	$2.252\times {10}^{-6}$	$4.854\times {10}^{-6}$
SEI film resistance at BOL ($\Omega ·{\mathrm{m}}^2$)	0	0.01
Effective electrolyte conductivity ($\mathrm{S}·{\mathrm{m}}^{-1}$)	0.0045	0.0113
Faraday constant (s· A/mol)	96,487
Temperature (K)	298.15
Universal gas constant [J/(K· mol)]	8.314
Current collector resistance ($\Omega ·{\mathrm{m}}^2$)	0
Average Li-ion concentration in the electrolyte (${\mathrm{mol}/\mathrm{m}}^3$)	1000
Electrode plate area (${\mathrm{m}}^2$)	0.05961
Average molecular weight of the SEI film (kg/mol)	$7.3\times {10}^{-4}$
SEI film density (${\mathrm{kg}/\mathrm{m}}^2$)	$2.1\times {10}^{-3}$
Exchange current density for side reaction (${\mathrm{A}/\mathrm{m}}^2$)	$2.8\times {10}^{-8 *}/2.8\times {10}^{{-7}^{ !}}$
Equilibrium potential of the side reaction (V)	0.4
Charge capacity at BOL (Ah)	1.6
Length of the separator (m)	$20\times {10}^{-6}$
Effective electrolyte conductivity of the separator ($\mathrm{S}·{\mathrm{m}}^{-1}$)	0.0563

* Value for all cells in identical cell scenario and value for cells 2, 3, and 4 for nonidentical cell scenario; ${}^{!}$ Value for cell 1 in the nonidentical cell scenario.

in the Appendix A.

The hardware circuit design was simulated in LTspice and designed using KiCAD software. The boards were hand assembled and individually tested for mechanical and electrical failures. The system was tested with four Li-ion cells with each cell connected to a daughterboard accompanied by a motherboard as shown in Figure 8. ARM cortex M4 STM32 microcontrollers were used for the motherboard and daughterboard processors which have multiple ADC’s, GPIOs, and hardware abstract layer (HAL) drivers for rapid prototyping. In each daughterboard, two sets of full-bridge MOSFET arrays are used for MMSPC. The MOSFET switching is handled by the MIC4606-2YTS-TR driver IC with 4 kHz switching frequency. The PCB traces of the MOSFET driver circuits were optimised for a shorter distance, cross-talk avoidance, and high current capability. Hall effect current sensors, a voltage divider, and a low pass filter are used to measure the cell currents and voltages respectively. To achieve a small footprint and a low-cost design, surface-mounted devices are used in the boards. The circuits are protected using 3A slow-blow fuses and current sensors with an inbuilt re-settable 5A fuse for overload conditions.

The system firmware was designed using low-level HAL and an interrupt-driven system for optimal performance and actuation timing. In the motherboard, the switching states are sent via an I2C interrupt which utilises a buffer storage system. The I2C state estimation data request uses direct memory access to reduce the CPU processing time. The remaining time is utilised by the optimization algorithm which is run in a real-time operating system, allowing for coherent and multitasking functionality for real-time response and long-term background processing. The daughterboards use an interrupt priority control scheme to update the switching states accurately, calculate the cell states, and estimate the parameters. A failure detection function was established which is able to identify the failure type, such as battery over/under voltage/current or communication failure, and execute the respective action to fix or prevent further damage to the system.

The battery block output voltage and current were observed across a resistive load, as shown in Figure 9. The output voltage of the block clearly shows the nine switching-state voltage levels produced by four cells, similar to that of Figure 5f, with pack output voltage indicating the preciseness of the motherboard and daughterboard functionalities.

For the simulation and experimental studies, a medium voltage BESS which is used to smoothen the output power of a hypothetical 300 kW wind farm was considered. The objective of the study was to check the proposed ABMS and control strategy’s performance under varying current profiles. Therefore, a set of wind speed data over an hour was taken from [37] to generate the hypothetical wind farm data. The output power of the wind farm data was smoothened with the BESS and dispatched to the grid. The difference between the generated wind power and the dispatched power to the grid was considered to be the input power to the BESS, as shown in Figure 10.

6.1. Electrochemical Battery Model Validation

In this subsection, the MATLAB simulated ROECM is compared with the actual cell terminal voltage and daughterboard embedded cell model. Relatedly, the 1500 s long power profile can be seen in Figure 10. Accordingly, the current profile is obtained for a monolithic BESS assuming all the cells are identical and are connected in fixed series configuration, with each cell represented by a ROECM. Figure 11c shows that the actual cell measurement is in excellent agreement with the ROECM simulated in MATLAB and embedded in the daughterboard. Moreover, the simulated state estimation and capacity loss estimation were compared with those of the daughterboard estimations and match excellently, as shown in Figure 11d,e. Therefore, the implemented cell state estimation algorithm in the daughterboard is identical to MATLAB’s simulated ROECM and in better agreement with the actual cell measurements.

6.2. Scheduler Performances

In this subsection, experimental and simulated studies are presented for the proposed RBP with MOO based scheduler. It is compared against RBP with a Modified Hierarchical Optimization (MHO) based scheduler and also with a Monolithic Battery Pack (MBP). The RBP is considered as a four module battery block with MMSPC and MBP is considered as a fixed series connected four cell battery block. The cells in these battery packs are assumed to be identical initially and their losses are compared in Figure 12a,c. It can be seen that the MOO and MHO based schedulers give minimum capacity loss, however the MBP losses are comparatively high. Moreover, the MOO based scheduler gives less energy loss compared to RBP with MHO. In Figure 12b,d, the cells are assumed non-identical. The cell 1 is set to degrade faster than the other three cells. In that scenario, the effectiveness of the MOO and MHO strategies are significant compared to that of MBP. Significant reduction in battery pack energy loss can be observed in MOO strategy.

Figure 13 shows the experimentally obtained cell voltages for identical cells. According to the results, cell voltages were well balanced through out the test period.

7. Discussion

The integration of the scheduler function improves the battery SOH and decreases the converter losses. The scheduler with MOO identifies the most appropriate switching sequence according to the health and the converter losses in the battery pack, and therefore provides more optimal results compared to the other two mechanisms. This shows the effectiveness of the reconfiguration of the battery pack in managing the inherent cell inconsistencies in applications such as using second life batteries in BESS.

The selection of switching sequences in MHO strategy was compared with the proposed MOO strategy for the first 1500 s. It can be seen that the switching sequence chosen by MHO strategy is different from the Pareto optimal switching sequence obtained using MOO, as shown in Figure 14. In Figure 14a,b, the switching sequence change over a 1500 s operation period and its extraction of 250 s are presented, respectively. As mentioned in Section 1, the capacity fade is primarily due to the SEI film formation in the negative electrode during charging. Therefore, during charging, the distribution of sequences in the Pareto analysis is two-dimensional, as shown in Figure 14c,d, whereas during discharging, it is one-dimensional, as shown in Figure 14e,f.

In Figure 14c,e, the Pareto analysis is shown for identical cells under charging and discharging modes, respectively. When cells are in charging mode, the set of Pareto frontiers are identified as in Figure 14c. Therefore, sequence 37 is chosen as the Pareto optimal configuration command, as it has the minimum Euclidean distance from the utopia point. When cells are in discharging mode, sequence 1 is identified as the only Pareto optimal sequence which provides the minimum energy loss. However, in both cases, sequence 92 is identified as the optimal switching sequence by the MHO scheduler. In Figure 14d,f, the Pareto analysis is shown for nonidentical cells under charging and discharging modes, respectively. Similarly, a set of Pareto frontiers are identified, as shown in Figure 14d. In this scenario, sequence 1 is chosen as the Pareto optimal configuration command by the MOO scheduler while sequence 25 is identified by the MHO scheduler. In Figure 14f, it can be seen that sequence 1 is identified by both schedulers as the optimal configuration command under discharging mode. Even if the sequence was the same according to both schedulers in this case, it is apparent that this is not always the case. The distance between the chosen sequences by the two schedulers and the accumulated difference in the respective losses result in the deviation in capacity and energy losses in the proposed optimization methods.

The advantage in MOO is that the switching sequence for the next quarter cycle is identified at the beginning of the quarter cycle, but in MHO, the switching command is identified for each switching step at the beginning of the step. Therefore, as MOO provides a larger search space for optimization over MHO, it naturally presents a switching sequence producing an improved outcome. It is interesting to observe how the battery pack reconfigures its arrangement with respect to current operating conditions to deliver a better performance.

The efficiency analysis for the proposed two optimization methods are presented for identical and nonidentical cell scenarios in

Table 2. Efficiency analysis of the proposed optimization methods.

Optimization Methods	Cell Characteristic	Efficiency (%)
MOO	Identical cells	99
	Nonidentical cells	99
MHO	identical cells	94.5
	Nonidentical cells	94.2

. Accordingly, the MOO scheduler provides higher efficiency compared to the MHO scheduler in all scenarios.

The proposed degradation and energy loss conscious ABMS with the MOO-based scheduler provides following advantages:

• The pack capacity loss is reduced by 28% and 58% for identical and nonidentical scenarios, respectively, compared to MBP, suggesting that the proposed method is ideal for battery packs with cell inconsistencies.
• The energy loss in the converter is reduced by 98% while efficiency is increased by nearly 5% for identical and nonidentical scenarios, respectively, compared to the MHO scheduler.
• The SOC balancing is achieved with a maximum difference of 0.01, indicating that the maximum cell utilization can be achieved without limiting the pack’s performance to its weakest cell due to the adaptive nature of the control mechanism to the changes in the cell condition and dynamic reconfiguration.
• The distribution of computational requirements between the daughterboard and motherboard allows for reduced cost, less time, and increased accuracy. State estimation and ADPE are performed by the daughterboard within 200 $\mathsf{\mu }\mathrm{s}$ and 0.4902 s, respectively. The scheduler function is performed by the motherboard within 0.005 s.
• A feasible hardware design is proposed which ensures a physically small and modular design with a focus on scalability. The daughterboard modularity allows for the system to scale according to the application requirement.

8. Conclusions

In this paper, a degradation and energy loss control mechanism with MOO and MHO strategies is proposed to reduce the rate of capacity loss and energy loss of an RBP-fed grid interfacing with MMSPC. These decentralized and layered control mechanisms were developed for cell-level management to maximize cell utilization through dynamic reconfiguration of the modules. The following crucial outcomes were attained since, as the primary contribution of this study is to suggest a reconfiguration of cells that can account for inconsistencies caused by degradation:

• The proposed RBP utilizes a control mechanism that identifies the optimal cell configuration by taking cell inconsistencies and electrochemical parameter variations into account.
• The utilized physics-based battery model is computationally efficient and provides physical interpretation to the circuit parameters and the internal state variables. It allows for the accurate estimation of the battery SOC and SOH.
• The monitoring and control of individual cells is achieved by using MMSPC, which has the ability to dynamically switch battery cells into series, parallel, or a combination of these connections.
• The ABMS proposed has the ability to incorporate cell inconsistencies, accurate online estimation of cell states, and electrochemical parameters.
• A feasible hardware design for the control scheme is presented, and the comparison of the proposed strategies, with simulation and experimental results, is reported and discussed.

Future work will be focused on integrating the temperature dependency with the proposed MOO scheduler to minimize heat generation and temperature increase in the battery pack via reconfiguration. For this purpose, a thermal management system needs to be incorporated to the proposed ABMS to estimate the internal temperature of the cells using minimum cell measurements.