To date, several photonic applications have been demonstrated without considerable thermal management efforts. However, in phase-sensitive photonic applications, thermal management becomes of utmost importance. Thermal management of photonic systems requires not only efficient heat dissipation, but also reduction of on-chip temperature gradients. Particularly in highly integrated systems, in which several components are integrated within a single photonic integrated circuit, the reduction of on-chip temperature gradients is necessary to guarantee the correct functionality of the system. Due to their high integration density as well as their extreme temperature sensitivity, optical phased arrays are ideal examples of a system, where thermal management is required. Ideally, thermal management solutions of such systems should not require additional power for operation. Therefore, it is desired to improve the heat dissipation and to reduce temperature gradients by structural modifications of the photonic circuit. Furthermore, to cope with the advantages of silicon photonics, thermal management solutions must be compatible with series fabrication processes. In this work, complementary metal–oxide–semiconductor (CMOS)-compatible measures for thermal management of silicon photonic integrated circuits are proposed and validated by characterization of in-house fabricated thermal demonstrators. The proposed concepts are extremely efficient not only in reducing temperature gradients, but also in improving the heat dissipation from integrated heat sources.
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