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Article

Design of a High-Efficiency Hydrogenated Amorphous Silicon Electro-Absorption Modulator with Embedded Graphene Capacitor

by
Babak Hashemi
1,*,
Sandro Rao
1,
Maurizio Casalino
2 and
Francesco Giuseppe Della Corte
3
1
Department of Information Engineering, Infrastructures and Sustainable Energy (DIIES), “Mediterranea” University, 89124 Reggio Calabria, Italy
2
Istituto di Scienze Applicate e Sistemi Intelligenti (ISASI), National Research Council, via P. Castellino 111, 80131 Napoli, Italy
3
Department of Electrical Engineering and Information Technologies (DIETI), Università degli Studi di Napoli Federico II, 80125 Napoli, Italy
*
Author to whom correspondence should be addressed.
Photonics 2025, 12(9), 916; https://doi.org/10.3390/photonics12090916
Submission received: 12 August 2025 / Revised: 6 September 2025 / Accepted: 10 September 2025 / Published: 13 September 2025

Abstract

Waveguide-integrated electro-optical modulators play a crucial role in the design of new-generation photonic integrated circuits. The target of this paper is to demonstrate the potential offered by the association of graphene (Gr) and hydrogenated amorphous silicon (a-Si:H) in enhancing silicon photonics technology, enabling, in particular, the fabrication of efficient, wide-bandwidth, highly compact active devices. The design of the proposed electro-optic modulator is based on accurate numerical simulations where Gr is explored as the active material, absorbing (or not) the light propagating along the waveguide core, with its absorption coefficient being tunable through the application of an external electric bias. By strategically embedding two Gr monolayers where the propagating optical field is at its maximum, the performance of the modulator is maximized, resulting in a 39.5 GHz 3 dB bandwidth, corresponding to a 0.34 dB/µm modulation depth. The straightforward feasibility of the proposed structure is bolstered by the use of the Plasma-Enhanced Chemical Vapor Deposition technique, which allows for the deposition of a-Si:H on a silicon-on-insulator platform as a post-processing phase, ensuring potential scalability and practical implementation for advanced photonics.

1. Introduction

As the demand for faster processors and enhanced data transmission capabilities is continuously growing, the need for technologies that can meet the requirements in terms of bandwidth and power consumption has become a pressing concern [1]. In this respect, silicon photonics is emerging as the most promising technology for achieving reliable and cost-efficient optoelectronic components for data communication [2].
An optical modulator is a device that is used to modulate a steady light wave beam, propagating either in free space or along an optical waveguide [3]. These devices can modify one or more parameters of the optical beam, falling into different categories such as amplitude, phase, or polarization modulators [4]. Moreover, they can be classified as either electro-refractive or electro-absorbing, depending on whether variations in the real part or in the imaginary part of the refractive index are exploited [5]. Being insensitive to wavelength, electro-absorption (EA) waveguide-coupled modulators, with their ultra-high-speed, low-drive voltage, and hysteresis-free operation, may play a crucial role in next-generation optical transceivers [6]. In parallel, graphene-based plasmonic absorbers have also been investigated; for instance, Zhou et al. proposed a four-peak, angle-insensitive graphene absorber design based on a circular etching square window structure [7].
On the other hand, graphene (Gr), with its high carrier mobility and broadband absorption characteristics, shows interesting and promising physical attributes in enabling the design of extremely fast, compact, and wide-bandwidth electro-optic devices [8]. The development of Gr-based modulators started with Liu et al. [9], who reported an electro-absorption (EA) modulator exploring a single layer of Gr (SLG) on top of a Si waveguide, achieving a modulation depth of 0.1 dB/µm and an optical bandwidth of 1.2 GHz. Subsequently, Dalir et al. demonstrated a TM mode in planar structure-integrated modulators, with a double layer of graphene (DLG), achieving a bandwidth of 35 GHz and a small footprint of 18 µm2; however, high contact resistance and high driving voltage have been estimated [10]. Fan et al. proposed a Gr-based EA modulator based on a double-stripe silicon nitride (SiN) waveguide [11]. By embedding two Gr-on-Gr (GOG) layers inside the double-stripe SiN waveguide, and by properly designing the electrodes, the total metal–Gr contact resistance was highly reduced, leading to a theoretical modulation bandwidth of 30 GHz. The calculated extinction ratio was estimated to be 0.165 dB/µm.
Giambra et al. reported a C-band DLG EA modulator on a passive silicon-on-insulator (SOI) platform showing 29 GHz 3 dB bandwidth and extinction ratios ranging from 1.7 dB at 10 Gb/s to 1.3 dB at 50 Gb/s [12]. The total length was 120 µm. The fabrication method was CMOS-compatible, demonstrating how Gr technology can meet the highest performance required by the market.
In this work, we present a study of a highly compact broadband DLG-based EA modulator with a remarkable 39.5 GHz electro-optical bandwidth and a large modulation depth of 0.34 dB/µm, both of which were estimated by detailed numerical simulations. To achieve such optimal performance, a stack composed of hydrogenated amorphous silicon (a-Si:H), DLG, and crystalline silicon (c-Si) was considered for the waveguiding core, with two (hexagonal Boron Nitride)–graphene–(hexagonal Boron Nitride), h-BN−Gr−h-BN, stacks separated by a layer of Hafnium Oxide (HfO2) as the dielectric for the DGL capacitor. The guiding idea is to engineer the position in height of the Gr capacitor to achieve the best match with the propagating TE optical field, in order to maximize Gr–light interaction and optimize modulation efficiency.
A similar concept was proposed in [13], where the position of a DLG capacitor separating a ridge waveguide from a high-index buffer layer was optimized by numerical simulations. The modulation speed was estimated by simple calculations of the RC constant of the device, leading to an optimistic bandwidth in excess of 150 GHz for a high-k dielectric spacer between the Gr plates. A Gr capacitor-embedded waveguide-integrated modulator was also reported in [14]. There, the device’s static characteristics were obtained by simple analytical calculations, starting from an estimation of the effective refractive index change in the waveguide under the application of a voltage bias to the Gr capacitor. The a.c. behavior was again derived by calculating the device’s dominant time constant from the parasitic capacitance of the Gr parallel plates and the hypothesized serial path resistance from device to contacts.
As a further contribution to the study of the actual advantages of such structures, we conducted detailed physical numerical simulations both in the d.c. and time domains, aiming at assessing realistic data on the impact of the DLG capacitor’s height position, the thickness and composition of the dielectric spacer in the capacitor, and the applied bias on modulation efficiency and speed. We highlight the high technological feasibility of the proposed device, which can rely, in particular, on the use of low-temperature Plasma-Enhanced Chemical Vapor Deposition (LT-PECVD) techniques, which have already been shown to be suitable for the fabrication of integrated optics devices [15,16,17].

2. Device Structure

The proposed modulator is an EA device based on a DLG embedded within the waveguide core. In principle, this condition can be technologically obtained if the waveguide core is fabricated with both c-Si and a-Si:H, with the Gr capacitor sandwiched in between, therefore avoiding the inefficient deposition of the Gr layers at the waveguide top or bottom. In these cases, in fact, Gr interacts only with the evanescent optical field. It is worth noting that good-quality a-Si:H can be deposited on Gr through PECVD at temperatures as low as 150 °C to 300 °C [18,19].
The schematic cross-section of the proposed device is shown in Figure 1. A rib waveguide geometry is used, specifically, with a thickness of H = 220 nm and a width of W = 500 nm. This ensures the presence of a single TE mode at a wavelength of λ = 1550 nm. To ensure an optimal quality of Gr, it can be protected by inserting the same material between two layers of hexagonal Boron Nitride (h-BN), which effectively preserves high carrier mobility in the 2D material [6,20]. The role of pure dielectric is instead played by HfO2, which was grown by a surface-controlled layer-by-layer process typical of atomic layer deposition (ALD) [21]. Thanks to its high-k value, this insulator boosts the GOG capacitance and, in turn, the modulation efficiency [6,22]. Additionally, the combination of h-BN and HfO2 ensures resilience to high voltages and preserves the advantageous properties of intrinsic graphene, such as high mobility and low doping levels.
Notably, the augmented breakdown voltage provided by this dielectric architecture, even beyond the regime of full transparency (Pauli blocking), results in an enhanced electro-optic response and a reduction in insertion losses.
The Au electric contacts must be sufficiently far from the waveguide center to keep metal absorption and, in turn, the insertion losses, low [23,24].
The device can be fabricated starting from a standard SOI wafer, with the required thickness of the Si device layer. After defining the bottom part of the waveguide, the lower h-BN/Gr/h-BN stack is formed through a hot pick-up technique and then properly defined with a mask/etch process. Afterward, HfO2 is deposited by ALD and subsequently defined. The second stack of h-BN/Gr/h-BN (top) is then laid, and a-Si:H is deposited by PECVD and soon defined to form the top part of the waveguide. Finally, after opening h-BN, Au contacts are formed. The quality of materials can be monitored consistently by Raman spectroscopy during the intermediate steps. It is worth highlighting that, while alignment tolerances in silicon processing are well-established, the industrial-scale integration of 2D materials presents unique challenges. These challenges encompass the development of scalable transfer techniques, accurate patterning methods, and reliable yield characterization. Addressing them at an industrial scale is critical for the successful commercialization of 2D material-based devices.
The proposed architecture is based on a double h-BN–SLG–h-BN heterostructure, whose large-area implementation has already been demonstrated by encapsulating CVD-grown single-layer graphene within h-BN, as reported in [25]. In that study, it was shown that, through appropriate encapsulation and cleaning protocols, room-temperature mobilities above 10,000 cm2 V−1 s−1 can be achieved in CVD-grown SLG transferred using a conventional and scalable PMMA-assisted wet process. Moreover, the encapsulation of SLG within h-BN has enabled the fabrication of functional devices, such as the THz detector presented in [26]. For instance, in that work, SLG was integrated between h-BN layers using well-established procedures: both h-BN and SLG flakes were prepared by micromechanical exfoliation on intrinsic Si substrates with a 285 nm SiO2 layer and sequentially assembled (top h-BN, SLG, and bottom h-BN) with poly (dimethylsiloxane) (PDMS) and polycarbonate (PC) stamps.
The use of low-temperature Plasma-Enhanced Chemical Vapor Deposition (PECVD) to deposit hydrogenated amorphous silicon (a-Si:H) on graphene, as described in this manuscript, has been experimentally validated by our group for photodetector fabrication [26]. In prior work, near-infrared waveguide-integrated detectors were produced with graphene positioned between an a-Si:H layer and a crystalline silicon (c-Si) layer. Our experimental analysis shows that PECVD at 100 °C enables the growth of high-quality a-Si:H while preserving the graphene lattice, as confirmed by Raman spectroscopy. The deposited a-Si:H exhibits a refractive index nearly matching that of c-Si, ensuring minimal impact on the atomic structure of graphene [27].

3. Simulation

The EA modulator was studied by performing multi-physics simulations [28] including (a) the calculation of the two-dimensional electric field distribution across the waveguide section, under different biases, both in static and time-varying conditions; (b) the calculation of the consequent change in the Fermi level of Gr; and (c) the determination of the propagating optical field modification using the Finite Difference Method (FDM) technique.
From a physical point of view, Gr is different from most optical materials in two important aspects. First, it is usually a very thin material with a thickness as small as one atom. Second, it is usually characterized using surface conductivity rather than volumetric permittivity. Gr, therefore, can be numerically simulated as a 2D material without the need for an extremely refined mesh, resulting in much faster simulations. Graphene’s surface conductivity is described through the Kubo formula [28]:
σ ( ω , Γ , μ c , T ) = σ intra ( ω , Γ , μ c , T ) + σ inter ( ω , Γ , μ c , T )
σ intra ( ω , Γ , μ c , T ) = i e 2 π 2 ( ω + i 2 Γ ) 0 ξ ( f d ( ξ ) ξ f d ( ξ ) ξ ) d ξ
σ inter ( ω , Γ , μ c , T ) = i e 2 ( ω + i 2 Γ ) π 2 0 f d ( ξ ) f d ( ξ ) ( ω + i 2 Γ ) 2 4 ( ξ / ) 2 d ξ
f d ( ξ ) 1 / exp ( ( ξ μ c ) / ( k B T ) ) + 1
where ω is the optical angular frequency, Γ the scattering rate, μc the chemical potential, T the temperature, e the electron charge, ħ the reduced Planck constant, kB the Boltzmann constant, and fd(ξ) the Fermi–Dirac distribution.
From the complex conductivity, it is possible to extract the in-plane complex permittivity of Gr through the formula [29,30]:
| | ( μ c ) = 1 + ι σ | | ( μ c ) ω 0 h
where h = 0.35 nm is the thickness of commercial Gr monolayers.
The complex permittivity of (5) is used to perform modal analysis for calculating the optical characteristics of the waveguide of Figure 1. In particular, by applying a voltage bias to the device’s left contact, the chemical potential μc is altered, inducing, in turn, a variation in ε and therefore in light propagation.
The electrical and optical parameters of materials used for simulations are listed in Table 1. The electric field distribution associated with the only propagating TE mode is shown in Figure 2a and was calculated for c-Si and a-Si:H thicknesses of 220 nm and 0 nm, respectively, meaning that the DLG is at the top. In this case, simulations provide an attenuation per unit length of the waveguide of 0.128 dB/μm at zero bias.
To examine the effect of the Gr bias, an isothermal steady-state electrical simulation was conducted. The top Gr layer was grounded, and a DC sweep was applied to vary the potential of the bottom Gr layer. By monitoring the band structure, the Fermi level can be extracted as the voltage varies, as illustrated in Figure 2b. With the application of a −3 V bias, ε‖ changes, and the optical attenuation decreases to about 0 dB/μm.
To assess the impact of the GOG position across the waveguide section, parametric simulations were repeated, keeping the overall waveguide thickness constant at 220 nm, while complementarily adjusting the c-Si and a-Si:H thicknesses.
Figure 3a shows the attenuation as a function of h2, namely the thickness of the c-Si layer (see Figure 1), at zero bias. Obviously, the most effective position of the Gr capacitor is close to the half height of the waveguide, where the field intensity is at its maximum, as shown in Figure 3b.
To achieve maximum modulation depth, optimal thicknesses of the h-BN and HfO2 layers were determined, as shown in Figure 4a,b. The parameters yielding the best overall performance are summarized in Table 2. It should be noted that both h-BN and HfO2 thicknesses can be chosen in proper ranges, without significantly affecting the simulation results.

4. Results

Figure 5a displays the attenuation of a 1550 nm light wave radiation through the optimized modulator for varying drive voltage Vbias. With the current design, the modulation depth, for a 1 μm long device, is as high as 0.34 dB by applying Vbias = −3 V. Transient simulations were also run in the electrical domain. The simulator takes into account the distributed parasitic series resistances, which are mainly concentrated in the graphene layers linking the Au contacts to the actual modulator. Parasitic capacitances are also present and are primarily embedded in the graphene–insulator–graphene structure. These parasitic elements, of course, affect the time response of the modulator. The calculated time-varying Fermi levels and free carrier distributions were used to determine the dynamic optical response.
The dynamic power dissipated at high switching frequencies might produce a heating of the device, which in turn would induce changes in the refractive index of silicon due to the thermo-optic effect. However, the operating principle of the device, based on modulation of absorption in the graphene capacitor, and its optical design, allows it to continue working properly. This is also shown in Figure 5a, where the attenuation as a function of voltage is reported for comparison at 400 K as well, which might be considered a practical operation limit for a photonic device.
Figure 5b shows the calculated frequency dependence of the transmitted signal amplitude for the device, which was obtained from the fast Fourier transform of the output signal in response to a −2.5 V step signal at the input. The −3 dB roll-off frequency is 39.5 GHz, while it is 32 GHz when the GOG structure is at the top.
In order to demonstrate the efficient transmission of digital data, time domain simulations were run to obtain an eye diagram at a receiver for a 50 μm long device, utilizing the Interconnect simulation environment [22], which is specifically designed for the simulation of photonic integrated circuits (PICs). In the setup of the virtual circuit, the signals required for the eye diagram were generated by a random pattern generator (PG), and the modulated light transmitted by the EA modulator was captured using a low-noise, high-frequency photodetector, which was subsequently connected to an oscilloscope. To prevent noise and reflections caused by the impedance mismatch between the modulator and the PG electrical output, the device was terminated using a 50 Ω load. This setup enabled the visualization of the eye diagrams shown in Figure 6 for a 40 Gb/s signal, which was obtained with input pulses switching between −1 V and −3 V. Here, the modulation performances of an EA modulator with the GOG capacitor placed at the waveguide center (exact position as in Table 2) and those obtained by laying the GOC capacitor at the waveguide top are compared. The dynamic ERs are 3.17 dB and 1.2 dB, respectively, showing a comparatively higher efficiency of our optimized device.
Table 3 summarizes the main performances of various double-layer graphene modulators reported so far compared to ours. It shows that, while the extinction ratios (ERs) are comparable to those of existing electro-absorption graphene modulators, the proposed device simultaneously offers a wide bandwidth (BW), high extinction ratio (ER), and compact footprint. Furthermore, it exhibits the highest modulation depth among the compared devices.

5. Conclusions

In this paper, we have investigated a photonic electro-absorption modulator integrating a buried active structure consisting of a graphene–insulator–graphene capacitor to enhance the optical response. The device benefits from the use of such a capacitor in a position where the electric field of the propagating TE mode is at its maximum. In contrast to earlier demonstrations of double-layer graphene modulators, this work introduces a more rigorous physical modeling framework combined with systematic dielectric/structural optimization.
While this optimized structure is not achievable with the standard silicon technology, it can be fabricated instead by introducing the deposition of hydrogenated amorphous silicon (a-Si:H) in the process, allowing the embedding of graphene within a rib waveguide made of c-Si and a-Si:H. In particular, we highlight experimentally feasible integration routes (LT-PECVD a-Si:H and ALD high-k dielectrics), enabling simultaneously enhanced modulation strength and bandwidth within a compact footprint.
The Gr capacitor is then placed in the best position to ensure maximum overlap with the propagating mode. A 0.34 dB/μm attenuation is calculated by numerical simulations at λ = 1550 nm. A realistic bandwidth of 39.5 GHz is estimated using HfO2 as the dielectric, as well as h-BN to encapsulate the graphene layers and preserve high electron mobility. The modulator is capable of operating signals with data transmission speeds of up to 40 Gb/s, with an extinction ratio of 3.17 dB.

Author Contributions

Conceptualization, B.H., F.G.D.C.; methodology, B.H., S.R., M.C., F.G.D.C.; simulations, B.H.; writing: B.H.; verification: B.H., S.R., M.C., F.G.D.C.; supervision, F.G.D.C. All authors have read and agreed to the published version of the manuscript.

Funding

This work was partially supported by the European Union under the Italian National Recovery and Resilience Plan (NRRP) of the NextGenerationEU partnership for “Telecommunications of the Future” (PE00000001—program “RESTART”—FP5 GraPHICs).

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. Schematic cross-section (not to scale) of the proposed EA modulator, consisting of a DLG created on a c-Si ridge on SiO2. An a-Si:H stripe, deposited on top, completes the SOI channel waveguide, which, overall, has a 500 nm × 220 nm cross-section. HfO2 is the dielectric material placed between the h-BN layers.
Figure 1. Schematic cross-section (not to scale) of the proposed EA modulator, consisting of a DLG created on a c-Si ridge on SiO2. An a-Si:H stripe, deposited on top, completes the SOI channel waveguide, which, overall, has a 500 nm × 220 nm cross-section. HfO2 is the dielectric material placed between the h-BN layers.
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Figure 2. (a) Electric field distribution for the propagating TE mode. The color map indicates the normalized electric field intensity. The black rectangle outlines the waveguide core region, while the horizontal black line represents the reference z = 0 axis used for field profile extraction; (b) variation in the chemical potential of the bottom graphene sheet as a function of the bias voltage.
Figure 2. (a) Electric field distribution for the propagating TE mode. The color map indicates the normalized electric field intensity. The black rectangle outlines the waveguide core region, while the horizontal black line represents the reference z = 0 axis used for field profile extraction; (b) variation in the chemical potential of the bottom graphene sheet as a function of the bias voltage.
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Figure 3. (a) Simulated attenuation as a function of h2 (thickness of the c-Si layer) to find the best position for the Gr capacitor; (b) Electric field intensity as a function of the position of the graphene-on-graphene stack along the z-axis. The color map represents the refractive index profile. The white curve shows the normalized TE-mode electric field intensity profile, while the vertical cyan line indicates the position of the embedded graphene capacitor (h-BN/Gr/h-BN stack).
Figure 3. (a) Simulated attenuation as a function of h2 (thickness of the c-Si layer) to find the best position for the Gr capacitor; (b) Electric field intensity as a function of the position of the graphene-on-graphene stack along the z-axis. The color map represents the refractive index profile. The white curve shows the normalized TE-mode electric field intensity profile, while the vertical cyan line indicates the position of the embedded graphene capacitor (h-BN/Gr/h-BN stack).
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Figure 4. (a) Attenuation dependence on hf (HfO2 thickness); (b) attenuation dependence on hb (h-BN thickness) for different layers of h-BN.
Figure 4. (a) Attenuation dependence on hf (HfO2 thickness); (b) attenuation dependence on hb (h-BN thickness) for different layers of h-BN.
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Figure 5. (a) Static electro-optical response of the device for bias voltage Vbias varying from −3 V to 3 V, calculated at 300 K and 400 K; (b) dynamic electro-optical response of the device. These images show the relative electro-optical response of the modulator as a function of frequency obtained by applying pulses of −2.5 V amplitude. The measured −3 dB bandwidth of the device is 39.5 GHz.
Figure 5. (a) Static electro-optical response of the device for bias voltage Vbias varying from −3 V to 3 V, calculated at 300 K and 400 K; (b) dynamic electro-optical response of the device. These images show the relative electro-optical response of the modulator as a function of frequency obtained by applying pulses of −2.5 V amplitude. The measured −3 dB bandwidth of the device is 39.5 GHz.
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Figure 6. Eye diagrams of the optical signal obtained at 1550 nm for the 50 µm long EA modulator at 40 Gb/s (5 ps/div) for (a) GOG in the middle and (b) GOG at the top of the waveguide. Color scale represents the probability density of signal trajectories: blue regions correspond to fewer occurrences while green/yellow regions indicate regions of highest trajectory density (most probable signal levels).
Figure 6. Eye diagrams of the optical signal obtained at 1550 nm for the 50 µm long EA modulator at 40 Gb/s (5 ps/div) for (a) GOG in the middle and (b) GOG at the top of the waveguide. Color scale represents the probability density of signal trajectories: blue regions correspond to fewer occurrences while green/yellow regions indicate regions of highest trajectory density (most probable signal levels).
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Table 1. Properties of used materials.
Table 1. Properties of used materials.
MaterialRefractive IndexWork Function (eV)
a-Si:H3.574.15
c-Si3.474.15
h-BN1.984.6
HfO21.872.9
SiO21.440.95
Table 2. Parameters that are used in the modulator.
Table 2. Parameters that are used in the modulator.
ParameterDescriptionBest Position
h1a-Si:H thickness105 nm
h2c-Si thickness106 nm
hbh-BN thickness0.33–2.31 nm
hfHfO2 thickness2–8 nm
Table 3. Comparison of reported electro-absorption (EA) and electro-optic (EO) modulators based on graphene and other materials (MD = modulation depth; BW = bandwidth; ER = extinction ratio).
Table 3. Comparison of reported electro-absorption (EA) and electro-optic (EO) modulators based on graphene and other materials (MD = modulation depth; BW = bandwidth; ER = extinction ratio).
RefMD
(dB/µm)
TypeWavelength (nm)Size
(µm × µm)
StructureBW (GHz)ER (dB)ModeYear
This work0.34EA155050 × 0.5Double-layer graphene,
h-BN–HfO2–h-BN
39.53.17TE2025
[6]0.037 EA155060 × 0.45Double-layer graphene394.4TM2021
[12]0.137EA1550120 × 0.65SOI waveguide (air-clad, DLG, 20 nm SiN spacer)291.7TE 2019
[11]0.165EA15501.2 × 18.09Double-stripe Si3N430.6-TE/TM2017
[31]28 dB EO15551 × 0.3Graphene on Si3N4 waveguide ring resonator30-TE2015
[9]0.16 EA153740 × 2Double-layer graphene optical modulator1-TE/TM2011
[32]0.2–0.3EA1550~1 × <1Hybrid plasmonic ridge waveguide7035-2024
[33]15 dB EA130050 × 5GaAs2.5-TE2025
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Hashemi, B.; Rao, S.; Casalino, M.; Della Corte, F.G. Design of a High-Efficiency Hydrogenated Amorphous Silicon Electro-Absorption Modulator with Embedded Graphene Capacitor. Photonics 2025, 12, 916. https://doi.org/10.3390/photonics12090916

AMA Style

Hashemi B, Rao S, Casalino M, Della Corte FG. Design of a High-Efficiency Hydrogenated Amorphous Silicon Electro-Absorption Modulator with Embedded Graphene Capacitor. Photonics. 2025; 12(9):916. https://doi.org/10.3390/photonics12090916

Chicago/Turabian Style

Hashemi, Babak, Sandro Rao, Maurizio Casalino, and Francesco Giuseppe Della Corte. 2025. "Design of a High-Efficiency Hydrogenated Amorphous Silicon Electro-Absorption Modulator with Embedded Graphene Capacitor" Photonics 12, no. 9: 916. https://doi.org/10.3390/photonics12090916

APA Style

Hashemi, B., Rao, S., Casalino, M., & Della Corte, F. G. (2025). Design of a High-Efficiency Hydrogenated Amorphous Silicon Electro-Absorption Modulator with Embedded Graphene Capacitor. Photonics, 12(9), 916. https://doi.org/10.3390/photonics12090916

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