Design of a Nonhomogeneous Nonlinear Synchronizer and Its Implementation in Reconfigurable Hardware
Abstract
:1. Introduction
2. Preliminaries
2.1. The Generalized Lorenz System
2.2. Unstable Dissipative Systems
- (i)
- An UDS Type I, if one eigenvalue is negative real and the other two are complex conjugate with a positive real part.
- (ii)
- An UDS Type II, if one eigenvalue is positive real and the other two are complex conjugate with a negative real part.
3. Synchronization Scheme
3.1. Master UDS–Slave GLS
3.2. Master GLS–Slave UDS
3.3. Master GLS–Slave GLS
3.4. Master UDS–Slave UDS
4. Results
5. Conclusions
Author Contributions
Funding
Acknowledgments
Conflicts of Interest
Abbreviations
FPGA | Field-Programmable Gate Array |
GLS | Generalized Lorenz System |
UDS | Unstable Dissipative System |
DAC | Digital to Analogue Converter |
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Resources | Used | Available | Utilization |
---|---|---|---|
Number of Slice Flip Flops | 159 | 11,776 | |
Number of 4 input LUTs | 4177 | 11,776 | |
Number of occupied Slices | 2473 | 5888 | |
Total Number of 4 input LUTs | 4467 | 11,776 | |
Number of bounded IOBs | 145 | 372 | |
Number of BUFGMUXs | 1 | 24 |
Resources | Used | Available | Utilization |
---|---|---|---|
Number of Slice Flip Flops | 170 | 11,776 | |
Number of 4 input LUTs | 2373 | 11,776 | |
Number of occupied Slices | 1491 | 5888 | |
Total Number of 4 input LUTs | 2677 | 11,776 | |
Number of bounded IOBs | 53 | 372 | |
Number of BUFGMUXs | 1 | 24 | |
Number of MULT18X18SIOs | 18 | 20 |
Resources | Used | Available | Utilization |
---|---|---|---|
Number of Slice Flip Flops | 332 | 11,776 | |
Number of 4 input LUTs | 5550 | 11,776 | |
Number of occupied Slices | 2964 | 5888 | |
Total Number of 4 input LUTs | 7244 | 11,776 | |
Number of bounded IOBs | 194 | 372 | |
Number of BUFGMUXs | 2 | 24 | |
Number of MULT18X18SIOs | 20 | 20 |
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Pulido-Luna, J.R.; López-Rentería, J.A.; Cazarez-Castro, N.R. Design of a Nonhomogeneous Nonlinear Synchronizer and Its Implementation in Reconfigurable Hardware. Math. Comput. Appl. 2020, 25, 51. https://doi.org/10.3390/mca25030051
Pulido-Luna JR, López-Rentería JA, Cazarez-Castro NR. Design of a Nonhomogeneous Nonlinear Synchronizer and Its Implementation in Reconfigurable Hardware. Mathematical and Computational Applications. 2020; 25(3):51. https://doi.org/10.3390/mca25030051
Chicago/Turabian StylePulido-Luna, Jesus R., Jorge A. López-Rentería, and Nohe R. Cazarez-Castro. 2020. "Design of a Nonhomogeneous Nonlinear Synchronizer and Its Implementation in Reconfigurable Hardware" Mathematical and Computational Applications 25, no. 3: 51. https://doi.org/10.3390/mca25030051
APA StylePulido-Luna, J. R., López-Rentería, J. A., & Cazarez-Castro, N. R. (2020). Design of a Nonhomogeneous Nonlinear Synchronizer and Its Implementation in Reconfigurable Hardware. Mathematical and Computational Applications, 25(3), 51. https://doi.org/10.3390/mca25030051