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Article

Adaptive Virtual Impedance Fault Overcurrent Suppression Method and Reactive Power Support Method with Frozen Reactive Power–Voltage Droop Control for Grid-Forming Converters

1
National Energy Shouguang Power Generation Co., Ltd., Shouguang 262714, China
2
School of Electrical Engineering, Shandong University, Jinan 250061, China
3
State Grid Zhengzhou Power Supply Company, Zhengzhou 450099, China
*
Author to whom correspondence should be addressed.
Processes 2026, 14(1), 9; https://doi.org/10.3390/pr14010009
Submission received: 2 October 2025 / Revised: 25 November 2025 / Accepted: 8 December 2025 / Published: 19 December 2025
(This article belongs to the Topic Power System Dynamics and Stability, 2nd Edition)

Abstract

With the rapid development of new energy, high-proportion new energy power systems have significantly reduced inertia and voltage support capacity, facing severe stability challenges. Virtual Synchronous Generator (VSG) control, which simulates the inertia and voltage source characteristics of traditional synchronous generators, enables friendly grid connection of new energy converters and has become a key technology for large-scale new energy applications. This paper addresses two key issues in low-voltage ride through (LVRT) of grid-forming converters under VSG control: (1) converter overcurrent suppression during LVRT; (2) reduced reactive power support due to retaining voltage-reactive power droop control during faults. It proposes an adaptive virtual impedance-based overcurrent suppression method and a frozen reactive power–voltage droop-based reactive support method. Based on the converter’s mathematical model, a DIgSILENT/PowerFactory simulation model is built. Time-domain simulations verify the converter’s operating characteristics and the improved LVRT strategy’s effect, providing theoretical and technical support for large-scale applications of grid-forming converters.

1. Introduction

Power electronic converters are the primary means of grid connection for wind and photovoltaic sources, with grid-following (GFL) converters currently dominating. GFL converters inject power as a current source via phase-locked loop (PLL)-based instantaneous voltage phase capture, featuring flexible configuration and mature technology. However, with rising renewable energy penetration, they fail to offset defects from synchronous generator replacement—including insufficient grid disturbance resilience and poor power angle, frequency, and voltage stability.
In contrast, GFM converters simulate synchronous generator characteristics to provide inertia/frequency support, possess voltage source properties for voltage support, and have adjustable output impedance (suitable for weak grids). They can also stabilize all-renewable power systems, making them key to solving new energy grid connection issues. Switching from GFM to GFL mode causes loss in voltage source property [1], so transient control strategies maintaining GFM mode have been proposed [2], categorized into overcurrent suppression, reactive support, and asymmetric fault negative-sequence control [3].
Existing research has limitations: (1) virtual impedance-based overcurrent suppression methods lack adaptive mechanisms (fixed impedance fails to adapt to dynamic system changes, and deep voltage dips impair terminal voltage control) [4,5,6,7,8,9,10,11]; (2) reactive power support methods overlook the weakened capability caused by retaining reactive-voltage droop during faults—its negative feedback reduces internal electromotive force, lowering reactive output [12,13,14,15,16].
To address these gaps, this paper proposes (1) an adaptive virtual impedance method (using current threshold deviation as feedback to adjust impedance dynamically) and (2) a frozen reactive voltage droop method (triggered by positive-sequence voltage to avoid droop-induced reactive loss). Complex simulations and HIL experiments verify the effectiveness of the proposed strategies.

2. Mathematical Model and Control Principle of VSG

VSG control simulates synchronous generator rotor motion [17], primary frequency regulation, excitation regulation, and damping inertia. This section constructs VSG topology and control models to lay a foundation for subsequent LVRT research.

2.1. Mathematical Model for Virtual Synchronous Generator Control

Figure 1 shows the LCL-filtered GFM grid-connected system. In this figure, the machine-side filter inductance is denoted as Lc, the grid inductance as Lg, and the filter capacitance as C, which, together, constitute an LCL filter; Udc represents the DC voltage; ug represents the grid voltage; ut represents the capacitor voltage; upcc represents the line voltage at the grid point; utdq, ugdq, iLdq, and igdq represent the dq components of the capacitor voltage, grid voltage, machine-side inductance current, and grid-point current, respectively; un and ωn represent the rated voltage effective value and rated angular frequency, respectively; and E represents the amplitude of the internal potential in the VSG.
The inverter interface is an LCL filter consisting of Lc, Lg, and C. Neglecting the modulation process of the converter and assuming that the converter can accurately track the reference voltage, the state equation is
d u td d t = 1 C ( ω C u tq + i Ld i gd ) d u tq d t = 1 C ( ω C u td + i Lq i gq ) d i Ld d t = 1 L c ( ω L c i Lq + u sd u td ) d i Lq d t = 1 L c ( ω L c i Ld + u sq u tq ) d i gd d t = 1 L g ( ω L g i gq + u td u gd R g i gd ) d i gq d t = 1 L g ( ω L g i gd + u tq u gq R g i gq )
In Figure 1, the components of grid voltage ug can be represented as
u gd = 2 u g cos δ u gq = 2 u g sin δ
In the formula, δ represents the phase angle at which the internal potential of the VSG leads the grid voltage. Assuming the angular frequency of the grid voltage is ωg, we have
δ = ( ω ω g ) d t
If the given active power reference value Pref is greater than the actual active power P, then d δ / d t > 0 , δ showing an increasing trend, and the active power increases with the increase in the power angle, reducing the deviation between the reference value of active power and the actual active power. This process continues until the two values become equal.
Assuming that the virtual rotor winding of the VSG is powered by a variable DC current source if, the output voltage is
E = θ ˙ M f i f sin θ ˜
Define
ϕ = ϕ a ϕ b ϕ c ,   i = i a i b i c
and
cos θ ˜ = cos θ cos θ 2 π 3 cos θ 4 π 3 sin θ ˜ = sin θ sin θ 2 π 3 sin θ 4 π 3
The active power P and reactive power Q generated by the converter at the bridge arm are, respectively,
P = i , E Q = i , E q
In the formula, < , > represents the traditional dot product operation, and E has the same amplitude but a phase lag of π/2. At this time,
E q = θ ˙ M f i f sin ˜ θ π 2 = θ ˙ M f i f cos ˜ θ
Therefore, the active power and reactive power at this time can be expressed as
P = θ ˙ M f i f i , sin θ ˜ Q = θ ˙ M f i f i , cos θ ˜
In the formula, i is the stator current, θ is the electrical angle of the rotor, and if is the excitation current of the rotor. Under the condition of sinusoidal steady state, we have
P = θ ˙ M f i f i , sin ˜ θ = 3 2 θ ˙ M f i f i 0 cos ( θ φ ) Q = θ ˙ M f i f i , cos ˜ θ = 3 2 θ ˙ M f i f i 0 sin ( θ φ )
When θφ = 0, the product of the effective values of voltage and current is the active power P. When the phase difference between voltage and current is θφ = π/2, the product is the reactive power Q, which corresponds to inductive loads when Q is positive. At this time, the rotor mechanical equation of VSG can be expressed as
θ ¨ = 1 J ( T m T e D p θ ˙ )
In the formula, Tm represents the virtual mechanical torque; Te represents the torque corresponding to the active power generated by the VSG, which is also known as the virtual electromagnetic torque; and Dp represents the damping coefficient, also known as the frequency droop coefficient. In the VSG, this formula, along with Formulas (4) and (8), constitutes the core of the electronic part of the VSG.
A two-level inverter is chosen for its simple topology, low cost, and low failure rate in medium-low voltage/power scenarios, sufficient to verify LVRT control strategies (adaptive virtual impedance, frozen droop). Multilevel inverters are better for high-voltage/high-power; the LVRT methods adapt by adjusting PWM voltage references and operating independently of level expansion logic, with future verification on a three-level platform.

2.2. Principles of Virtual Synchronous Generator Control

2.2.1. Active Power–Frequency Control Link

The speed of the synchronous generator rotor is adjusted by the prime mover, and physical friction generates a damping coefficient Dp. According to the frequency variation in the power grid, the synchronous generator can change the active power it generates, thus achieving uniform distribution of load, that is, frequency droop control [18]. The VSG can achieve this process by sending the difference between the virtual angular velocity θ ˙ and the rated angular velocity θ ˙ n to the damping module. At this time, Dp is the frequency droop coefficient of VSG, which is defined as the ratio of torque increment ΔT to speed increment Δ θ ˙ , that is,
D p = Δ T Δ θ ˙
At this time, the ratio of power change to corresponding frequency change is set. The mechanical torque Tm is given by the following formula:
T m = P set ω ref
The virtual rotational inertia of VSG can be calculated using the following formula:
J = D p τ f
where τf is the time constant of the frequency loop; J is the virtual rotational inertia of VSG.
The overall active power control equation is as follows:
J θ ¨ = T m T e D p ( ω ref ω )
In the formula, Te represents the electromagnetic torque, ωref denotes the rated angular speed, and ω signifies the actual angular speed [19]. The expression for electromagnetic torque is as follows:
T e = P ω ref
The feedback control loop for the active power of VSG is illustrated in Figure 2.

2.2.2. Reactive Power–Voltage Control Link

The reactive power control loop of VSG is similar to the active power control loop [20], and the voltage droop coefficient Dq is defined as the ratio between the change in reactive power ΔQ and the change in voltage Δu:
D q = Δ Q Δ u
The feedback control loop for reactive power is shown in Figure 3.
Similarly to the active power control structure, the reactive power regulation mechanism is also a cascaded control structure [21]. The inner loop is the voltage loop, and the outer loop is the reactive power loop. The time constant τu of the voltage loop is
τ u = K θ ˙ D q K θ ˙ n D q
Since the change in θ ˙ is small, at this time,
K = θ ˙ n D q τ u
The overall reactive power control equation is as follows:
K d E d t = Q ref Q + D q ( U ref U )
The overall control equation is as follows:
J θ ¨ = T m T e D p ( ω ref ω ) K d E d t = Q ref Q + D q ( U ref U )
Electromagnetic torque Te and reactive power Q are calculated using the provided formula. The control structure of the VSG outer loop is illustrated in Figure 4.
After the basic topological structure and control link modeling of VSG are completed, the modeling of the improved control link is carried out, including two parts: the virtual impedance control link and the voltage and current double closed-loop control link [22].

2.2.3. Virtual Impedance Control Link

Virtual impedance control can optimize the power distribution accuracy of parallel converters by introducing adjustable impedance characteristics into the line reference voltage, simulating the impedance distribution of the actual power system, and changing the equivalent impedance between the converter outlet and the PCC point. The traditional virtual impedance control expression is Rv + sLv, which is usually inductive. The inductance part sLv needs to be implemented through a differential link, which can amplify high-frequency noise. This paper uses Rv + jωXv instead of Rv + sLv to avoid the high-frequency noise problem caused by the differential link.
When using virtual impedance Rv + jωXv,
u t α ref = E cos θ u α u t β ref = E sin θ u β
In the formula, u t α ref represents the real part of the reference value provided by VSG to the voltage inner loop; u t β ref represents the imaginary part of the reference value provided by VSG to the voltage inner loop; E represents the amplitude of the internal potential of VSG; θ represents the voltage angle; u α represents the real part of the virtual impedance voltage drop; and u β represents the imaginary part of the virtual impedance voltage drop. The virtual impedance generates a voltage drop, which reduces the internal potential of VSG. The expression for the voltage drop is
u α = R v i g α X v i g β u β = R v i g β + X v i g α
In the formula, i g α represents the α component of the grid-connected point current, and i g β represents the β component of the grid-connected point current.
By adjusting the value of virtual impedance, the internal potential of VSG can be adjusted to suppress the fault overcurrent during voltage sag. In addition, proper virtual impedance settings can also achieve power decoupling. The control structure of the virtual impedance link is shown in Figure 5.
The introduction of virtual impedance in grid-connected converters can improve current distribution, avoid current imbalance and overload, and enhance system reliability.

2.2.4. Voltage and Current Double Closed-Loop Control Link

A typical voltage and current double closed-loop control system consists of a Proportional Integral (PI) controller [23]. The equation for the classic double closed-loop control system is as follows:
d ϕ d d t = u tdref u td d ϕ q d t = u tqref u tq d γ d d t = i Ldref i Ld d γ q d t = i Lqref i Lq i Ldref = ω C u td + K pv ( u tdref u td ) + K iv ϕ d i Lqref = ω C u tq + K pv ( u tqref u tq ) + K iv ϕ q u sd = u td ω L c i Lq + K pc ( i Ldref i Ld ) + K ic γ d u sq = u tq + ω L c i Ld + K pc ( i Lqref i Lq ) + K ic γ q
In the formula, Kpv is the proportional coefficient of the voltage loop PI controller; Kiv is the integral coefficient of the voltage loop PI controller; Kpc is the proportional coefficient of the current loop PI controller; Kic is the integral coefficient of the current loop PI controller; ϕ d and ϕ q are the state variables of the voltage loop PI controller; and γ d and γ q are the state variables of the current loop PI controller.
The voltage and current double closed-loop control structure is shown in Figure 6.
This paper adopts the classic “PI + double closed-loop” architecture, which has a simple structure, mature parameter tuning, and fast current/voltage regulation, fully meeting LVRT’s overcurrent suppression and reactive support objectives without complex algorithms.
MPC offers strong constraint handling and fast dynamic response, optimizing control effects when combined with the proposed methods. However, its heavy computational load raises hardware costs.
In conclusion, PI double closed-loop control meets this paper’s needs, with MPC as a subsequent optimization direction to be verified via HIL.

3. Fault Overcurrent Suppression Method Based on Adaptive Virtual Impedance

This section mathematically analyzes the fault overcurrent suppression principle of fixed virtual impedance, verifies its limitations via time-domain simulations in DIgSILENT PowerFactory, proposes an adaptive virtual impedance-based method, validates it under multiple voltage sag levels, and compares it with the fixed virtual impedance method under the same fault conditions [24,25].

3.1. Mechanism of Overcurrent Suppression Based on Virtual Impedance Fault

Due to the large number of power electronic devices in the grid-connected converter, its ability to withstand overcurrent is limited, and reasonable control methods are needed to suppress fault overcurrent. As shown in Figure 7, after introducing virtual impedance, the equivalent model of the grid-connected converter will also change. Rv and Xv in the figure represent the added virtual resistance and virtual reactance, respectively.
After introducing virtual impedance, the expression is as follows:
E ( t ) = ( r + R v ) i ( t ) + L d i ( t ) d t + j X v i ( t ) + U pcc ( t )
Before the fault occurs, the output current expression of the grid-connected point is
i ( 0 ) = E ( t ) U pcc ( 0 - ) r + R v + j ( ω L + X v )
At this time, the expression of the instantaneous value of the fault current is as follows:
i ( t ) = i ( 0 ) + 1 E r + R v L t U pcc ( 0 - ) U pcc ( 0 + ) r + R v + j ( ω L + X v ) = i ( t ) w + i ( t ) z i ( t ) W = E ( t ) U pcc ( 0 + ) r + R v + j ( ω L + X v ) i ( t ) Z = U pcc ( 0 + ) U pcc ( 0 - ) r + R v + j ( ω L + X v ) E r + R v L t
Compared with Formula (25), Formula (28) shows that the equivalent transmission impedance increases after using the virtual impedance control method. This not only reduces the peak overcurrent of the system but also reduces the reference value of the virtual synchronous machine voltage loop, avoiding a large current reference and thus suppressing the development of overcurrent and accelerating the elimination of fault current.

3.2. Limitations of Fixed Virtual Impedance in Suppressing Fault Overcurrent

According to the analysis in Section 3.1, after introducing a fixed virtual impedance, the expression for the steady-state component of the fault current is
i ( t ) W = E ( t ) U pcc ( 0 + ) r + R v + j ( ω L + X v )
When the voltage drops, the voltage at the grid connection point after the fault, Upcc(0+), decreases. At this time, due to the fixed virtual impedance that cannot change with the system operating state, the impedance value cannot be increased to balance the impact of the decrease in Upcc(0+). When the voltage drop is severe, i ( t ) W it can increase to above 1.25 p.u.
The expression for the transient component of the fault current is
i ( t ) Z = U pcc ( 0 + ) U pcc ( 0 - ) r + R v + j ω ( L + X v ) E r + R v L t
Similarly, when the voltage drops, the voltage at the grid connection point after the fault, Upcc(0+), decreases. The fixed virtual resistance impedance cannot increase its value under fault conditions to mitigate the impact of the decrease in Upcc(0+), and the amplitude of the transient current cannot be further limited.
From the above analysis, fixed virtual impedance for fault overcurrent suppression lacks real-time adjustment to system states, maintaining a fixed value across varying fault severities: in mild faults, excessive impedance impairs the VSG’s voltage and reactive power support capabilities; in severe faults, insufficient impedance fails to limit overcurrent to a safe range. Thus, it has obvious limitations.
To verify these limitations, a DIgSILENT PowerFactory simulation model of the grid-connected converter was built (using the system structure in Figure 8 and parameters in Table 1). With fixed virtual resistance (Rv = 0.5 p.u.) and reactance (Xv = 0.1 p.u.) values, the overcurrent suppression effect was analyzed under different voltage drop fault scenarios.
The relevant parameters are presented in Table 1.
Simulation verification of the limitations of fixed virtual impedance in fault overcurrent suppression involves two scenarios: mild voltage dips and severe voltage dips.
(1) Scenario 1: The voltage drop is relatively mild
At 0.1 s, a three-phase short-circuit fault occurs at 5% of line 1 with a transition impedance of 0.5 + j0.5 Ω (Figure 9). The voltage dip is shallow: the PCC three-phase voltage amplitude decreases from 1.0 p.u. to a minimum of 0.93 p.u. (remaining above 0.9 p.u.), and the maximum three-phase current is 1.22 p.u. (below 1.25 p.u.).
If the fault is cleared at 0.15 s, the grid voltage, current, active and reactive power conditions are as shown in Figure 10. After the fault is removed, the converter returns to normal operation.
Fixed virtual impedance performs well in fault overcurrent suppression, effectively limiting current to ≤1.25 p.u. during faults while enabling the converter to provide reactive support. However, its fixed value (non-adaptive to system conditions) keeps the fault current decay time constant high, prolonging recovery.
Under symmetrical faults, three-phase voltage and current change identically. For ease of analyzing voltage, current, and power variations, all variables are presented as amplitudes.
(2) Scenario 2: The voltage drop is relatively severe
Figure 11 shows the voltage, current, active and reactive power at the grid point if a three-phase short-circuit fault occurs at 13% of line 1 at 0.1 s, with a transition impedance of 0.5 + j0.5 Ω. The voltage drop is significant, with the grid point voltage amplitude dropping below 0.75 p.u. The maximum current amplitude is 1.486 p.u. and then stabilizes at 1.264 p.u., which is greater than 1.25 times the rated current. In this scenario, due to the inability of the fixed virtual impedance to adjust the impedance value in real time according to the system operating state, it cannot effectively suppress the fault overcurrent, and the converter has a serious overcurrent risk.
Simulation results show that with fixed virtual impedance for overcurrent suppression, a fixed setting can satisfy overcurrent suppression requirements in shallow voltage dips. However, its fixed value (non-adaptive to system conditions) keeps the fault current time constant high, prolonging recovery. In severe dips, the fixed impedance may fail to restrict fault current to a value below 1.25 p.u., risking converter overcurrent. Thus, an adaptive virtual impedance adjustment mechanism is required to match varying system operating states.

3.3. Principle of Adaptive Virtual Impedance for Suppressing Fault Overcurrent

To address the poor adaptability of fixed virtual impedance in fault overcurrent suppression, an adaptive virtual impedance method (Figure 12) is proposed. It introduces additional virtual resistance and reactance coefficients, taking the difference between measured and preset current thresholds as feedback to establish an adaptive adjustment mechanism. This mechanism adjusts impedance according to external conditions, enhancing the system’s overcurrent suppression capability under various fault scenarios.
The adaptive virtual impedance expression is R v + j ω X v , where
R v = R v 1 + K r I I lim X v = X v 1 + K x I I lim
where Kr is the additional virtual impedance resistance coefficient; Kx is the additional virtual impedance reactance coefficient; I is the grid-connected point current amplitude; and Ilim is the preset current threshold value. At this time,
u α = R v i g α X v i g β u β = R v i g β + X v i g α
In the formula, u α represents the real part of the virtual impedance voltage drop; u β represents the imaginary part of the virtual impedance voltage drop; i g α represents the real part of the measured current at the grid point; and i g β represents the imaginary part of the measured current at the grid point.
Figure 13 shows the fault equivalent model after replacing the virtual impedance with an adaptive virtual impedance.
The specific formula is as follows:
E ( t ) = ( r + R v ) i ( t ) + L d i ( t ) d t + j X v i ( t ) + U pcc ( t )
At this time, the expression for the grid-connected output current before the fault occurs is
i ( 0 ) = E ( t ) U pcc ( 0 - ) r + R v + j ( ω L + X v )
The current expression after the fault occurs is
i ( t ) = i ( 0 ) + 1 e r + R v L t U pcc ( 0 ) U pcc ( 0 + ) r + R v + j ( ω L + X v )
It can be decomposed into a steady-state component and a transient component, where the steady-state component i(t)W is
i ( t ) W = E ( t ) U pcc ( 0 + ) r + R v + j ( ω L + X v )
By substituting Equation (31) into Equation (36), we obtain
i ( t ) W = E ( t ) U pcc ( 0 + ) r + R [ 1 + K r ( I I lim ) ] + j ( ω L + X [ 1 + K x ( I I lim ) ] )
We reasonably set the additional resistance coefficient Kr, additional reactance coefficient Kx, and preset current threshold value Ilim. If a voltage drop occurs, the post-fault grid voltage Upcc(0+) decreases, and the measured current amplitude I at the connection point increases. The denominator in Equation (37) increases, balancing the impact of the decrease in Upcc(0+), so that i ( t ) W remains within a reasonable range. The transient component i ( t ) Z is
i ( t ) Z = U pcc ( 0 + ) U pcc ( 0 ) r + R v + j ( ω L + X v ) e r + R v L t
Formula (31) is substituted into Formula (38) to obtain
i ( t ) z = U pcc ( 0 + ) U pcc ( 0 - ) r + R 1 + K r I I lim + j ω L + X 1 + K x I I lim e r + R 1 + K r I I lim L t
In summary, the expression for the instantaneous value of fault current is as follows:
i ( t ) = i ( 0 ) + 1 e r + R 1 + K r I I lim L t U pcc ( 0 - ) U pcc ( 0 + ) r + R 1 + K r I I lim + j ω L + X 1 + K x I I lim i ( t ) W = E ( t ) U pcc ( 0 + ) r + R [ 1 + K r ( I I lim ) ] + j ( ω L + X [ 1 + K x ( I I lim ) ] ) i ( t ) Z = U pcc ( 0 + ) U pcc ( 0 - ) r + R 1 + K r I I lim + j ω L + X 1 + K x I I lim e r + R 1 + K r I I lim L t
Adaptive virtual impedance control adapts to different fault scenarios and system operating states via a feedback mechanism based on the difference between the preset current threshold and measured current amplitude (control structure shown in Figure 14).
Based on the VSG model in Section 2, a small-signal state-space model of the system with the proposed methods is constructed, selecting key state variables: virtual rotor angle, δ; virtual angular velocity, ω; capacitor voltage, utdq; inductor current, iLdq; adaptive impedance, Rv/Xv; and frozen droop, KG.
(1) Small-Signal Impact of Adaptive Virtual Impedance
We substitute Rv = Rv0 + ΔRv and Xv = Xv0 + ΔXv into the VSG power equation and current equation and obtain the impact of ΔRvXv on ΔPQ/Δi. Eigenvalue analysis shows the following:
  • When Kr = 1.5 and Kx = 1.5, the dynamic response of ΔRvXv is exponentially damped, with no oscillation or unstable modes;
  • If Kr/Kx > 5, weakly damped oscillation may occur, which needs to be avoided via parameter tuning.
(2) Small-Signal Impact of Frozen Droop Control
  • During faults, KG is constant, ΔKG = 0, with no additional impact on small-signal characteristics.
  • After fault clearance, KG = KG 0Dq·ΔQ. Substituting into the voltage equation, the impact of ΔKG on Δut is determined by the collaboration between Dq and voltage loop PI parameters. When Dq = 10, the ΔKG response is stable, without changing the system’s dominant stable mode.
In conclusion, with the paper’s parameters, all system small-signal eigenvalues have negative real parts, meeting stability requirements. Parameter tuning should adhere to the requirement of “Kr/Kx not excessively large and Dq matching voltage loop PI” to balance transient performance and small-signal stability.
(1) Experiment design: Fix Ilim =1.05 p.u., Rv0 =0.5 p.u., Xv0 =0.1 p.u., vary Kr (1.0~2.0) and Kx (1.0~2.0) separately, and test the current peak when the PCC voltage is 0.4 p.u.
(2) Result display (sensitivity curve):
When Kr increases from 1.0 to 1.5, the current peak decreases from 1.28 p.u. to 1.15 p.u.; when continuing to increase to 2.0, the current peak only decreases to 1.12 p.u., with diminishing marginal benefits; Kx has a weak impact on current peak, so Kx = 1.5 is selected to match Kr, balancing overcurrent suppression and algorithm complexity.

3.4. Simulation Verification of Improved Fault Overcurrent Suppression Method

3.4.1. Verification of Fault Overcurrent Suppression Using Adaptive Virtual Impedance Method

Unlike fixed virtual impedance, adaptive virtual impedance establishes an adjustment mechanism based on the difference between the measured current and the preset current threshold. The initial virtual impedance value does not affect the converter itself. Therefore, the initial virtual impedance can be set to a larger value to cope with different voltage sag scenarios. Set Rv to 1.0 p.u., Xv to 0.5 p.u., additional virtual impedance resistance coefficient Kr to 1.5, additional virtual impedance reactance coefficient Kx to 1.5, and preset current threshold Ilim to 1.05 p.u. and perform simulation verification under three different voltage sag levels.
(1) The grid voltage drops to 0.7 p.u.
Figure 15 presents the simulation waveforms of grid voltage, current, and active and reactive power under the adaptive virtual impedance overcurrent suppression method when the grid voltage sags to 0.7 p.u. at 1 s. Under this condition, the converter supports the grid voltage to 0.81 p.u., with the grid current limited to ~1.05 p.u. (no overcurrent risk). The converter reduces active power output and supplies more reactive power for terminal voltage support.
The steady-state current THD is 2.1%, which meets the requirement of “current THD ≤ 5%” in GB/T 37408-2019 [26] Technical Requirements for Grid-Connected Converters.
(2) The grid voltage drops to 0.4 p.u.
Figure 16 presents the simulation waveforms of grid voltage, current, and active and reactive power at the grid-tie point under the adaptive virtual impedance overcurrent suppression method when the grid voltage sags to 0.4 p.u. at 1 s. The converter supports the grid voltage to 0.52 p.u., with the grid current limited to ~1.15 p.u. (no overcurrent risk). Under severe voltage sag, the converter outputs more reactive power for terminal voltage support.
The steady-state current THD is 2.8%. Although the harmonic components increase slightly due to voltage sag, it is still within the standard range.
Simulation results confirm that the adaptive virtual impedance-based overcurrent suppression method effectively restrains overcurrent under various voltage sag levels, with a larger initial virtual impedance adapting to a wider range of voltage sags. To further emphasize its advantages over the fixed virtual impedance method, simulation verification and comparative analysis were performed under the same fault scenario and initial virtual impedance.

3.4.2. Comparative Analysis of Suppression Effects of Fixed and Adaptive Virtual Impedance Methods

Using the same fault scenario and virtual impedance values as in Section 3.2, the effects of fixed and adaptive virtual impedance methods on suppressing fault overcurrent were compared through time-domain simulation. The simulation system structure diagram shown in Figure 7 was also used, with system parameters shown in Table 1.
Set the additional virtual impedance resistance coefficient Kr to 1.5, the additional virtual impedance reactance coefficient Kx to 1.5, and the preset current threshold Ilim to 1.05 p.u. Similarly, set a three-phase short-circuit fault at 13% of line 1 at time 0.1 s. The grid voltage, current, and power conditions are shown in Figure 17. Compared to using a fixed virtual impedance for fault overcurrent suppression in Figure 11, the current is limited to a safe range after adopting the adaptive virtual impedance method.
A three-phase short-circuit fault occurs at 13% of line 1 (Figure 2, Figure 3, Figure 4, Figure 5, Figure 6, Figure 7, Figure 8, Figure 9, Figure 10 and Figure 11) at 0.1 s, with a transition impedance of 0.5 + j0.5. Fault overcurrent suppression comparisons are shown in Figure 18 (red solid line: fixed virtual impedance; blue solid line: adaptive). With adaptive control, the current is limited to below 1.25 p.u., and the steady-state current drops from 1.264 p.u. to 1.161 p.u. (8.15% reduction). Under the same conditions, adaptive virtual impedance dynamically adjusts with system states, achieving better fault overcurrent suppression.
At this time, if the fault is cleared at 0.3 s, the grid voltage, current, and power conditions are as shown in Figure 19. During the fault, the adaptive virtual impedance fault overcurrent suppression method functions normally, limiting the current amplitude to below 1.25 p.u. After the fault is cleared, the converter returns to normal operation.
Compared with fixed virtual impedance for fault overcurrent suppression, the adaptive method is more adaptable to diverse fault scenarios. It dynamically adjusts impedance against uncertain grid voltage dip depth and duration to suppress overcurrent and avoid overcurrent-induced equipment damage. It also adapts to different grid operation modes via real-time impedance adjustment, maintaining excellent low-voltage ride-through performance. Notably, overcurrent suppression may weaken the converter’s reactive support capability. Thus, proper settings for initial virtual impedance, additional resistance/reactance coefficients, and preset current thresholds are necessary—along with matching reactive power support methods—to ensure the converter outputs sufficient reactive power for voltage support without overcurrent risks.
Select three types of typical existing methods:
(1) Fixed virtual impedance (Ref. [4]): Parameters Rv = 0.5 p.u. and Xv = 0.1 p.u.;
(2) Traditional adaptive impedance (Ref. [5]): Parameters Kr = 1.0 and Kx = 1.0;
(3) Traditional droop control (no freezing, Ref. [12]): Parameter Dq = 10.
Parameter tuning basis for the proposed method is Kr = 1.5, Kx = 1.5, and Dq = 10, determined by sensitivity analysis. For specific comparisons, please refer to Table 2 and Table 3.
(1) Overcurrent suppression: By dynamically adjusting impedance, the proposed method suppresses overcurrent by an additional 1.35% compared to traditional adaptive impedance, while THD still meets standards.
(2) Reactive power support: Frozen droop avoids the negative feedback of traditional droop, with a reactive power increase rate 2.2 times that of traditional methods and a 43.75% shorter response time, as it does not require waiting for droop adjustment delay.

3.4.3. Real-Time Realization of Analysis and Engineering Challenges

(1) Controller Selection and Real-Time Performance
The core computational load of the adaptive algorithm includes (1) calculation of current amplitude I and deviation I-Ilim; (2) dynamic update of Rv/Xv; and (3) positive-sequence voltage extraction and droop freezing judgment. Recommended controller selections are as follows:
  • DSP Controller: TI TMS320F28379D, which can control the impedance update cycle within 50 μs, meeting the real-time requirements of grid-connected converters;
  • FPGA Controller: Xilinx Artix-7, realizing current calculation and impedance adjustment in parallel via hardware logic, with delay reduced to within 10μs, suitable for high-voltage and high-power scenarios.
(2) Engineering Challenges and Countermeasures
  • Current Detection Noise Interference: Sampling noise may cause I fluctuations, leading to incorrect Rv/Xv adjustment. Countermeasure: Add a second-order low-pass filter and sliding window averaging to smooth the current amplitude.
  • Engineering Adaptation of Parameters: Simulation parameters need to be adjusted according to the converter’s rated current and filter inductance. Countermeasure: Establish a parameter mapping model and iteratively optimize via the HIL platform.
  • Hardware Resource Conflict: The code size of the adaptive algorithm accounts for 15% of the total program in DSP, requiring avoidance of conflicts with PWM generation and communication modules. Countermeasure: Modular programming, assigning the algorithm to the CPU1 core of TMS320F28379D and other modules to CPU2 for multi-core parallel processing.
  • Impact of Temperature Drift: Temperature drift of sampling resistors and operational amplifiers reduces sampling accuracy. Countermeasure: Perform zero-point calibration via the pre-charging loop every 24 h to eliminate drift deviations.
Core calculation steps and computational burden of adaptive impedance (measured on TI TMS320F28379D DSP). The specific parameters are shown in Table 4 and Table 5.

4. Reactive Power Support Method Based on Frozen Reactive Power–Voltage Droop Control

The reactive power–voltage droop link helps grid-forming converters dynamically adjust reactive output and stabilize system voltage. However, retaining this link during faults boosts the converter’s reactive output, forcing its internal potential to drop and weakening its reactive support capability.
After analyzing this underlying mechanism, this section proposes a reactive power support method that freezes the reactive power–voltage droop link. It uses positive-sequence voltage amplitude to detect system faults and determine whether to freeze the link—enhancing the converter’s reactive support during voltage dips while avoiding post-fault overvoltage risks caused by prolonged droop freezing.

4.1. Mechanism Analysis of Droop Control Link Affecting Reactive Power Support Capability

The output of the grid-connected converter can be equivalent to the circuit structure shown in Figure 20. In the figure, UPCC represents the voltage at the PCC point, with its phase angle set as the reference phase angle; E represents the output voltage of the grid-connected converter port; Zθ represents the equivalent impedance from the converter to the PCC point; S represents the complex power flowing into the PCC point; and I ˙ O represents the output current of the converter.
At this time, I ˙ O can be expressed as
I ˙ O = E δ U PCC 0 Z θ = E δ U PCC 0 R + j X
The complex power S injected by the converter into the grid-side system can be expressed as
S = P + j Q = U ˙ PCC I ˙ O
By substituting Formula (41) into Formula (42), we can get
P = U PCC R ( E cos δ U PCC ) + E X sin δ R 2 + X 2 Q = U PCC X ( E cos δ U PCC ) E X sin δ R 2 + X 2
When the system is in a purely inductive environment, X >> R, R ≈ 0, and the formula can be simplified to
P = U PCC E sin δ X Q = U PCC ( E cos δ U PCC ) X
Generally, considering that the value of δ is small, it can be approximately considered that sin δ = δ , cos δ = 1 .
At this time, Formula (44) is transformed into
P = U PCC E δ X Q = U PCC ( E U PCC ) X
Assuming δ 0 , taking the differential of Equation (45) yields
d P d δ = U PCC E X d P d E = U PCC δ X 0 d Q d δ = 0 d Q d E = U PCC X
At this time, the active power P output by the converter mainly depends on the power angle difference, and the reactive power Q mainly depends on the voltage amplitude E, with almost no coupling relationship.
At this time, the reactive power output by the converter can be expressed as follows:
Q = U PCC ( E U PCC ) X
As Q increases, E also increases. This equation indicates that VSG can support voltage during a fault by providing more reactive power to the grid.
However, the VSG output voltage is controlled by the reactive droop link, and the expression for reactive droop control is
Q ref Q = D q U ref E
By transforming Equation (48), we can obtain the expression for the reactive power output by the VSG:
Q = Q ref D q U ref E
Grid voltage dips create a potential difference between the VSG’s internal potential and grid voltage, leading to a natural rise in the VSG’s reactive power output. Retaining the reactive droop link at this point introduces reactive power negative feedback, which lowers the internal potential E and reduces reactive output—hindering the inverter’s grid reactive support.

4.2. Principle of Reactive Power Support Based on Frozen Droop Control

This method uses the positive-sequence component of the grid voltage as the condition for fault identification. When the amplitude of the positive-sequence voltage is less than 0.9 p.u., it is determined that a voltage sag fault has occurred in the grid, and the reactive power droop control link is frozen. When the amplitude of the positive-sequence voltage is greater than 0.9 p.u., it is determined that the fault has been cleared, and the reactive droop control link is restarted.
The formula for VSG output voltage is
E = M f i f θ ˙ sin θ ˜
The voltage equation of VSG under droop control is
K d E d t = Q ref Q + D q ( U ref U )
where K is the reactive power loop inertia coefficient; D q is the voltage droop coefficient.
Transforming Equation (51) yields
d E d t = Q ref Q + D q ( U ref U ) K
The two formulas are equivalent; thus,
d E d t = Q r e t Q + D q ( U ref U ) K = E ω 0 sin δ = M f i f
δ is the phase angle difference between the internal electromotive force E and the point of common coupling (PCC) voltage U, and ω0 is the rated angular frequency of the power grid. This formula indicates that the traditional method of freezing the reactive power loop during a fault can be improved by stabilizing the value of Mfif. By setting Mfif to a fixed value of KG, Equation (50) will be transformed into
E = K G θ ˙ sin θ ˜
Equation (8) will be transformed into
P = θ ˙ K G i , sin ˜ θ = 3 2 θ ˙ K G i 0 cos ( θ φ ) Q = θ ˙ K G i , cos ˜ θ = 3 2 θ ˙ K G i 0 sin ( θ φ )
Without voltage-reactive negative feedback regulation, the new KG value during LVRT simultaneously enhances voltage and reactive power output. Physically, Mfif is the VSG’s magnetic flux; this method essentially freezes the reactive-voltage droop link and increases magnetic flux to raise the VSG’s internal potential, expanding the internal-grid potential difference for higher reactive output. Notably, raising internal potential during faults exacerbates overcurrent, so the strategy must be paired with adaptive virtual impedance overcurrent suppression to prevent current over-limit under severe voltage dips.
This study adopts the “Synchronous Reference Frame (SRF)-based positive-sequence extraction method” for fault detection.
The process involves transforming the three-phase PCC voltage uabc into αβ-frame voltages via Clark transformation then converting them into dq-frame components ud, uq using SRF transformation synchronized with the grid’s rated angular frequency ω0. These components are low-pass-filtered (5 Hz cutoff) to eliminate interference, obtaining the positive-sequence voltage amplitude U 1 = u d 2 + u q 2 . Droop control is frozen when U1 < 0.9 p.u. and restored otherwise.
(1) Small-signal modeling: Substitute frozen droop control into the VSG small-signal model, derive the characteristic equation, and analyze the impact of Dq on the system’s dominant poles.
(2) Results: When Dq = 5, the real part of the dominant pole = −0.12. When Dq = 10, the real part of the dominant pole = −0.28. When Dq > 15, the real part of the dominant pole = −0.05. Thus, Dq = 10 is selected to balance stability margin and response speed.

4.3. Simulation Verification of Improved Reactive Power Support Method

The system simulation model depicted in Figure 7 and the parameters listed in Table 1 were utilized. The effectiveness of the proposed reactive power support method was validated by simulating three different voltage sag conditions: mild, moderate, and severe.
(1) Operating condition 1: mild voltage drop (voltage drop to 70–90%)
A three-phase short-circuit fault occurs at 10% of line 1 at 0.1 s, with a transition impedance of 0.5 + j0.5 Ω. When the reactive power–voltage droop control link is not frozen during the fault, the grid voltage, current, and power conditions are shown in Figure 21.
After the fault, the grid-tie point voltage dropped to a minimum of 0.7894 p.u., while the converter reactive power continued to rise to 0.6654 p.u. at 1.45 s. Meanwhile, the grid-tie point current remained above 1.2 p.u. for a long time, posing an overcurrent risk to the converter.
With the proposed fault overcurrent suppression and reactive support method, when the voltage was detected below 0.9 p.u., the reactive-voltage droop control was frozen (KG = 1.014). The adaptive virtual impedance method was adopted with the following parameters: Rv = 0.5 p.u., Xv = 0.1 p.u., additional resistance coefficient Kr = 1.5, additional reactance coefficient Kx = 1.5, and preset current threshold Ilim = 1.05 p.u. The grid-tie point voltage, current, and active and reactive power results are shown in Figure 22.
As shown in Figure 22, after using the improved method of fault overcurrent suppression and reactive power support, the adaptive virtual impedance suppresses the fault current and protects the system from overcurrent damage. The improved method of reactive power support freezes the reactive-voltage droop control structure and adjusts the value of KG to increase the reactive power output of the converter. At 1.45 s, the reactive power increases from 0.6654 p.u. to 0.7431 p.u., an increase of 11.68%. Without the risk of overcurrent, the converter provides more sufficient reactive power support. The steady-state current THD is 2.3%, and the frozen droop control does not increase current harmonics.
The comparison of reactive power at this time is shown in Figure 23. The blue dashed line represents the reactive power output by the converter under the improved method, and the red solid line represents the reactive power output by the converter when the reactive-voltage droop control is not frozen. After freezing the reactive-voltage droop control during a fault, the converter outputs more reactive power to support the terminal voltage.
(2) Operating condition 2: moderate voltage drop (voltage drops to 40–70%)
A three-phase short-circuit fault occurs at 35% of line 1 at 0.1 s, with a transition impedance of 1 + j1 Ω. Figure 24 shows the voltage, current, and active and reactive power at the grid connection point when the proposed improvement method is not applied. The minimum voltage amplitude drop is 0.6873 p.u. The converter continues to provide reactive power support to increase the voltage, while the active power output continues to decrease and the reactive power continues to increase to raise the terminal voltage. During the fault period, the current amplitude remains above 1.25 p.u. for a long time, posing a serious overcurrent risk to the converter.
When the amplitude of the positive-sequence voltage is detected to be less than 0.9 p.u., it is determined that the system has experienced a fault. The control loop of Mfif is frozen, the fixed value KG is set to 1.02, and adaptive virtual impedance control is used for overcurrent suppression. At this time, the voltage, current, active power, and reactive power are shown in Figure 25.
By comparing Figure 24 and Figure 25, it can be seen that the improved reactive power support method based on the frozen reactive power–voltage droop link, combined with the adaptive virtual impedance fault overcurrent suppression method, effectively suppresses fault overcurrent while increasing the reactive power output of the grid-connected converter. Taking the time of 1.467 s as an example, the reactive power increases from 1.0 p.u. to 1.142 p.u., an increase of 14.2%. The converter provides more sufficient reactive power support during the fault period while also avoiding fault overcurrent caused by rapid reactive power support. The steady-state current THD is 3.0%, which meets engineering requirements.
Analysis of the current THD control effect:
(1) The LCL filter (L = 0.035 mH, C = 10 μF in Table 1) can effectively suppress high-frequency harmonics;
(2) The inductive component Xv of the adaptive virtual impedance (e.g., initial value 0.5 p.u.) further suppresses low-order harmonics (e.g., 3rd and 5th);
(3) The frozen droop only adjusts the voltage command amplitude without changing the sinusoidality of the current waveform, so it has no negative impact on THD.
The comparison of reactive power before and after the improvement is shown in Figure 26. The blue dashed line represents the reactive power output of the converter under the improved method, and the red solid line represents the reactive power output of the converter when the reactive-voltage droop control is not frozen. After freezing the reactive-voltage droop control during a fault, the reactive power output at each time node increases.
(3) Operating condition 3: severe voltage drop (voltage drops below 40% of rated voltage)
A three-phase short-circuit fault is set to occur at 65% of line 1 at 0.1 s, with a transition resistance set to 1 + j1 Ω. When the proposed improvement method is not used, the grid-connected voltage, current, and active and reactive power are shown in Figure 27. The minimum voltage amplitude drop is 0.3687 p.u., and the current amplitude during the fault period is consistently above 1.5 p.u., causing severe overcurrent in the converter and a significant increase in the output reactive power.
At this time, the primary control objective for the converter is to limit the current to prevent the inverter from being burned out, and there is no need to freeze the reactive power loop to increase the reactive power output of the converter. An adaptive virtual impedance control strategy is used to limit the current and remove the fault at 0.3 s. The voltage, current, active power, and reactive power conditions at this time are shown in Figure 28. The maximum current amplitude is 1.248 p.u. The adaptive virtual impedance control strategy effectively suppresses the fault overcurrent, and the converter provides more reactive power support during the fault. After the fault is removed, the reactive power–voltage droop control link is restored, and the converter returns to normal operation.
Through simulation verification under different voltage sag levels, it can be seen that the reactive power support method based on frozen reactive power–voltage droop control link combined with adaptive virtual impedance fault overcurrent suppression method can effectively function in various fault scenarios, enabling the grid-connected converter to output more reactive power without overcurrent risk.
Existing power grid protection schemes mainly include overcurrent protection, voltage protection, and distance protection. The proposed methods work synergistically with these schemes by suppressing overcurrent and supporting voltage, with the following specific interaction mechanisms:
(4) Interaction with Overcurrent Protection
The traditional converter overcurrent protection threshold is 1.2~1.5 times the rated current:
  • Minor faults: The adaptive impedance suppresses the current to within 1.05 p.u., avoiding false protection operation;
  • Severe faults: The current is suppressed to 1.248 p.u., close to the protection threshold, allowing the protection to operate normally according to the set time, with the method not interfering with the protection logic;
  • Adaptation suggestion: If the protection threshold <1.2 p.u., adjust Ilim to 1.0 p.u. to ensure threshold matching.
(5) Interaction with Overcurrent Protection
The undervoltage protection threshold of the distribution network is 0.85~0.9 p.u.:
  • When the voltage drops to 0.8~0.9 p.u., the frozen droop control quickly increases reactive power, restoring the voltage to above 0.85 p.u., avoiding protection tripping;
  • If the method fails and the voltage remains <0.85 p.u., the voltage protection can operate to cut off the fault, forming a “support-backup” mechanism.
(6) Interaction with Distance Protection
Distance protection judges the fault location via line impedance, and the impact of the proposed methods is negligible:
  • The converter-side impedance increased by the adaptive impedance is much smaller than the line impedance, not causing the protection to misjudge the fault location;
  • The frozen droop supports the voltage, reducing measurement errors of the protection caused by excessively low voltage.

4.4. Low-Voltage Ride-Through Verification Based on Hardware-in-the-Loop Experiments

To verify the correctness of the quantitative virtual impedance design method proposed in this paper, a hardware-in-the-loop (HIL) semi-physical simulation experimental platform was established using RT-LAB 2024.1.8 software. The HIL simulation platform mainly consists of a PC, an RT-LAB-based real-time digital simulator, and VSG controller hardware. The physical hardware of the HIL simulation platform and the logical principles of each component are illustrated in Figure 29. The VSG controller is a physical hardware unit, while other logical components are integrated into the simulation model of the real-time digital simulator.
The main circuit model of the VSG grid-connected system was constructed through simulation on the RT-LAB software platform. The simulation part achieves integration and data sharing with the controller hardware via the real-time digital simulator. After setting the control parameters of the controller hardware, the controller calculates PWM control signals based on the operational data transmitted from RT-LAB and sends these signals to the real-time digital simulator, ultimately realizing complete system control. The controller hardware features a sampling and control cycle of 4 kHz, and the frequency of space vector pulse width modulation (SVPWM) is also 4 kHz. This high sampling and control frequency ensures the real-time performance between the hardware control unit and the virtual simulation model of the main circuit.
The VSG controller hardware transmits data with the Real-Time Digital Simulator (RTDS) via a DB37 connecting cable. It receives real-time data such as current and voltage from the RTDS, calculates the PWM modulating wave signals based on its own control parameters and the operating status of the main circuit, and ultimately completes the real-time simulation of the entire system. The DB37 connecting cable interface and the fiber optic interface on the PC terminal are shown in Figure 30.
The specific parameters of the hardware-in-the-loop (HIL) experiment are consistent with Table 1. Figure 31 illustrates the variation in the fault current when the point of common coupling (PCC) voltage drops to 0.70 p.u. At this juncture, it can be observed from the figure that the current during the fault is constrained, thereby achieving the grid-forming inverter’s low-voltage ride-through capability under symmetrical faults.
Figure 32 illustrates the reactive power variation under this condition. With the proposed low-voltage ride-through (LVRT) control strategy, the power output during the fault period can reach the set value within an extremely short time.
Table 6 presents the peak fault currents of the VSG under hardware-in-the-loop (HIL) experiments with different voltage sag depths. It can be concluded from the experimental results that with the proposed low-voltage ride-through (LVRT) control strategy, all peak currents can be effectively limited, which verifies the correctness of the proposed control strategy.
We designed a comparison table of the deviations of core indicators between the simulation and HIL experiments under the same fault scenario (PCC voltage 0.7 p.u.). As shown in Table 7.
(1) Summary of deviation causes: The simulation model ignores hardware delays and sampling noise, leading to slightly worse HIL results than the simulation.
(2) Model correction plan: Add a “hardware delay module” and a “Gaussian noise module” in subsequent simulations to reduce the deviation rate between the simulation and HIL to within 3%.
(3) Engineering implications: Hardware calibration is required in practical deployment to reduce noise impact, and PWM dead time should be optimized to improve reactive support capability.

5. Conclusions and Future Outlook

Grid-forming converters achieve friendly grid connection of renewable energy by simulating traditional synchronous generator characteristics (e.g., voltage source and rotational inertia). This paper focuses on the low-voltage ride-through (LVRT) strategy of grid-forming converters under Virtual Synchronous Generator (VSG) control. The main conclusions are as follows:
(1) A fault overcurrent suppression method based on adaptive virtual impedance is proposed, overcoming the limitation of traditional fixed virtual impedance (unadjustable to actual operating conditions). It uses the difference between preset current threshold and measured value as feedback, dynamically adjusting virtual impedance via resistance/reactance coefficients to enhance grid-connected converters’ overcurrent suppression capability under various fault scenarios. Verified by simulations and comparisons with the fixed method, the proposed method effectively improves the converter’s fault overcurrent suppression performance.
(2) To address reduced converter reactive support caused by retaining reactive-voltage droop control, a reactive support method based on frozen droop control is proposed. It uses positive-sequence voltage amplitude as the fault detection quantity to identify system faults and determine whether to freeze the droop link, improving control response speed and reactive support capability of grid-connected converters during voltage sags. Simulations verify that the method avoids adverse impacts of the reactive droop link and significantly enhances the converter’s reactive output capability.
To address the current limitation of this paper and bridge the gap between simulation and real-world application, future work will focus on a streamlined practicalization plan, including physical prototype testing, field validation, and algorithm optimization, with details as follows:
1. Physical Prototype and Field Testing
  • Laboratory Prototype: Build a 20 kVA two-level converter (LCL filter parameters proportional to Table 1: L = 0.35 mH, C = 100 μF) with TI TMS320F28379D. Test under different PCC loads (resistive-inductive/capacitive) and voltage sags to verify overcurrent protection coordination and long-term stability.
  • Field Test: Embed the algorithms into existing converters in a 10 kV distribution network (State Grid Zhengzhou Power Supply Co., Ltd., Zhengzhou, China) to validate overcurrent suppression and reactive support under real grid disturbances.
2. Algorithm Optimization
Collaborate with manufacturers to optimize code efficiency, reducing the adaptive impedance module’s computational latency to <50 μs for industrial real-time requirements.
These efforts will verify simulation credibility, resolve “simulation-physical” parameter deviations, and provide data support for industrial application of the method.

Author Contributions

Conceptualization, C.L. and Z.D.; methodology, C.L. and S.Z.; software, C.L.; validation, L.M. and J.L. (Jiahao Liu); formal analysis, Z.D.; investigation, J.L. (Jiafei Liu); resources, C.L.; data curation, L.M.; writing—original draft preparation, C.L.; writing—review and editing, Z.D.; visualization, Q.K.; supervision, L.M.; project administration, Z.D.; funding acquisition, S.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Data Availability Statement

Dataset is available upon request from the authors.

Conflicts of Interest

Author Chengshuai Li was employed by the company National Energy Shouguang Power Generation Co., Ltd. Author Longfei Mu was employed by the company State Grid Zhengzhou Power Supply Company. The remaining authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

References

  1. Doostinia, M.; Falabretti, D.; Verticale, G.; Bolouki, S. Critical Node Identification for Cyber–Physical Power Distribution Systems Based on Complex Network Theory: A Real Case Study. Energies 2025, 18, 2937. [Google Scholar] [CrossRef]
  2. Li, X.; Yao, J.; Chen, W.; Zhou, W.; Zhou, Z.; Wang, H.; Jiang, Z.; Dai, W.; Wang, Z. Grid-Forming Converter Fault Control Strategy and Its Impact on Relay Protection: Challenges and Adaptability Analysis. Energies 2025, 18, 2933. [Google Scholar] [CrossRef]
  3. Mehmood, A.; Yang, F. Improvement of Power Quality of Grid-Connected EV Charging Station Using Grid-Component Based Harmonic Mitigation Technique. Energies 2025, 18, 2876. [Google Scholar] [CrossRef]
  4. Liu, C.; Tian, A.; Hu, Z.; Wu, Y.; Zhu, J.; Hu, Y.; Wu, T. Enhanced power recovery strategy in PV-ESS-VSG systems using coordinated virtual impedance and virtual damping control. J. Energy Storage 2024, 104, 114664. [Google Scholar] [CrossRef]
  5. Nandi, R.; Tripathy, M.; Gupta, C.P. Advanced Adaptive Virtual Impedance Based Dual Mode Inverter Controller for Power and Voltage Coordination in LV AC Microgrid. IEEE Trans. Ind. Appl. 2024, 60, 8495–8508. [Google Scholar] [CrossRef]
  6. Tutturen, T.; Suul, J.A.; D’Arco, S. Robust choice of virtual impedance for virtual synchronous machines accounting for grid impedance uncertainty. In Proceedings of the 2024 International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM), Ischia, Italy, 19–21 June 2024; pp. 307–312. [Google Scholar]
  7. Sun, Y.; Kong, D.; Zhang, Z.; Wang, Y.; He, H.; Heldwein, M.L. Decoupled distributed control of offshore wind farms connected to DR-HVDC based on novel adaptive virtual impedance. IEEE Trans. Power Electron. 2024, 39, 15242–15256. [Google Scholar] [CrossRef]
  8. Kherbachi, A.; Bendib, A.; Chouder, A.; Ahmed, H.; Benbouzid, M.; Motahhir, S. Design and analysis of virtual impedance control scheme based on MESOGI for improving harmonic sharing of nonlinear loads. Sci. Rep. 2024, 14, 13356. [Google Scholar] [CrossRef]
  9. Zhang, M.; Mu, L.; Chen, G.; Fang, C. A circulating current suppression strategy of VSG based on adaptive virtual complex impedance. Electr. Power Syst. Res. 2024, 228, 110065. [Google Scholar] [CrossRef]
  10. Hosseinpour, M.; Akbari, R.; Shahparasti, M. A Robust Photovoltaic Power Conditioning System Connected to Weak Grid Through Virtual Impedance Shaping. J. Sol. Energy Res. 2024, 9, 1870–1886. [Google Scholar]
  11. Bennia, I.; Daili, Y.; Harrag, A.; Alrajhi, H.; Saim, A.; Guerrero, J.M. Stability and Reactive Power Sharing Enhancement in Islanded Microgrid via Small-Signal Modeling and Optimal Virtual Impedance Control. Int. Trans. Electr. Energy Syst. 2024, 2024, 5469868. [Google Scholar] [CrossRef]
  12. Li, Z.; Li, H.; Sun, S. Virtual model predictive control for inverters to achieve flexible output impedance shaping in harmonic interactions with weak grids. IEEE Trans. Power Electron. 2024, 39, 10754–10767. [Google Scholar] [CrossRef]
  13. Li, Y.; Shao, Z.; Tu, Q.; Liu, J.; Tu, Z.; Li, Y. An adaptive virtual impedance control strategy based on power synchronization control. In Proceedings of the 2024 International Conference on HVDC (HVDC), Urumqi, China, 8–9 August 2024; pp. 906–911. [Google Scholar]
  14. Saimadhuri, K.N.Y.; Janaki, M. Advanced control strategies for microgrids: A review of droop control and virtual impedance techniques. Results Eng. 2024, 25, 103799. [Google Scholar] [CrossRef]
  15. Deng, Z.; Wang, H.; Qin, Y.; Igarashi, S.; Li, J.; Cai, X. An optimal short-circuit current control method for self-synchronization controlled wind turbines. In Proceedings of the 2022 IEEE Transportation Electrification Conference and Expo, Asia-Pacific (ITEC Asia-Pacific), Nanjing, China, 19–21 December 2022; IEEE: Piscataway, NJ, USA, 2022; pp. 1–6. [Google Scholar]
  16. Hu, X.; Li, Z.; Pan, C.; Li, H.; Liang, Y. An Adaptive Virtual-Impedance-Based Current-Limiting Method with the Functionality of Transient Stability Enhancement for Grid-Forming Converter. Electronics 2024, 13, 2750. [Google Scholar] [CrossRef]
  17. Yang, Y.; Wu, Z.; Quan, X.; Xiong, J.; Wan, Z.; Wei, Z. Inverters That Mimic a Synchronous Condenser to Improve Voltage Stability in Power System. Processes 2025, 13, 2927. [Google Scholar] [CrossRef]
  18. Pian, H.; Meng, K.; Li, H.; Liu, Y.; Li, Z.; Jiang, L. An Adaptive Control Strategy for a Virtual Synchronous Generator Based on Exponential Inertia and Nonlinear Damping. Energies 2025, 18, 3822. [Google Scholar] [CrossRef]
  19. Zhong, Q.; Weiss, G. Synchronverters: Inverters that mimic synchronous generators. IEEE Trans. Ind. Electron. 2010, 58, 1259–1267. [Google Scholar] [CrossRef]
  20. Yao, H.; Gao, S.; Lu, J. An Evaluation Method of the Equivalent Inertia of High-Penetration-Rate Distributed Photovoltaic Power Generation Connected to the Grid. Processes 2025, 13, 1871. [Google Scholar] [CrossRef]
  21. Liu, M.; Zhang, L.; Wu, Q.; Zhang, K.; Li, X.; Zhao, B. Research on Power Stability of Wind-Solar-PEM Hydrogen Production System Based on Virtual Synchronous Machine Control. Processes 2025, 13, 1733. [Google Scholar] [CrossRef]
  22. Chen, Y.; Wang, K.; Tang, H.; Qi, Z.; Tang, H. Energy storage quasi-Z source photovoltaic grid-connected virtual impedance VSG control strategy considering secondary frequency regulation. J. Power Electron. 2025, 25, 793–803. [Google Scholar] [CrossRef]
  23. Zhang, H.; Zhou, Y.; He, W.; Hu, J.; Huang, W.; Li, W.; Zhai, S. Mechanism Analysis of Low-Frequency Oscillation Caused by VSG from the Perspective of Vector Motion. Processes 2024, 12, 2303. [Google Scholar] [CrossRef]
  24. Zhang, Z.; Wang, Y.; Wang, C.; Su, Y.; Wang, Y.; Dai, Y.; Cui, C.; Zhang, W. Distributed Chance-Constrained Optimal Dispatch for Integrated Energy System With Electro-Thermal Couple and Wind-Storage Coordination. IEEE Trans. Ind. Appl. 2025, 61, 833–846. [Google Scholar] [CrossRef]
  25. Wang, K.; Wang, C.; Yao, W.; Zhang, Z.; Liu, C.; Dong, X.; Yang, M.; Wang, Y. Embedding P2P transaction into demand response exchange: A cooperative demand response management framework for IES. Appl. Energy 2024, 367, 123319. [Google Scholar] [CrossRef]
  26. GB/T 37408-2019; Technical Requirements for Grid-Connected Inverters of Photovoltaic Power Generation. China Standards Press: Beijing, China, 2019.
Figure 1. LCL-type filter VSG grid-connected system structure diagram.
Figure 1. LCL-type filter VSG grid-connected system structure diagram.
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Figure 2. VSG active power feedback control loop diagram.
Figure 2. VSG active power feedback control loop diagram.
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Figure 3. VSG reactive power feedback control loop diagram.
Figure 3. VSG reactive power feedback control loop diagram.
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Figure 4. VSG outer loop control structure diagram.
Figure 4. VSG outer loop control structure diagram.
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Figure 5. Virtual impedance link control structure diagram.
Figure 5. Virtual impedance link control structure diagram.
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Figure 6. Voltage–current dual closed-loop control structure diagram.
Figure 6. Voltage–current dual closed-loop control structure diagram.
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Figure 7. The equivalent system model diagram after introducing virtual impedance.
Figure 7. The equivalent system model diagram after introducing virtual impedance.
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Figure 8. Simulation system structure diagram.
Figure 8. Simulation system structure diagram.
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Figure 9. Fault result diagram under fixed virtual impedance control.
Figure 9. Fault result diagram under fixed virtual impedance control.
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Figure 10. Fault removal simulation waveform diagram.
Figure 10. Fault removal simulation waveform diagram.
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Figure 11. Simulation waveform diagram under severe voltage sag condition.
Figure 11. Simulation waveform diagram under severe voltage sag condition.
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Figure 12. Diagram of the overall structure of the improved fault overcurrent limitation method.
Figure 12. Diagram of the overall structure of the improved fault overcurrent limitation method.
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Figure 13. Diagram of adaptive virtual impedance system equivalent model.
Figure 13. Diagram of adaptive virtual impedance system equivalent model.
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Figure 14. Structure diagram of adaptive virtual impedance control.
Figure 14. Structure diagram of adaptive virtual impedance control.
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Figure 15. Simulation waveforms of the converter when the grid voltage sags to 0.7 p.u.
Figure 15. Simulation waveforms of the converter when the grid voltage sags to 0.7 p.u.
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Figure 16. Simulation waveforms of the converter when the grid voltage sags to 0.4 p.u.
Figure 16. Simulation waveforms of the converter when the grid voltage sags to 0.4 p.u.
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Figure 17. Adaptive virtual impedance control simulation waveform diagram.
Figure 17. Adaptive virtual impedance control simulation waveform diagram.
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Figure 18. Simulation comparison diagram of fixed virtual impedance and adaptive virtual impedance.
Figure 18. Simulation comparison diagram of fixed virtual impedance and adaptive virtual impedance.
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Figure 19. Adaptive virtual impedance control fault removal simulation waveform diagram.
Figure 19. Adaptive virtual impedance control fault removal simulation waveform diagram.
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Figure 20. The equivalent circuit of the converter output.
Figure 20. The equivalent circuit of the converter output.
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Figure 21. Simulation waveform of mild voltage sag symmetrical fault.
Figure 21. Simulation waveform of mild voltage sag symmetrical fault.
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Figure 22. Simulation waveform diagrams of symmetrical fault in VSG under LVRT strategy.
Figure 22. Simulation waveform diagrams of symmetrical fault in VSG under LVRT strategy.
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Figure 23. Reactive power comparison chart.
Figure 23. Reactive power comparison chart.
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Figure 24. Moderate fault simulation waveform.
Figure 24. Moderate fault simulation waveform.
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Figure 25. Simulation waveform diagrams of symmetrical fault in VSG under LVRT strategy.
Figure 25. Simulation waveform diagrams of symmetrical fault in VSG under LVRT strategy.
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Figure 26. Reactive power comparison chart.
Figure 26. Reactive power comparison chart.
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Figure 27. Simulation waveform of severe fault.
Figure 27. Simulation waveform of severe fault.
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Figure 28. Simulation waveform of severe fault under LVRT.
Figure 28. Simulation waveform of severe fault under LVRT.
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Figure 29. HIL simulation platform physical setup.
Figure 29. HIL simulation platform physical setup.
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Figure 30. Fiber optic port for connection between the PC and the controller.
Figure 30. Fiber optic port for connection between the PC and the controller.
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Figure 31. Comparison of current amplitudes at the link-point node.
Figure 31. Comparison of current amplitudes at the link-point node.
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Figure 32. The variation in the reactive power.
Figure 32. The variation in the reactive power.
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Table 1. The relevant parameters.
Table 1. The relevant parameters.
System ParametersNumerical ValueSystem ParametersNumerical Value
DC bus voltage Udc1.2 kVSwitching frequency ƒs10 kHz
Filter inductance L0.035 mHReference amplitude of AC voltage E00.69 kV
Filter capacitor C10 µFActive droop coefficient Dp100
Rated power of converter SN2 MVAReactive droop coefficient Dq10
Rated active power reference value Pref1.5 MWVirtual inertia J3 kg·m2
Rated angular frequency ω0314 rad/sReference frequency ƒ50 Hz
Length of route 110 kmRated current of circuit 10.531 kA
Resistance per unit length of line 10.076 Ω/kmLine 1 reactance per unit length0.208 Ω/km
Table 2. Overcurrent suppression comparison.
Table 2. Overcurrent suppression comparison.
MethodFault Scenario (PCC Voltage)Current Peak (p.u.)Overcurrent Suppression Rate (%)Steady-State THD (%)
Fixed virtual impedance (Ref. [4])0.4 p.u.1.48−18.42.5
Traditional adaptive impedance (Ref. [5])0.4 p.u.1.286.82.6
Proposed method (adaptive impedance)0.4 p.u.1.158.152.8
Table 3. Reactive power support comparison.
Table 3. Reactive power support comparison.
MethodFault Scenario (PCC Voltage)Reactive Power Increase Rate (%)Voltage Recovery Value (p.u.)Response Time (ms)
Traditional droop (Ref. [12])0.7 p.u.5.20.7580
Proposed method (frozen droop)0.7 p.u.11.680.8145
Table 4. System parameters.
Table 4. System parameters.
Calculation StepOperation TypeSingle Operation Latency (μs)Proportion of Total Control Cycle (%)
Grid current amplitudeFloating-point sqrt + square1.22.4
Current deviationFloating-point subtraction0.30.6
Adaptive impedance updateFloating-point multiplication + addition0.81.6
Total-2.34.6
Table 5. A “DSP + FPGA” dual-mode controller architecture.
Table 5. A “DSP + FPGA” dual-mode controller architecture.
Hardware ModuleModel/SpecificationKey Parameters
Main Controller (DSP)TI TMS320F28379DSampling frequency 20 kHz, 32-bit floating-point computing capability, multi-core parallel support
Coprocessor (FPGA)Xilinx Artix-7 XC7A35T35k logic cells, parallel processing of current sampling and PWM generation, latency ≤ 10 ns
Sampling ModuleADS868816-bit resolution, sampling rate 1MSPS, supporting three-phase current/voltage synchronous sampling
Communication InterfaceCAN 2.0B/EthernetFor data interaction with HIL platform (RT-LAB OP5700), baud rate 500 kbps (CAN)
Table 6. Fault current peaks under different voltage sag depths.
Table 6. Fault current peaks under different voltage sag depths.
Fault Voltage (p.u.)Fault Current Peak (p.u.)
0.851.05
0.701.11
0.651.13
0.501.20
0.351.24
Table 7. A “DSP + FPGA” dual-mode controller architecture.
Table 7. A “DSP + FPGA” dual-mode controller architecture.
IndicatorSimulation ResultHIL Experimental ResultDeviation RateAnalysis of Deviation Causes
Fault current peak (p.u.)1.111.153.6%HIL has 1.2 μs sampling delay, not included in simulation
Reactive power increase rate (%)11.6810.926.5%PWM dead time (0.5 μs) in hardware reduces reactive output slightly
Current THD (%)2.32.717.4%Hardware sampling noise (±0.02 p.u.) introduces harmonics
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MDPI and ACS Style

Li, C.; Dong, Z.; Zhang, S.; Mu, L.; Liu, J.; Liu, J.; Kai, Q. Adaptive Virtual Impedance Fault Overcurrent Suppression Method and Reactive Power Support Method with Frozen Reactive Power–Voltage Droop Control for Grid-Forming Converters. Processes 2026, 14, 9. https://doi.org/10.3390/pr14010009

AMA Style

Li C, Dong Z, Zhang S, Mu L, Liu J, Liu J, Kai Q. Adaptive Virtual Impedance Fault Overcurrent Suppression Method and Reactive Power Support Method with Frozen Reactive Power–Voltage Droop Control for Grid-Forming Converters. Processes. 2026; 14(1):9. https://doi.org/10.3390/pr14010009

Chicago/Turabian Style

Li, Chengshuai, Zirui Dong, Shuolin Zhang, Longfei Mu, Jiahao Liu, Jiafei Liu, and Qian Kai. 2026. "Adaptive Virtual Impedance Fault Overcurrent Suppression Method and Reactive Power Support Method with Frozen Reactive Power–Voltage Droop Control for Grid-Forming Converters" Processes 14, no. 1: 9. https://doi.org/10.3390/pr14010009

APA Style

Li, C., Dong, Z., Zhang, S., Mu, L., Liu, J., Liu, J., & Kai, Q. (2026). Adaptive Virtual Impedance Fault Overcurrent Suppression Method and Reactive Power Support Method with Frozen Reactive Power–Voltage Droop Control for Grid-Forming Converters. Processes, 14(1), 9. https://doi.org/10.3390/pr14010009

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