Research on Modeling Method of Testability Design Based on Static Automatic Fault Tree
Abstract
:1. Introduction
- Customized modeling for diverse application objects is of utmost importance. For instance, studies on the liquid rocket engine system [7], radar system [8], power filter combined system [9], and USB–GPIB controller interface circuit [10], among others, focus on refining the MSFM or hybrid diagnosis model to fit different objects. However, as objects change, these methods may become inapplicable.
- Tackling the challenge of identifying analog signals is essential. Chakrabarty et al. employed Monte Carlo simulation and threshold determination to evaluate the effectiveness of analog signals [11]. Similarly, Chen et al. enhanced Chakrabarty’s model and proposed adaptive threshold judgment theory, broadening the range of recognizable analog signals [12].
- Resolving the issue of insufficient information in existing models is crucial due to its versatility. The MSFM faces this challenge more prominently. For example, Yang et al. introduced two additional attributes to propose a new testability prediction method based on the MSFM [13]. Likewise, Sun et al. improved the single-feature dependency matrix through feature extraction and multi-value coding, presenting a testability model based on multiple features [14].
- This work establishes a novel and versatile model for testability design, capable of evaluating both system reliability and safety in one process.
- This study presents safety sensitivity indicators that can effectively assess the impact of faults on system safety and offers two new safety-related testing metrics as practical and reliable evaluation criteria for system safety.
2. Safety-Related Fault Model (SRFM)
2.1. Motivation
2.2. The Whole Picture of SRFM
2.3. Static Automatic Fault Tree
2.3.1. Fundamental Concepts of Nine Tuples
2.3.2. The Theoretical Analysis Process
- (a)
- The variable of is ;
- (b)
- The minimum cut set of corresponds to the event set one by one, so there is a modal sequence , and
2.3.3. Modal Change Analysis of MSFM Based on Nine Tuples
2.3.4. A General Static Automatic Fault Tree Modeling Method
2.4. Safety-Related Faults and Safety-Related Signal Features
2.4.1. Safety Sensitivity
2.4.2. Calculation of SRF and SRSF
2.5. Safety-Related Dependency Matrix (S-D Matrix)
2.6. New Metrics
3. Experimental Section
3.1. Experiment Setup
- Testability Modeling Process
- 2.
- Fault Diagnosis Process
3.2. Electronic Safety and Arming
- Power supply function: S1 logic power supply signal, S2 power supply signal.
- Logic control functions: S3 static switch 1 status signal, S4 static switch 2 status signal, S5 dynamic switch status signal, and S9 energy circuit conduction signal.
- Circuit boost function: S6 high-voltage capacitor voltage steady-state value and S7 high-voltage capacitor voltage boost speed.
- Trigger function: S8 ignition signal.
- Establishing the Static Automatic Fault Tree (SAFT)
- 2.
- Calculating the result of Safety-Related Faults (SRF) and Safety-Related Signal Features (SRSF)
- The probability of lightning striking the equipment using the ESA is generally one in hundreds of thousands. It is nearly impossible for lightning to penetrate the external shell of the equipment and affect the internal capacitance.
- If the feedback signal of the initiation circuit is abnormal, it is necessary to ensure that the high-voltage capacitor in the initiation circuit is charged.
- 3.
- Establishment of safety-related dependency matrix (S-D matrix)
3.3. Results and Analysis
- Improvement in TASAP: By comparing the S-D matrix and D matrix established for the ESA, when WFD is used as the processing algorithm, the TASAP of the former increases by 82%, and when IG is used, it increases by 303%. This indicates that the test sequence generated by the S-D matrix significantly enhances the system safety evaluation.
- Enhancement in TASAN: The S-D matrix and D matrix established for the ESA show an improvement in TASAN. With WFD, the former increases by 59%, and with IG, it increases by 52%. This reinforces the idea that the test sequence derived from the S-D matrix improves system safety evaluation.
- IG’s ETC remains largely unchanged: When IG is used as the processing algorithm, the ETC of the S-D matrix is reduced by only 0.0148 compared to the D matrix. This suggests that the ETC generated by the S-D matrix’s test sequence is comparable to or insignificantly different from that generated by the D matrix as measured by the ETC standard.
- Both WFD and IG achieve a 100% FDR: Using the ESA as the subject, it is clear that employing the S-D matrix for diagnostic fault testing (DFT) does not lead to a decline in FDR.
- Prioritization of safety-related tests: For instance, in the IG-processed S-D matrix result, T9 is initially selected as the test object. In contrast, T8 is the preferred test in the IG-processed D matrix result. In the case of the ESA, the accidental charging of the high-voltage capacitor (boost circuit) is a typical safety-related fault (SRF), significantly impacting safety. Testing T9 first directly assesses the status of the boost circuit, promptly detecting potential safety hazards. If T8 were tested first and a fault in the booster circuit was present, a safety risk might go unnoticed.
- Increased selection of safety-related tests: The test sequence based on the S-D matrix additionally selects T4, which tests the control signal of the dynamic switch for the ESA. This test is crucial for ensuring energy accumulation through dynamic switch closure, which is vital for ESA safety. However, the test sequence generated based on the D matrix lacks such targeted detection.
4. Conclusions
Supplementary Materials
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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Code | Description | ||
---|---|---|---|
X1 | Unexpected function of EFI due to lightning stroke | 0.0001 | −2.632 × 10−7 |
X2 | D3 accidentally outputs high voltage due to lightning stroke | 0.0001 | 0 |
X3 | Static switch 2 fault causes constant continuity between source and drain | 7.35 | −9.678 × 10−10 |
X4 | Dynamic switch fault causes constant continuity between source and drain | 7.35 | −9.678 × 10−10 |
X5 | Static switch 1 fault causes constant continuity between source and drain | 7.35 | 0 |
X6 | Photocoupler 6 in controller 1 is damaged, resulting in constant continuity of emitter and collector | 0.801 | 0 |
X7 | Chip fault in controller 1 causes IO_8_E7 constant output low | 0.801 | 0 |
X8 | Chip program error in controller 1 causes IO_8_E7 constant output low | 0.801 | 0 |
X9 | High output due to photocoupler 2 fault in interface circuit 1 | 1.77 | 0 |
X10 | Abnormal Order_1 signal | 0.058 | 0 |
X11 | Abnormal External_power_supply | 0.058 | 0 |
X12 | High output due to photocoupler 4 fault in interface circuit 3 | 1.77 | 0 |
X13 | Abnormal Order_3 signal | 0.058 | 0 |
X14 | Constant high output caused by operational amplifier 1 fault | 1.593 | 0 |
X15 | Constant low output caused by operational amplifier 2 fault | 1.593 | 0 |
X16 | R31 short circuit | 0.058 | 0 |
X17 | R32 open circuit | 0.058 | 0 |
X18 | R29 short circuit | 0.058 | 0 |
X19 | R30 open circuit | 0.058 | 0 |
X20 | High and low of port IO_8_B9 output dynamic change caused by chip program error in controller 2 | 0.801 | 0 |
X21 | Driver chip 2 fault in controller 2 causes out port to output differential signal | 0.801 | −1.709 × 10−10 |
X22 | Chip fault in controller 2 causes IO_8_B6 constant output low | 0.801 | −1.709 × 10−10 |
X23 | Chip program error in controller 2 causes IO_8_B6 constant output low | 0.801 | −1.709 × 10−10 |
X24 | High output due to photocoupler 3 fault in interface circuit 2 | 1.77 | −2.710 × 10−10 |
X25 | Abnormal Order_2 signal | 0.058 | 0 |
X26 | Abnormal feedback signal of the initiation circuit | 0.0001 | 0 |
X27 | Driver chip 2 fault in controller 2 causes out port to output differential signal | 0.801 | −1.709 × 10−10 |
X28 | Chip fault in controller 2 causes IO_8_B6 constant output low | 0.801 | −1.709 × 10−10 |
X29 | Chip program error in controller 2 causes IO_8_B6 constant output low | 0.801 | −1.709 × 10−10 |
X30 | High output due to photocoupler 5 fault in interface circuit 4 | 1.77 | −2.710 × 10−10 |
X31 | Abnormal Order_4 signal | 0.058 | 0 |
Module Code | Safety-Related Faults | Safety-Related Signal Features |
---|---|---|
M7 | Unexpected function of EFI due to lightning stroke | S6 |
M8 | High output due to photocoupler 3 fault in interface circuit 2 | S5 |
M10 | High output due to photocoupler 5 fault in interface circuit 4 | S8 |
M11 | Driver chip 2 fault in controller 2 causes out port to output differential signal | S8 |
Chip fault in controller 2 causes IO_8_B6 constant output low | S8 | |
Chip program error in controller 2 causes IO_8_B6 constant output low | S8 | |
M12 | Dynamic switch fault causes constant continuity between source and drain | S5,S7 |
M13 | Static switch 2 fault causes constant continuity between source and drain | S4,S7 |
T1 | T2 | T3 | T4 | T5 | T6 | T7 | T8 | T9 | T10 | |||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
S1 | S2 | S1 | S3 | S1 | S5 | S1 | S4 | S1 | S2 | S6 | S1 | S8 | S1 | S5 | S6 | S7 | S9 | |||
F1GN | M1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0.74 |
F2GN | M2 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0.38 |
F3GN | M3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.62 |
F4GN | M4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.40 |
F5GN | M5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.95 |
F5FN | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.82 | |
F6GN | M6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.18 |
F6FN | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0.56 | |
F7GN | M7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.12 |
F7GS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.0001 | |
F7FN | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0.79 | |
F8GN | M8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.23 |
F8GS | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1.8 | |
F9GN | M9 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.52 |
F10GN | M10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.96 |
F10 GS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.8 | |
F11GN | M11 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0.45 |
F11 GS1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.80 | |
F11 GS2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.80 | |
F11 GS3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.80 | |
F11FN | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0.81 | |
F12GN | M12 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.16 |
F12GS | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 7.3 | |
F12FN | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.59 | |
F13GN | M13 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.12 |
F13GS | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 7.3 | |
F13FN | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | |
F14GN | M14 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0.38 |
T1 | T2 | T3 | T4 | T5 | T6 | T7 | T8 | T9 | T10 | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
S1 | S2 | S1 | S3 | S1 | S5 | S1 | S4 | S1 | S2 | S6 | S1 | S8 | S1 | S5 | S6 | S7 | S9 | ||
F1G | M1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
F2G | M2 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 |
F3G | M3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F4G | M4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F5G | M5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F5F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
F6G | M6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F6F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | |
F7G | M7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F7F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | |
F8G | M8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F9G | M9 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F10G | M10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
F11G | M11 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
F11F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | |
F12G | M12 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F12F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
F13G | M13 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
F13F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
F14G | M14 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
Test | Description (A Means the Analogue Quantity, D Means the Digital Quantity) | Corresponding Signal Feature Number |
---|---|---|
T1 | Test the logic power supply signal level (A) | 1 |
T2 | Test the power supply signal level (A) | 2 |
T3 | Test the control signal level output from controller 1 to static switch 2 (D) | 1,3 |
T4 | Test the control signal level output from controller 2 to dynamic switch (D) | 1,5 |
T5 | Test the control signal level output from controller 2 to static switch 2 (D) | 1,4 |
T6 | Test the output voltage value of the boost circuit module (A) | 1,2,6 |
T7 | Test the control signal level output from controller 2 to the initiation circuit (D) | 1,8 |
T8 | Test the feedback voltage signal of high-voltage feedback module (D) | 1,5,6 |
T9 | Test the dynamic switch output signal (voltage or current can be used) (A) | 7 |
T10 | Test the output signal (voltage or current) of static switch 2 (A) | 9 |
Object | Processing Method | Test Sequence | FDR | ETC | TASAP | TASAN |
---|---|---|---|---|---|---|
S-D | WFD | T8→T7→T9→T10→T4 | 100% | 2.6376 | 0.2386 | 0.7143 |
IG | T9→T7→T6→T4→T10 | 100% | 1.8395 | 0.5584 | 0.6071 | |
D | WFD | T8→T9→T10→T7 | 100% | 1.9199 | 0.1306 | 0.45 |
IG | T8→T9→T7→T10 | 100% | 1.8427 | 0.1385 | 0.40 |
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Zhang, J.; Chen, D.; Gao, P.; Wang, Z.; Zhang, J. Research on Modeling Method of Testability Design Based on Static Automatic Fault Tree. Processes 2024, 12, 2826. https://doi.org/10.3390/pr12122826
Zhang J, Chen D, Gao P, Wang Z, Zhang J. Research on Modeling Method of Testability Design Based on Static Automatic Fault Tree. Processes. 2024; 12(12):2826. https://doi.org/10.3390/pr12122826
Chicago/Turabian StyleZhang, Jiashuo, Derong Chen, Peng Gao, Zepeng Wang, and Jingang Zhang. 2024. "Research on Modeling Method of Testability Design Based on Static Automatic Fault Tree" Processes 12, no. 12: 2826. https://doi.org/10.3390/pr12122826
APA StyleZhang, J., Chen, D., Gao, P., Wang, Z., & Zhang, J. (2024). Research on Modeling Method of Testability Design Based on Static Automatic Fault Tree. Processes, 12(12), 2826. https://doi.org/10.3390/pr12122826