# State Feedback with Integral Control Circuit Design of DC-DC Buck-Boost Converter

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## Abstract

**:**

## 1. Introduction

- The state-feedback with integral control law is designed based on an ideal small-signal model and tested with a nonlinear power converter model that includes all parasitic components;
- The realization of the proposed control circuit has been introduced using op-amps, resistors, and a capacitor;
- The closed-loop SIMULINK model and the corresponding closed-loop Simscape power converter circuit have been simulated in MATLAB to validate the design approach;
- The transient characteristics, tracking performance, and disturbance rejection capability of the proposed control circuit have been investigated.

## 2. Mathematical Model of Inverting DC-DC Buck-Boost Converter

#### 2.1. Nonlinear Model

_{1}. The inductor L and the capacitor C represent the energy storage components in the circuit. The switching elements S and D

_{1}operate alternatively in CCM, which give two possible structures for the dc-dc converter [17]. The non-ideal equivalent circuit of the power converter is given in Figure 1b. As shown in Figure 1b, the equivalent series resistances (ESRs) of L and C are ${r}_{L}$ and ${r}_{C}$, respectively. Moreover, ${r}_{F}$, ${V}_{F}$, and ${r}_{\mathit{DS}}$ represent the parasitic components of the diode D

_{1}and switch S, respectively.

#### 2.2. Linearized State-Space Averaged Model

## 3. State-Feedback with Integral Control Design

#### 3.1. Control Law Design

#### 3.2. Controller Gains Selection

_{s}≤ 5 ms. The desired specifications are selected based on the buck-boost simulation results reported in [24]. It is also required to track a time-varying reference voltage ${V}_{r}$, regulate the output voltage, and reject the line and load variations.

_{O}tracks the desired trajectory, while the percentage peak overshoot PO and settling time t

_{s}are about 4.7% and 1.7 ms, respectively.

#### 3.3. Structure of Proposed Control System

- Pulse-Width Modulator: The PWM subsystem contains a comparator that compares the state feedback with integral control law with the ramp voltage V
_{T}to generate the duty cycle d_{T}that drives the nonlinear power converter model; - Power Converter: The large-signal non-ideal dc-dc buck-boost converter model is built in MATLAB/SIMULINK using s-function based on the state-space equations given in (1) and (2). The nonlinear model emulates the dc-dc buck-boost converter dynamics;
- State Feedback with Integral Controller: The controller subsystem comprises the state feedback with integral control law given in (10) along with the state feedback controller gains defined in (24).

## 4. Realization of Analog Control Circuit

- Voltage sensor gain $\beta $: The buck-boost converter is designed to convert 28 V to 12 V. If the reference voltage ${V}_{r}=$ 2 V, then the feedback network gain $\beta $ is $\frac{{V}_{r}}{{V}_{o}}=\frac{2}{12}=\frac{1}{6}$;
- Summing, inverting, and differential op-amps: The gain of the summing, inverting, and differential op-maps in the control circuit is unity. Thus, the resistors of the summing op-amps ${R}_{S1}$, ${R}_{S2}$, and ${R}_{S3}$, inverting op-amp ${R}_{I1}$ and ${R}_{I2}$, and differential op-amp ${R}_{F1}$ and ${R}_{F2}$ are set to 5.1 kΩ;
- Pulse-Width Modulator: The peak ramp voltage ${V}_{T}$ is set to 2 V, whereas the switching frequency ${f}_{s}$ is 100 kHz.
- Inductor current gain ${K}_{1}$: In the control design section, the gain of the inductor current ${K}_{1}$ has been computed as 0.011. Since the gain ${K}_{1}=\frac{{R}_{L2}}{{R}_{L1}}$, the resistor ${R}_{L1}$ and ${R}_{L2}$ can be set to 100 kΩ and 1.1 kΩ, respectively;
- Output voltage gain ${K}_{2}$: In the control design section, the gain of the output voltage ${K}_{2}$ has been computed as 0.17. Since the gain ${K}_{2}=\frac{{R}_{V2}}{{R}_{V1}}$, the resistor ${R}_{V2}$ and ${R}_{V1}$ can be set to 100 kΩ and 17 kΩ, respectively;
- Integral gain ${K}_{3}$: As reported in [26], the integral gain is defined as ${K}_{3}=\frac{1}{{R}_{1}{C}_{1}}$. In the control design section, the gain ${K}_{3}$ has been computed as 600. If the resistor ${R}_{1}$ is assumed to be 33 kΩ, then the capacitor ${C}_{1}$ is 56 nF;

## 5. Flowchart of State-Feedback with Integral Control Design

## 6. Results and Discussion

#### 6.1. Validation of Control Design Approach

_{I}= 28 V). The simulation of the two closed-loop control schemes is conducted in MATLAB using (Automatic) solver and 0.1 µs step-size. The waveforms of the ramp voltage V

_{T}, control voltage u, gate-to-source voltage v

_{GS}, the inductor current i

_{L}, and output voltage v

_{O}during steady-state are shown in Figure 7. The simulation results of the mathematical closed-loop power converter model in SIMULINK and the corresponding closed-loop power converter circuit in Simscape Electrical are depicted in Figure 7a and Figure 7b, respectively.

_{T}is 100 kHz. The negative output voltage is due to the topology of the inverting dc-dc buck-boost converter. It can also be seen that the power converter operates in CCM because the inductor current waveform is maintained above zero. The average value of the inductor current is around 5.99 A.

#### 6.2. Rejection of Line and Load Variations

_{I}and load current i

_{O}. The output voltage response during line variation is shown in Figure 8. In Figure 8a, as v

_{I}changes from 28 V to 33 V, the percentage overshoot PO and settling time t

_{s}are about 2.6% and 5.50 ms, respectively. Moreover, when the input voltage v

_{I}changes from 28 V to 23 V as shown in Figure 8b, the maximum PO and t

_{s}are around 3.5% and 5.5 ms, respectively. In both cases, it can be noticed that v

_{O}is regulated at the desired value while maintaining consistent dynamics during the line variations.

_{O}are depicted in Figure 9. As shown in Figure 9a, when the load current i

_{O}increases from 4 A to 6 A, the output voltage v

_{O}exhibits a maximum percentage overshoot PO of 2% with settling time t

_{s}of 4 ms. However, when the load current i

_{O}decreases from 4 A to 2.5 A, Figure 9b shows that the output voltage v

_{O}has a maximum percentage undershoot PO of 1% and reaches the steady-state value after 3.5 ms.

_{s}≤ 5 ms).

#### 6.3. Tracking of Time-Varying Reference Voltage

_{O}during step changes in the reference voltage V

_{r}is shown in Figure 10. The power converter operates at nominal operating conditions (load resistance R = 3 Ω and input voltage V

_{I}= 28 V). It can be noticed that when the reference voltage V

_{r}steps down from 2 V to 1.5 V, the output voltage v

_{O}follows the desired trajectory v

_{d}and shifts down from −12 V to −9 V. Likewise, when the reference voltage V

_{r}steps up from 2 V to 2.5 V, then the output voltage v

_{O}tracks the desired trajectory v

_{d}and shifts down from −12 V to −15 V. In both cases, the output voltage v

_{O}takes about 5.5 ms with no percentage overshoot to reach the steady-state value. Thus, the simulation results show that the proposed control circuit tracks the desired trajectory effectively.

## 7. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

## Abbreviations

List of Acronyms | |

PWM | pulse-width modulated |

EV | electric vehicle |

NIOC | neural inverse optimal control |

EKF | extended Kalman filter |

MPC | model predictive control |

LHP | left-half-plane |

CPL | constant power load |

HIL | hardware-in-the-loop |

CCM | continuous conduction mode |

MOSFET | metal-oxide-semiconductor field-effect transistor |

ESR | equivalent series resistance |

PO | percentage overshoot |

$\mathrm{CP}$ | characteristic polynomial |

EMC | electromagnetic compatibility |

EMI | electromagnetic interference |

List of Symbols | |

S | MOSFET |

D_{1} | Diode |

L | Inductor |

C | Output capacitor |

${r}_{L}$ | Inductor ESR |

${r}_{C}$ | Capacitor ESR |

${r}_{F}$ | Diode forward resistance |

${V}_{F}$ | Diode threshold voltage |

${r}_{\mathit{DS}}$ | MOSFET on-resistance |

${v}_{I}$ | Large-signal input voltage |

${v}_{O}$ | Large-signal output voltage |

r | Large-signal load resistance |

${i}_{O}$ | Large-signal load current |

${d}_{T}$ | Large-signal time interval when S is ON |

${\stackrel{\mathrm{-}}{d}}_{T}$ | Large-signal time interval when S is OFF |

${i}_{L}$ | Large-signal inductor current |

${v}_{C}$ | Large-signal capacitor voltage |

${V}_{I}$ | Steady-state input voltage |

${V}_{O}$ | Steady-state output voltage |

$R$ | Steady-state load resistance |

${I}_{L}$ | Steady-state inductor current |

${D}_{T}$ | Steady-state time interval when S is ON |

${\stackrel{\mathrm{-}}{D}}_{T}$ | Steady-state time interval when S is OFF |

${\stackrel{\mathrm{~}}{i}}_{L}$ | Small-signal ac inductor current |

${\stackrel{\mathrm{~}}{v}}_{C}$ | Small-signal ac capacitor voltage |

$\stackrel{\mathrm{~}}{d}$ | Small-signal ac duty cycle |

$x$ | State variables vector |

$A$ | State matrix |

$B$ | Input matrix |

$C$ | Output matrix |

$D$ | Direct transmission matrix |

$\mathit{Co}$ | Controllability matrix |

u | System input |

y | System output |

${V}_{r}$ | Desired reference voltage |

$K$ | Constant gains vector |

$\mathsf{\Theta}$ | Zeros vector |

t_{s} | Settling time |

$\zeta $ | Damping ratio |

${\omega}_{n}$ | Natural frequency |

$P$ | Desired closed-loop poles vector |

$\beta $ | Voltage sensor gain |

${V}_{T}$ | Peak ramp voltage |

${f}_{s}$ | Switching frequency |

${K}_{1}$ | Inductor current gain |

${K}_{2}$ | Output voltage gain |

${K}_{3}$ | Integral gain |

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**Figure 1.**(

**a**) The inverting dc-dc buck-boost converter circuit. (

**b**) The equivalent circuit of the non-ideal buck-boost converter in CCM.

**Figure 4.**MATLAB/SIMULINK model of state feedback with integral control system of inverting dc-dc buck-boost converter.

**Figure 5.**Schematic of state-feedback with integral controlled PWM dc-dc buck-boost converter circuit.

**Figure 7.**Steady-state waveforms of (

**a**) MATLAB/SIMULINK model and (

**b**) Simscape Electrical circuit of the state feedback with integral control of PWM dc-dc buck-boost converter in CCM. The figures show the control input u, ramp voltage V

_{T}, gate-to-source voltage v

_{GS}, inductor current i

_{L}, and output voltage v

_{O}.

**Figure 8.**The tracking performance of the state feedback with integral control of inverting dc-dc buck-boost converter under line disturbance. (

**a**) The output voltage response v

_{O}when the input voltage v

_{I}changes from 28 V to 33 V during the time interval 20 ≤ t ≤ 32.5 ms. (

**b**) The output voltage response v

_{O}when the input voltage v

_{I}changes from 28 V to 23 V during the time interval 20 ≤ t ≤ 32.5 ms.

**Figure 9.**The tracking performance of the state feedback with integral control of inverting dc-dc buck-boost converter under load disturbance. (

**a**) The output voltage response v

_{O}when the load current i

_{O}changes from 4 A to 6 A during the time interval 20 ≤ t ≤ 32.5 ms. (

**b**) The output voltage response v

_{O}when the load current i

_{O}changes from 4 A to 2.5 A during the time interval 20 ≤ t ≤ 32.5 ms.

**Figure 10.**The output voltage response v

_{O}of the state feedback with integral control of PWM dc-dc buck-boost converter in CCM during a time-varying reference voltage V

_{r}. The upper sub-figure shows the step changes in reference voltage V

_{r}. The lower sub-figure shows the tracking performance of the output voltage response v

_{O}with respect to the desired trajectory v

_{d}.

Control Technique | Advantages | Disadvantages | References |
---|---|---|---|

Neural inverse optimal control (NIOC) | - Robustness against large disturbances.
- Estimating converter dynamics.
| - Complexity of practical control system design.
- High-cost control system implementation.
| [1] |

Artificial neural network-based control | [2] | ||

Model predictive control (MPC) | - Fast dynamical response.
- Accurate tracking performance.
| Practical implementation has not been discussed. | [3] |

Centralized MPC | - Fast dynamical response.
- Less computational efforts than traditional MPC.
| High-cost control system implementation. | [4] |

Direct model reference adaptive control | Robustness against voltage and frequency variations. | Complexity of control system implementation. | [5] |

Optimal adaptive control | Estimation of uncertainties and disturbances | High-cost control system implementation (dSPACE). | [6] |

Lyapunov-based nonlinear control | Robustness against load variations. | Practical implementation has not been covered. | [7] |

Inverse-system decoupling control | Disturbance rejection capability. | Design procedure of control circuit has not been provided. | [8] |

Feedback linearization control | Mitigation of CPL and zero dynamics. | Design procedure of control circuit has not been provided. | [9,10,11,12,13] |

State-feedback control via pole placement | Placement of closed-loop poles at desired locations. | Steady-state error issue. Design procedure of control circuit has not been provided. | [14,15,16,17,18] |

State-feedback with integral control | State variables regulation and steady-state error elimination. | Design procedure of control circuit has not been introduced. High-cost control system implementation (dSPACE). | [19] |

pole placement control with sensitivity function | Mitigation of CPL and non-minimum phase issue. | [20] |

**Table 2.**Parameters of dc-dc buck-boost converter [24].

Description | Parameter | Value |
---|---|---|

Inductor | L | 30 μH |

Output capacitor | C | 2.2 mF |

Load resistance | R | (1.2–12) Ω |

Inductor ESR | r_{L} | 0.050 Ω |

Output capacitor ESR | r_{C} | 0.006 Ω |

MOSFET on-resistance | r_{DS} | 0.110 Ω |

Diode forward resistance | r_{F} | 0.020 Ω |

Diode threshold voltage | V_{F} | 0.700 V |

Input voltage | V_{I} | 28 ± 4 V |

Output voltage | V_{O} | 12 V |

Switching frequency | f_{s} | 100 kHz |

**Table 3.**Characteristics of proposed control circuit response during step changes in load current, input voltage, and reference voltage.

Disturbance Type (∆i_{O}, ∆v_{I}, ∆V_{r})
| Overshoot/Undershoot (%) | Settling Time (ms) | Output Voltage (V) |
---|---|---|---|

$\u2206{i}_{O}\to $ 4 A to 6.0 A | 2 | 4 | −12 |

$\u2206{i}_{O}\to $ 4 A to 2.5 A | 1 | 3.5 | −12 |

$\u2206{v}_{I}\to $ 28 V to 33 V | 2.6 | 5.5 | −12 |

$\u2206{v}_{I}\to $ 28 V to 23 V | 3.5 | 5.5 | −12 |

$\u2206{V}_{r}\to $ 2 V to 2.5 V | 0 | 5.5 | −15 |

$\u2206{V}_{r}\to $ 2 V to 1.5 V | 0 | 5.5 | −9 |

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**MDPI and ACS Style**

Al-Baidhani, H.; Sahib, A.; Kazimierczuk, M.K.
State Feedback with Integral Control Circuit Design of DC-DC Buck-Boost Converter. *Mathematics* **2023**, *11*, 2139.
https://doi.org/10.3390/math11092139

**AMA Style**

Al-Baidhani H, Sahib A, Kazimierczuk MK.
State Feedback with Integral Control Circuit Design of DC-DC Buck-Boost Converter. *Mathematics*. 2023; 11(9):2139.
https://doi.org/10.3390/math11092139

**Chicago/Turabian Style**

Al-Baidhani, Humam, Abdullah Sahib, and Marian K. Kazimierczuk.
2023. "State Feedback with Integral Control Circuit Design of DC-DC Buck-Boost Converter" *Mathematics* 11, no. 9: 2139.
https://doi.org/10.3390/math11092139