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Fast and Efficient Sensitivity Aware Multi-Objective Optimization of Analog Circuits

1
Department of Electronics, ENET’com, University of Sfax, Sfax 3018, Tunisia
2
Department of Electronics, Electrotechnics and Control, ISSIG, University of Gabes, Gabes 6000, Tunisia
3
INAOE, Tonantzintla, Puebla 72840, Mexico
*
Author to whom correspondence should be addressed.
Technologies 2019, 7(2), 40; https://doi.org/10.3390/technologies7020040
Received: 25 March 2019 / Revised: 8 May 2019 / Accepted: 11 May 2019 / Published: 15 May 2019
(This article belongs to the Section Information and Communication Technologies)
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Abstract

This article introduces a novel approach for generating low-sensitive Pareto fronts of analog circuit performances. The main idea consists of taking advantage from the social interaction between particles within a multi-objective particle swarm optimization algorithm by progressively guiding the global leading process towards low sensitive solutions inside the landscape. We show that the proposed approach significantly outperforms already proposed techniques dealing with the generation of sensitivity-aware Pareto fronts, not only in terms of computing time, but also with regards to the number of solutions forming the tradeoff surface. Performances of our approach are highlighted via the design of two analog circuits. View Full-Text
Keywords: sensitivity analysis; multi-objective optimization; Pareto front; MOPSO-CD; NSGA-II; CMOS; CCII; VF; Richardson extrapolation technique sensitivity analysis; multi-objective optimization; Pareto front; MOPSO-CD; NSGA-II; CMOS; CCII; VF; Richardson extrapolation technique
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).
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Garbaya, A.; Kotti, M.; Bellaaj Kchaou, O.; Fakhfakh, M.; Guillen-Fernandez, O.; Tlelo-Cuautle, E. Fast and Efficient Sensitivity Aware Multi-Objective Optimization of Analog Circuits. Technologies 2019, 7, 40.

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