Memristor Models with Parasitic Parameters for Analysis of Passive Memory Arrays

Abstract

Memristors are valuable elements with very good memory and switching features. They have minimal power consumption, nano-scale sizes, and a possibility for integration with high-density Complementary Metal Oxide Semiconductor (CMOS) integrated circuits. They are applicable in neural networks, memory crossbars, and different electronic devices. This work considers some improved and existing models for memristors, functioning at high-frequency signals with a high speed and very good effectiveness. The main parasitic parameters—series resistance, capacitance, and small-signal direct current (DC) voltage and current shifting signals—are taken into account. An additional leakage conductance is analyzed as a parasitic component. The influence of the parasitic parameters on the normal functioning of memristor-based circuits is analyzed and evaluated at hard-switching and soft-switching modes. For investigations of the main characteristics of the considered models and their applicability in memory arrays, Linear Technology Simulation Program with Integrated Circuits Emphasis (LTSPICE) library models are generated and analyzed. The considered models operate at low-, middle- and high-frequency signals, clearly demonstrating the main properties of memristors. Their appropriate operation in passive memory arrays is analyzed and established. The proposed models have a 26% enhanced accuracy in fitting experimental i-v relations. They ensure good memory and switching properties for memory arrays. This work could be a suitable step towards the design and manufacturing of ultra-high-density memristor-based integrated chips.

1. Introduction

The memory and switching performance in doped metal oxides, like titanium dioxide (TiO₂), hafnium dioxide (HfO₂), tantalum oxide (Ta₂O₅), and others, is under rigorous investigations [1,2]. Such processes are related to diffusion and charge storing in non-stoichiometric metal oxides at applied voltage or current signals [3,4]. The memristor, also known as a memory resistor, was theoretically forecasted in 1971 by Leon Chua [5]. Its first implementation, based on titanium oxide, was generated in Hewlett-Packard labs by Stanley Williams’ research group [2]. Various technologies and materials are utilized for memristor and Resistive Random Access Memory (RRAM) manufacturing [6,7]. In the scientific literature sources [8,9,10], information for memristors based on polymeric, ferroelectric, magnetic materials and others is available. Several of the main and significant features of the memristors are their very low energy consumption, non-volatility, memory and switching properties, high-speed operation, nano-sizes and good compatibility with the present integrated chips and circuits [11,12,13]. Memristors are potentially applicable in memory arrays, digital and analog electronic circuits, neural networks and many other different kinds of electronic devices [14,15].

The engineering and design of electronic systems and devices require analyses with mathematical modeling, together with computer simulations, commonly utilizing software like MATrix LABoratory (MATLAB) [16], Simulation Program with Integrated Circuits Emphasis (SPICE) family products [17] and many others. In the group of SPICE family software products, LTSPICE ver. XVII [18,19] is one of the favored environments for the analysis of electronic devices due to its simple and user-friendly interface, free license, and very good convergence. When possible, simple SPICE models of the utilized electronic elements are applied. A lot of different existing metal-oxide memristor models are available in the related scientific literature [20,21,22]. Models such as Strukov–Williams, Joglekar, Biolek, Prodromakis, Lehtonen–Laiho and others [23] are frequently used in the scientific community, and they are also known as standard or classical memristor models. Such models are quite different from one another, owing to some specific aspects of their operation [21]. They frequently have a comparatively high complexity. This is one of the main reasons for the generation and use of modified and general memristor models. Each memristor has related parasitic parameters, associated with the parasitic capacitance, inductance, series resistance, parallel leakage conductance, and small-signal DC voltage and current components. In some cases, for low-frequency signals, such parasitic parameters could be ignored, but in some cases, when the memristors operate at high-frequency signals, they are important components for the modeling of experimental current–voltage characteristics.

The key purpose of this work is to suggest and analyze several simple, versatile, and efficient LTSPICE metal-oxide memristor models with parasitic parameters, appropriate for the analysis of memory crossbars, and to compare their behavior to their original standard and modified analog models. For the realization of this aim, several tasks are related. The generated simple and improved memristor models are based on Joglekar [21], Biolek [13] and Lehtonen–Laiho memristor models [12], including the main parasitic parameters—series resistance, parallel capacitance, parallel conductance, and small-signal DC voltage and current components. A simple modified memristor model is proposed. Its first equation relates the memristor voltage and current. It contains the ON-state and OFF-state conductivities and a state variable. The time derivative of the state variable depends on the memristor voltage raised to an odd integer power, and therefore the modified memristor model could properly operate at high-frequency signals. The window functions applied in the models restrict the memristor state variable, and some of them partially resolve the terminal state issues [11]. The proposed memristor models provide some advantages, according to the standard memristive models, including comparatively simple describing equations, decreased simulation time, and effective functioning. The proposed memristor models contain an activation voltage threshold and efficiently operate in hard-switching and soft-switching modes. The suggested memristor models, together with some standard and modified models, are applied and tested in a passive memory array [24,25]. The proposed models have a satisfactory accuracy, established after an adjustment to the experimental i-v relations of self-directed channel Knowm memristors [26,27,28]. The investigation of parasitic parameters is important for the design of memristor-based circuits [29,30,31]. In particular, they are crucial in the engineering of computer memories and neural nets [32,33,34].

The content of the paper is organized as follows. Section 2 presents a short summary of memristors, their structure, operation and modeling. Section 3 represents the memristor models under analysis. LTSPICE memristor library models are generated, explained and analyzed in Section 4. In Section 5, the application of the considered memristor models, together with several standard and modified models in passive memory crossbars, is presented. This is followed by a short comparison and discussion about the behavior of the considered standard and modified memristor models in Section 6. The concluding remarks and potential future directions are presented in the final Section 7.

2. Memristors—Structure, Operation and Modeling

For a better understanding of the memristor structure, functioning and corresponding mathematical modeling, a short overview and description is first presented.

2.1. A Short Description of Memristor Structure and Functioning

The switching and memory features of memristors, mainly based on metal-oxide materials, are based on a given number of free electric charges that could pass and partially be accumulated in the memristor nanostructure under applied voltage or current pulses [2,3]. The free charges could be retained for a long time interval in the memristor nanostructure. Usually, memristors are founded on partially doped metal oxides, chalcogenides, organic compounds and others. A basic attribute of memristors is their state variable x. This could be expressed as the ratio of the doped layer size to the full memristor size (or area) [2]. Owing to the limited size of memristors, the state variable is in the range between zero and one. The amount of the electric charges accumulated in the memristor nanostructure is proportional to the time integral of the flowing current and the related voltage signal [20]. The conductance of the memristor is proportional to the accumulated charges, determining the memory effect. The change in the stored charges with the applied voltage signals in the time domain determines the related switching properties of memristors.

2.2. Analytical Modeling of Memristors

Each memristor model is based on two equations, organized in a system [11]. The first expression relates the memristor voltage and current. This equation contains the state variable. The second equation connects the time derivative of state variable x and the memristor current i_mem (or the memristor voltage v_mem). A large cluster of standard memristor models, such as those of Williams–Strukov [2], Joglekar [21], Biolek [13], and Prodromakis [22], is represented with the following general mathematical system (1):

$$\left|\begin{array}{l}{v}_{mem}=\left[R_{ON}x+R_{OFF}\left(1-x\right)\right]\cdot i_{mem}\\ {\displaystyle \frac{dx}{dt}}=\eta \cdot k\cdot i_{mem}\left(v_{mem}\right)\cdot f\left(x\right); x_{t=0}=x_0\end{array}\right.$$

(1)

Here, the ON-state and OFF-state resistances, usually known as memristances, are denoted as R_ON and R_OFF. In other similar models, the ON-state and OFF-state conductivities G_ON and G_OFF, also known as memductances, are utilized instead of memristances. In the second equation of (1), also known as a state differential equation, the time derivative of the state variable dx/dt is presented in the left-hand side. In the right-hand side, the parameter η is a polarity coefficient [11]. It could be equal to 1 for a forward-biased memristor or to −1 for a reverse-biased memristor [12]. The coefficient k is a generalized physical parameter, and f(x) is a window function, applied for the restriction of the state variable between zero and one and for a complete or partial resolving of the boundary issues [29]. The initial value of the state variable is denoted as x₀. Based on the described general system, several standard and modified memristor models are discussed in the next sub-sections.

2.3. Standard Memristor Models [11,20]

Here are briefly discussed several of the mainly used existing memristor models, also known as standard memristor models. Almost all of the standard memristor models include window functions. Many of the frequently used window functions are founded on polynomials [2,13,21]. In some specific cases, these window functions are related to the so-called terminal state problems, when the state variable reaches one of its limiting values and then cannot be changed during the computer simulation [11].

The Joglekar memristor model is presented with the next system (2), using a comparatively complex polynomial window [21]:

$$\left|\begin{array}{l}{v}_{mem}=\left[R_{ON}x+R_{OFF}\left(1-x\right)\right]\cdot i_{mem}\\ {\displaystyle \frac{dx}{dt}}=\eta \cdot k\cdot i_{mem}\cdot \left[1-{\left(2x-1\right)}^{2p}\right]; x_{t=0}=x_0\end{array}\right.$$

(2)

The quantity p is a positive integer. When increasing its value, the Joglekar window function becomes flatter in the central region. Its complexity is a little bit higher than that of the Strukov–Williams memristor model [2]. The Strukov–Williams window function is a special case for the Joglekar window, when the coefficient p is equal to one. Both the Strukov–Williams and Joglekar windows are related to terminal state problems.

The Biolek memristor model [13] is presented with the next Formula (3).

$$\left|\begin{array}{l}{v}_{mem}=\left[R_{ON}x+R_{OFF}\left(1-x\right)\right]\cdot i_{mem}\\ {\displaystyle \frac{dx}{dt}}=\eta \cdot k\cdot i_{mem}\cdot \left\{1-{\left[x-stp\left(-i_{mem}\right)\right]}^{ 2p}\right\}; x_{t=0}=x_0\end{array}\right.$$

(3)

The Biolek window function is not related to terminal state problems. It can more realistically represent the boundary conditions and the related terminal effects. Its value depends on the state variable and on the memristor current direction. The Biolek window function can realistically represent the behavior of memristors at a hard-switching mode [11,13] and their rectifier effects.

The standard memristor model proposed by Lehtonen and Laiho [12] is a frequently utilized model with a very good accuracy. It can operate at low-, middle- and high-frequency signals. This model can represent symmetrical and non-symmetrical current–voltage relationships of memristors. It is presented in the next system (4) [12]:

$$\left|\begin{array}{l}{i}_{mem}=\beta \sinh \left(\alpha v_{mem}\right)x^n+\chi \left[\exp \left(\gamma v_{mem}\right)-1\right]\\ {\displaystyle \frac{dx}{dt}}=\eta \cdot a {v_{mem}}^m\left\{1-{\left[x-stp\left(-i_{mem}\right)\right]}^{ 2p}\right\}; x_{t=0}=x_0\end{array}\right.$$

(4)

Here, the coefficients χ, β, γ, α, n, p, m, and a are applied for the adjustment of the discussed memristor model according to experimentally recorded i-v relationships. The parameters n and m are positive odd integers. Here, the standard Biolek window function is used. The component stp(−i_mem) is the standard Heaviside step function [13]. The Lehtonen–Laiho memristor model has higher complexity according to the previously described models.

Almost all of the systems presenting standard memristor models could be analytically solved for low values of the positive integer exponent p in closed form solutions.

Each of the described standard memristor models, together with the other models existing in the scientific literature, could be transformed into a modified model with parasitic parameters.

Together with the mainly used standard models, some of the latest modified memristor models are shortly discussed [20]. They are mainly founded on Biolek or Joglekar window functions and Lehtonen–Laiho models. Sometimes, the positive integer exponents in the polynomial window functions are dependent on the applied voltage for a more realisitcal representation of the nonlinear ionic dopant drift [2]. Here, the suggested modified memristor model without parasitic parameters, denoted as C_mod, is mainly based on the Lehtonen–Laiho and Joglekar standard memristor models and is expressed by the next system of mathematical Equation (5):

$$\left|\begin{array}{l}{i}_{mem}=\left[G_{ON}x+G_{OFF}\left(1-x\right)\right]\cdot v_{mem} \\ {\displaystyle \frac{dx}{dt}}=\eta \cdot a_1{v_{mem}}^3\left[x\left(1-x\right)\right] {\displaystyle \frac{1}{1+\exp \left[a_2\left(\left|v_{mem}\right|-v_{thr}\right)\right]}}; x_{t=0}=x_0\end{array}\right.$$

(5)

The first expression in system (5) is based on the classical Joglekar and Biolek memristor models, using the ON-state and OFF-state conductivities G_ON and G_OFF instead of the memristances R_ON and R_OFF [21]. The second equation of (5) is the state differential equation. It is mainly based on the Lehtonen–Laiho memristive model [12]. The coefficient m from the original model is used here with a fixed value of 3, and, instead of the Biolek window function, the polynomial window x(1 − x) is applied for the simplification of the model. It is similar to the Hann window sin²(πx), but the used polynomial is related to some extent to terminal state problems. The final term in the state differential equation is a logarithmic–sigmoidal function, which contains the memristor activation voltage threshold v_thr. From a physical point of view, the activation threshold represents a specific switching threshold between the linear resistor mode and soft-switching mode. From a mathematical point of view, the activation threshold is also an effective parameter for tuning the memristor model. The coefficients a₁ and a₂ are used for adjusting the proposed memristor model [20]. The coefficient m has a fixed value of 3, and it is included as a representation of the nonlinear ionic dopant motion effects at applied high-level signals [2]. The standard memristor models described above are partially used for the generation of the proposed modified memristor model C_mod.

The described memristor models, represented by Formulas (1)–(4), are frequently used standard models, and Formula (5) proposes a modified memristor model with some applied simplifications and approximations.

In the next section, a new modified memristor model with parasitic parameters is proposed and analyzed in LTSPICE at sinusoidal and pulse modes, for both soft-switching and hard-switching operation. Its main features, related to memory and switching effects, are analyzed and confirmed.

3. Modified Memristor Models with Parasitic Parameters

3.1. General Information About the Proposed Memristor Models

A simple representation of a metal-oxide memristor is shown in Figure 1a for explanation of its structure and functioning [2,11]. It is founded on a partially doped oxide material. This electronic component is a polar one and has two electrodes—anode and cathode, respectively. The doped layer is saturated with oxygen vacancies and has a surface denoted by a₁. The whole memristor nanostructure has an area, represented as a₂. For this nanostructure, the memristor state variable is defined as x = a₁/a₂.

The conductance of the memristor, also known as a memductance, could be represented as a parallel connection of two state-dependent conductances. The main parasitic parameters are addressed. They are the parasitic resistance R_par, the capacitance C_par, the leakage conductance G_par, and the small-signal DC shifting components E_par and J_par. Shifting DC voltage and current sources are mainly applicable when the memristors operate at high-frequency signals. The parasitic resistance is related to the resistance of the metallic electrodes of the memory element. Parasitic capacitance is related to the partial separation and overlapping between the memristor electrodes. The parasitic conductance is related to the leakage currents in the oxide materials. The quantities G_ON and G_OFF are the ON-state and OFF-state conductances of the memristor element [2].

Although the memristor is a passive element, the DC additional components are mainly applied, related to the mathematical representation of non-symmetrical i-v relations and some other current–voltage characteristics, when the cross-point is not matching with the origin of the coordinate i-v plane. From another point of view, related to some observed physical phenomena, the contact potential difference, charge trapping effects, and measurement system bias are some of the associated reasons for the inclusion of DC components, included in parallel to the mathematical reasons. The input voltage is denoted as v_total. Figure 1b represents an equivalent electric circuit of the memristor with parasitic parameters. It is further used for the generation and analysis of the corresponding LTSPICE memristor models. In this modified memristor model, the parasitic inductance is ignored because its value is very low and its influence on the normal operation of the memristor element could be neglected.

3.2. Mathematical Modeling of the Proposed Memristor Models

The next modified memristor model with parasitic parameters [29,30] is denoted as C_modp. It is based on (5), and the schematic presented in Figure 1a. The proposed memristor model C_modp is represented by the next system (6):

$$\left|\begin{array}{l}{i}_{mem}=\left[G_{ON}x+G_{OFF}\left(1-x\right)\right]\cdot v_{mem} \\ {\displaystyle \frac{dx}{dt}}=\eta \cdot a_1{v_{mem}}^3\left[x\left(1-x\right)\right] {\displaystyle \frac{1}{1+\exp \left[a_2\left(\left|v_{mem}\right|-v_{thr}\right)\right]}}; x_{t=0}=x_0\\ i_{Gpar}=v_{mem}{G}_{par}\\ i_{Cpar}=C_{par}{\displaystyle \frac{d{v}_{mem}}{dt}}\\ i_{total}=i_{Cpar}+i_{Gpar}-J_{par}+i_{mem}\\ v_{mem}=v_{total}-i_{total}{R}_{par}-e_{par}\end{array}\right.$$

(6)

where G_par is an additional leakage conductance, i_gpar is the leakage current through it, C_par is the parasitic capacitance of the memristor and i_Cpar is the current through this element, J_par and E_par are small-signal DC shifting components, represented by current and voltage sources, R_par is a parasitic series resistance, and i_total and v_total are the current and voltage related to the terminals of the considered memristor. Here, the parasitic inductance is not taken into account because it has a very low value, less than 1 pH, and its influence on the normal operation of the memristor model could be ignored. In this way, the proposed modified memristor model is approximated and simplified [7]. For large-scale memristor arrays operating at frequencies higher than several GHz, the parasitic inductance must be taken into account.

The laboratory equipment for the measurement of the i-v relations of self-directed channel Knowm memristors is discussed in the next sub-section [26,27].

3.3. Laboratory Equipment and Measurements

A principal scheme of the laboratory measurement devices, the supplementary components, the Knowm memristor under analysis (manufacturer Knowm Inc., Santa Fe, NM, USA) and the connections between them is shown in Figure 2a. The memristor elements under analysis are encompassed in an integrated chip, shown in Figure 3b. A digital oscilloscope XDS3204AE (manufacturer OWON Technology, Eindhoven, the Netherlands) and a breadboard are also utilized. One of the self-directed channel Knowm memristors in the considered integrated circuit is selected for further analyses and measurements. The voltage across the memristor is derived by a signal generator XDG2060 (manufacturer OWON Technology, Eindhoven, the Netherlands). It is indicated with v_total, and it is applied to the electrodes of the horizontal channel of the oscilloscope. A limiting resistor, denoted as R_lim, with a resistance of 10 kΩ, is attached in a series to the memristor. It is used for limiting the current of the memristor and for its protection from high-intensity currents [30,31].

The voltage across the limiting resistor R_lim is directly proportional to the current of the Knowm memristor. It is directed to the vertical channel of the oscilloscope. The described scheme is utilized for the recording and observation of the i-v relations of the considered Knowm memristor for different sinusoidal and impulse signals at various frequencies and magnitudes. The current–voltage relations are first observed on the screen of the scope. Very frequently, Knowm memristors are widely known by their asymmetrical current–voltage characteristics. Then, the derived data are recorded as .csv files. They could be directly used for parameter estimation or might first be transformed to .xls files. They are used as sources of voltage and current signals during the parameter estimation processes in MATLAB-Simulink ver. 2016a, represented in the next sub-section. The first .xls file has two columns. The first column presents the time variable, which is sampled using a time step of 100 ps, related to the sample frequency, which has a value of 10 GHz. The time variable is indicated by t_out. The second column of the first file presents the sampled signal of the voltage directed to the Simulink model of the memristor under analysis. This signal is presented as v_total. The second file has an analogous organization, but its second column indicates the memristor experimental current, denoted with i_mes.

For computer analyses and simulations, a computer system (manufacturer Hewlett Packard, New York, NY, USA) with an Intel i5 processor, 2-core, operating frequency of 2.7 GHz, 512 GB SSD disk, 16 GB RAM, and Microsoft Windows 10 Pro operating is utilized. MATLAB, Simulink [16,17] version R2016a and LTSPICE XVII [18] are used as specialized software products for the investigations.

3.4. Fitting the Memristor Models in MATLAB-Simulink

The memristor models under analysis are adjusted according to experimentally recorded i-v characteristics of self-directed channel Knowm memristors, described in the previous sub-section [26,27]. For example, the proposed memristor model with parasitic parameters C_modp is used. Using system (6), a corresponding Simulink model is generated and used for the adjustment process. The proposed modified memristor model with parasitic parameters, indicated as C_modp and represented by (6), is adjusted in MATLAB–Simulink using the above-described .xls data files. The primary values of the model’s coefficients are randomly chosen in the respective intervals, restricted according to some physical considerations [20,25]. The Simulink memristor model generates the simulated current of the memory element, presented as i_total. The procedure for parameter estimation is founded on the gradient descent technique [17]. The squared difference between experimental and simulated memristor currents is utilized as a cost function. The usual number of iterations for parameter estimation is set up to the default value of 100. Usually, the estimation process is a time-consuming one and requires several hours. The end of the estimation process is achieved when the iterations are completed or if the cost function becomes lower or equal to a formerly established value [16]. After finishing the estimation process, a low relative error of about several percent between the simulated and the experimental current–voltage characteristics is derived. A minimal root mean square error (RMSE) for the simulated and experimental i-v characteristics is achieved. Figure 3 represents the fitting processes for models C_mod and C_modp using experimentally recorded current–voltage relations of Knowm self-directed channel memristors, derived at a high-frequency voltage signal with a frequency of 1 kHz. Figure 3a presents the obtained experimental and simulated i-v relations using the memristor model without parasitic parameters, C_mod. Figure 3b depicts the derived experimental and simulated current–voltage relationships using the memristor model with parasitic parameters, C_modp, at a frequency of 1 kHz. In this case, the parasitic parameters do not strongly affect the i-v relations. For signals with frequencies of about 1 kHz, both the memristor models C_mod and C_modp could be used for fitting the experimental data.

Figure 4 represents the fitting processes for models C_mod and C_modp using experimentally recorded current–voltage relations derived at a high-frequency voltage signal with a frequency of 10 kHz. Figure 4a presents the obtained experimental and simulated i-v relations using the memristor model C_mod. Figure 4b depicts the derived experimental and simulated current–voltage relationships using the memristor model with parasitic parameters, C_modp, at a frequency of 10 kHz. Some conclusions can be derived from Figure 3 and Figure 4. After a visual comparison of the obtained experimental and simulated current–voltage relations of a Knowm memristor, it can be stated that, at a low frequency of 1 kHz, the models C_mod and C_modp give similar results, and the model C_mod could be used instead of C_modp. At a high frequency of 10 kHz, unfortunately, only model C_modp gives adequate results, so the parasitic parameters could not be ignored.

Figure 5a represents the parameter trajectories for model C_modp during the estimation process, founded on a gradient descending algorithm in Simulink [16]. The values of these parameters are scaled. Figure 5b depicts the respective time diagrams of the memristor voltage, state variable, and simulated and experimental memristor currents after the tuning process. The corresponding experimental and simulated current–voltage relations are presented in Figure 5c. A good proximity between these characteristics is observed. A low root mean square error (RMSE) between the characteristics is derived. This confirms a comparatively good precision of the suggested modified memristor model C_modp.

In some cases, experimental current–voltage relations are associated with some noise signals. Also, some physical parameters of the memristor could vary in time from device to device. The robustness of gradient descent algorithms in parameter estimation for a given memristor model reflects the algorithm’s capability to converge reliably under noisy experimental data and a variability of memristor parameters. Noise disturbs gradient estimates, hypothetically causing slower convergence or local minima catching. In such cases, stability, sensitivity and resistance to stochastic disturbances are important evaluation criteria. The optimal values, derived after the estimation process, of the memristor model’s parameters are: m = 3, a₁ = 1.4815 × 10⁵ V⁻³·s, a₂ = −1323.9 V⁻¹, C_par = 10.028 pF, E_par = −0.0874 V, G_OFF = 198.3 pS, G_ON = 137.74 µS, G_par = 2.77 pS, J_par = 2.175 µA, R_par = 1.02 Ω, v_thr = 0.1276 V, and x₀ = 0.8562. After the tuning process, the proposed memristor model is investigated at sinusoidal and impulse signals in Simulink and MATLAB for both soft-switching and hard-switching modes. The correct operation of the proposed model and its efficiency are established. A comparison between the RMS errors obtained from memristor models C_mod and C_modp during parameter estimation at two different frequencies is presented in

Table 1. A comparison of the RMSE (root mean square error) between the memristor models C_mod and C_modp, at two different frequencies—1 kHz and 10 kHz, respectively.

Memristor Model	RMSE at 1 kHz	RMSE at 10 kHz
Cmod	5.65 × 10−7 A	4.35 × 10−7 A
Cmodp	4.17 × 10−7 A	1.12 × 10−7 A

.

It can be concluded that the difference between the obtained errors for 1 kHz is lower than the respective difference in errors at 10 kHz. In this sense, memristor model C_modp is more suitable for high-frequency signals.

In the next section, the generation and analyses of LTSPICE memristor models are presented and discussed.

4. LTSPICE Memristor Library Models and Their Analysis

4.1. The LTSPICE Memristor Model C_mod

Using Equation (5) and the derived model’s optimal parameters, an LTSPICE library memristor model is created and analyzed. The LTSPICE code for the suggested memristor model is shown below for additional explanations and discussion.

1

.subckt cmod a c Y

2

.params a1 = 1.4815e5 a2 = −1323.9 gon = 137.74e−6 goff = 198.3e−12 vthr = 0.1276

3

C1 Y 0 1 IC = 0.8562

4

R1 Y 0 10G

5

G2 0 Y value = {(a1*pow(V(a,c),3)*(V(Y)*(1-V(Y)))*(1/(1 + exp(a2*(abs(V(a,c))-vthr)))))}

6

G1 a c value = {V(a,c)*(gon*(V(Y)) + goff*(1-V(Y)))}

7

.ends cmod

The LTSPICE code for the considered modified model, expressed as C_mod, begins with the command “.subckt”, followed by the memristor terminals—the anode (a) and the cathode (c). The terminal Y could be optionally included in the end of the first row, and it is used for the measurement and observation of the memristor state variable. The tuning parameters a₁, a₂, G_ON, G_OFF, and v_thr are presented in the next row of the code. The third row presents an integrating capacitive element C₁. Its initial value for the voltage is numerically equal to the initial value of the memristor state variable x₀. The fourth row states the additional resistor R₁, whose resistance is 10 GΩ. It is connected in parallel to the integrating capacitor C₁. The main role of this resistor is to partially prevent convergence problems. The voltage-controlled source G₂, whose current represents the time derivative of the state variable, is shown in the fifth row. It agrees with the second expression of system (5). The dependent current source G₁ is presented in the next row. It represents the memristor current. The command “ends” finishes the code of the LTSPICE memristor model.

This code could be easily adapted and used in another SPICE family software products, as in OrCAD PSpice, HSPICE, NGSPICE and others [17].

4.2. The Proposed LTSPICE Memristor Models with Parasitic Parameters

The suggested LTSPICE memristor models with parasitic parameters are represented as K_2p (corresponding to Joglekar), K_3p (corresponding to Biolek), K_5p (corresponding to Lehtonen–Laiho) and C_modp. (corresponding to C_mod). They are built on the formerly discussed memristor models of Joglekar, Biolek, Lehtonen–Laiho and C_mod and the considered parasitic parameters—resistance, inductance, capacitance, and the additional small-signal DC voltage and current shifting measures. The corresponding schematic of the modified models with parasitic parameters in the LTSPICE environment is shown in Figure 6. It agrees with the scheme of the model, presented in Figure 1b.

The LTSPICE code for the offered memristor model, related to Figure 6, is shown below. The electrodes of the memristor with included parasitic parameters are designated as “in₁” and “in₂”. This is followed by the commented memristor model C_mod, connected between the internal terminals “te” and “be”, or some of the classical models K₂, K₃ or K₅. The next row presents the additional DC voltage source E_par. The parasitic capacitance C_par is connected between the electrodes “te” and “be”. The leakage parasitic conductance G_par is attached in parallel to the parasitic capacitance. This is followed by the additional DC current source J_par, also connected in parallel to the terminals “te” and “be”. The additional resistor R₁ is connected between the ground electrode and the bottom electrode of the standard memristor C_mod.

1

.subckt Cmodp in1 in2

2

XU1 te be cm

3

Rpar te in1 1.02

4

V§epar be in2 −0.0874

5

Cpar te be 10.028p

6

R§Gpar te be 361 G

7

I§Jpar be te 2.175 µ

8

R1 0 be 100 G

9

.lib C:\Users\StoyanKirilov\Desktop\LTSPICE_MODELS\cm.txt

10

.backanno

11

.ends Cmodp

For the creation of the described electronic circuit elements, related to the above LTSPICE codes, interested readers must first generate the modified memristor model C_mod. Supplementary and detailed descriptions about the generation and analysis of the commented LTSPICE circuit components are available at the following web address: https://github.com/mladenovvaleri/Advanced-Memristor-Modeling-in-LTSpise (accessed on 1 March 2026). Almost all of the necessary codes for the frequently used standard and modified memristor models can be reached and downloaded from this web-site.

In the proposed memristor model with parasitic parameters, the state variable could not be defined as in the case of a simple memristor without parasitic parameters. Then, the memristance between the main terminals can be considered as a state variable.

The discussed modified memristor models K_2p, K_3p, K_5p and C_modp are analyzed at sine-wave and impulse voltage signals with various levels and frequencies, together with their classical analogs K₂, K₃, K₅ and C_mod. For example, the models C_modp and C_mod are taken as examples, and their current–voltage relations are represented in Figure 7. The current–voltage relationships of the memristor model C_modp derived at a sine voltage with the same amplitude and with different frequencies are presented in Figure 7. They characterize the decreasing of the surface of the i-v pinched hysteresis loops when increasing the signal frequency, according to the basic features of memristor elements [5]. A visual comparison between the modified model C_modp and the model without parasitic parameters C_mod is presented. Figure 7a is related to a frequency of 3 kHz, Figure 7b to a frequency of 15 kHz, and Figure 7c to a frequency of 50 kHz.

It is visible that a good matching between the derived i-v characteristics of the models C_mod and C_modp is available. In this case, the influence of the parasitic parameters does not strongly affect the memory and switching properties of the Knowm memristor.

The next Figure 8 presents the time diagrams of the memristor voltage and the respective memristance at different types of sequences of voltage pulses.

It is clear that, at applied impulses with a positive polarity—as shown in Figure 8a—the memristance decreases during the impulses and it has constant values through the pauses. The respective state variable increases in a similar way. The main influence of the parasitic parameters in this case is on the plateau of the voltage drop across the memristor. The decrease in the memristance and the corresponding memristor voltage is very low according to the respective quantities for the memristor model without parasitic parameters C_mod, and could be ignored at a frequency of 10 kHz. At signals with higher frequencies, the influence of the parasitic parameters should be taken into account.

An analysis of the memristor models C_mod and C_modp at applied negative pulses is presented in Figure 8b. An increase in the memristance is observed, corresponding to a decreasing of the memristor state variable. The simulations presented in Figure 8a,b express the memory effect of the memristor during the impulses and the pauses.

Figure 8c is obtained at an applied sequence of bipolar voltage impulses. In this case, it presents the alteration of the memristance in a comparatively narrow range, related to a soft-switching operation. It represents the switching properties of the proposed memristor models. It is visible that the parasitic parameters do not strongly affect the memory and switching properties of Knowm memristors for signals, with a frequency up to 10 kHz.

Another simulation is done utilizing voltage impulses with a magnitude less than the memristor activation threshold v_thr. It is confirmed that, when the absolute value of the signal amplitude is lower than the voltage sensitivity threshold, the state variable x does not alter, and the memristor element behaves as a simple and linear resistor with a constant resistance. Otherwise, the memristor behaves as a memory element.

The proposed LTSPICE memristor models are comparatively simple and could be used for analyses and simulations of memristor-based circuits and devices. In this sense, LTSPICE gives more freedom to scientists and engineers compared to other SPICE products. However, sometimes researchers could obtain convergence issues in LTSPICE, when large memristor-based schemes and devices are simulated. In such cases, where possible, a logarithmic–sigmoidal step-like function should be used, instead of the classical Heaviside step function. The logarithmic–sigmoidal function is very similar to the original step function, but it is a flat and differentiable one. Avoiding rapid changes in voltages and currents leads to avoiding convergence problems in LTSPICE. Then, the proposed modified memristor models could be applied for analyses of memristor devices with a high number of memory elements.

The described LTSPICE codes are included in a unified and open library, accessible at https://github.com/mladenovvaleri/Advanced-Memristor-Modeling-in-LTSpise (accessed on 1 March 2026) [20]. This library includes various LTSPICE memristor models and memristor-based circuits and devices, presented to interested readers for utilization and comparison [20].

The proposed memristor models C_mod and C_modp could operate at low-, middle- and high-frequency signals. Especially for the model with parasitic parameters, C_modp, signals with frequencies up to 20–100 kHz could be used, and they do not significantly distort the applied voltage pulses. For frequencies higher than 100 kHz, distortions of the applied pulses are observed. The upper frequency limit for the normal operation of the memristors as memory and switching elements depends on the specific values of the parasitic parameters, which are in relation to the manufacturing technologies and the extent of integration in memristor-based integrated circuits and chips.

In the next section, an analysis of a simple and passive memristor-based memory array is presented, using the above-discussed memristor models.

5. Analysis of a Passive Memory Crossbar in LTSPICE Simulator, Using the Considered Standard and Modified Memristor Models

5.1. General Information and Structure of the Passive Memory Crossbar

A passive memristor-based memory array is investigated in LTSPICE environment, predominantly using the commented memristor models C_mod and C_modp. The standard memristor models of Joglekar (K₂), Biolek (K₃), Lehtonen–Laiho (K₅), and C_mod are applied for comparison with the derived results.

The next Figure 9 presents the passive memory crossbar under analysis. Figure 9a presents the metallic electrodes and the intersections between them, corresponding to the memory cells. The electrodes are denoted as word lines and bit lines. The corresponding principal schematic of a fragment from the memory array is shown in Figure 9b. It contains 16 memristors, connected between four word lines and four bit lines. The memory elements are organized in four rows and four columns. Writing a bit of information in a given memristor element (logical zero or logical one) is realized by its selection with a de-multiplexer and applying a positive or negative pulse [24]. In writing mode, the memristor state variables change between the limits x_min and x_max. Usually, x_min is between 0 and 0.1, and x_max is between 0.9 and 1. The level of the applied writing pulses must be higher than the activation voltage threshold v_thr. For reading the stored content in a memory cell, the respective pulse level should be lower than the activation threshold, to avoid the change in the stored information.

5.2. Analytical Analysis

For obtaining the needed length of the writing impulse at a given amplitude, almost all the considered models could be used. After separating the state variable and the time variable, an integration of the obtained equation follows. The state variable could be changed between 0 and 1, or between 0.1 and 0.9 if there are safety margins.

Here, the model C_mod is presented as an example. The minimum length of the writing impulse according to model C_mod could be estimated using the state differential equation of system (5), if the absolute value of the voltage level is higher than the activation threshold v_thr. The state equation is presented with the next Formula (7):

$${\displaystyle \frac{dx}{dt}}=\eta \cdot a_1{v_{mem}}^3\left[x\left(1-x\right)\right]$$

(7)

where a₁ and v_mem are constants. After the separation of the state variable x and the time variable t, the following differential equation is obtained and presented in (8):

$${\displaystyle \frac{1}{x\left(1-x\right)}}dx=\eta \cdot a_1\cdot v^{3}dt$$

(8)

The memristor state variable x is changing between its previously defined limits—x_min = 0.1 and x_max= 0.9—and the time variable alters between the minimal value of zero and the impulse duration T_imp—expressed in the next Equation (9):

$${\displaystyle \underset{x_{\min }}{\overset{x_{\max }}{\int }}\frac{1}{x\left(1-x\right)}dx}=\eta \cdot a_1\cdot v^3{\displaystyle \underset{0}{\overset{T_{imp}}{\int }}dt}=\eta \cdot a_1\cdot v^3\cdot T_{imp}$$

(9)

After solving Equation (9), the formula for the determination of the minimal writing impulse duration T_imp is derived and presented in Equation (10):

$$T_{imp}=\left[\ln \left(x_{\max }\right)-\ln \left(1-x_{\max }\right)-\ln \left(x_{\min }\right)+\ln \left(1-x_{\min }\right)\right]\cdot {\left(\eta \cdot a_1{v}^3\right)}^{-1}$$

(10)

The theoretical numerical value of the writing pulse duration T_imp with a fixed level could be obtained after a substitution with the respective limiting values of the memristor state variables x_min = 0.1 and x_max = 0.9:

$$\begin{array}{l}{T}_{imp}=\left[\ln \left(x_{\max }\right)-\ln \left(1-x_{\max }\right)-\ln \left(x_{\min }\right)+\ln \left(1-x_{\min }\right)\right]\cdot {\left(\eta \cdot a_1{v}^3\right)}^{-1}\\ =\left[\ln \left(0.9\right)-\ln \left(1-0.9\right)-\ln \left(0.1\right)+\ln \left(1-0.1\right)\right]\cdot {\left(1\cdot 1.4815\cdot {10}^5\cdot {1.3}^3\right)}^{-1}=13.5 \mathsf{\mu }\mathrm{s}\end{array}$$

The corresponding maximum and minimum values and the change in the memristance M according to the alteration of the memristor state variable between its limiting values x_min and x_max are derived using the previous Formula (10). They are represented in Formulas (11) and (12):

$$M_{\max }={\displaystyle \frac{1}{G_{\max }}}={\displaystyle \frac{1}{G_{ON}\cdot x_{\min }+G_{OFF}\left(1-x_{\min }\right)}}={\displaystyle \frac{1}{137.74\cdot {10}^{-6}\cdot 0.1+198.3\cdot {10}^{-12}\left(1-0.1\right)}}=72.6 \mathrm{k}\mathsf{\Omega }$$

(11)

$$M_{\min }={\displaystyle \frac{1}{G_{\min }}}={\displaystyle \frac{1}{G_{ON}{x}_{\max }+G_{OFF}\left(1-x_{\max }\right)}}={\displaystyle \frac{1}{137.74\cdot {10}^{-6}\cdot 0.9+198.3\cdot {10}^{-12}\cdot \left(1-0.9\right)}}=8.067 \mathrm{k}\mathsf{\Omega }$$

(12)

After substitution with the numerical values of the quantities G_ON, G_OFF, x_max and x_min, the following expression for the alteration of the memristance M is derived and expressed in Formula (13):

$$\Delta M=M_{\max }-M_{\min }=72.6-8.067=64.533 \mathrm{k} \mathsf{\Omega }$$

(13)

where M_max = 72.6 kΩ and M_min = 8.067 kΩ are the theoretical values of the maximal and the minimal memristance, derived after the analytical solution of the memristor state differential equation.

5.3. Computer Analysis of Writing Time in LTSPICE

Additional simulation in LTSPICE is conducted using a positive pulse with a duration of T_imp = 13.5 µs and a level of 1.3 V. The purpose of this analysis is to make a comparison of the theoretical value of the writing impulse duration and the results from the LTSPICE simulator. The results from the computer simulation are presented in Figure 10. The time diagram of the memristance according to the modified model C_mod is presented in a blue color, while those obtained using the model with parasitic parameters C_modp are highlighted in a red color.

After a comparison between the time diagrams of the memristances, presented in Figure 10 according to the proposed models C_mod and C_modp, a very good proximity is observed. A comparison between the minimal and maximal values of the memristance, derived in LTSPICE and obtained from the analytical solution of the state differential equation, gives identical results. The maximal relative error between these solutions is about 3.3%.

5.4. The Considered Passive Memory Crossbar and Its Analysis in LTSPICE

The parasitic resistance of the memristor’s metallic electrodes is about 5 Ω, and it could be neglected, according to the minimal memristance R_ON = 1/G_ON [2]. When writing a logical one in the memory cell, a voltage pulse with a positive polarity, a level of 1.3 V and a duration of 20 μs is applied. Its length is chosen with a slightly longer duration, according to the theoretical value of 13.5 µs. For writing a logical zero, a voltage pulse with the same duration and magnitude and with a negative polarity is applied. For reading the information stored in a memristor, positive impulses with a level of 0.2 V are applied.

Figure 11a presents the time diagram of the memristor voltage, applied to a single memory element, selected using a de-multiplexer in the LTSPICE simulator. This figure provides a comparison between the behavior of the memristor models under analysis operating in the memory array. The applied voltage is a sequence of writing and reading pulses. The corresponding time diagrams of the memristance, according to the models C_mod and C_modp, are shown in Figure 11b. For additional comparisons, the classical models of Joglekar (K₂), Biolek (K₃) and Lehtonen–Laiho (K₅) are included in the simulation processes. Their modified versions with parasitic parameters (K_2p, K_3p and K_5p) are also used. Their structure corresponds to the model presented in Figure 1b. A comparatively good matching between the derived results is visualized.

The source produces a sequence of rectangular voltage impulses with different levels. They are forwarded to the anodes of memristor elements, whose second electrodes are attached to the ground using sensing resistors. They are utilized for reading the stored information; the voltage drops across them are proportional to the accumulated electric charges. The writing and reading procedures are visualized in Figure 11b for a single memory element, selected using a de-multiplexer [14,24]. Through the writing impulses, the memristor state variable changes in the scope between zero and one according to the applied classical and modified memristor models. It is obvious that the reading impulses with a magnitude lower than the sensitivity threshold v_thr do not alter the memristor state, and the accumulated information is preserved. The modified memristor models with an included activation threshold ensure this behavior, and, owing to this, they are appropriate for the simulation of memory crossbars. According to the other memristor models without an activation threshold, a small alteration of the memristance during the reading pulses is observed. For the analysis of memory arrays at reading logical information, the Joglekar and Biolek memristor models are not suitable, owing to the absence of an activation threshold.

The standard Lehtonen–Laiho memristor model is appropriate for the simulation of memory arrays, owing to the use of a polynomial dependence between the time derivative of the state variable and the memristor voltage. Together with the modified models C_mod and C_modp, the Lehtonen–Laiho model has very good switching properties. They are related to the ability of the model to ensure a rapid change in the memristance at applied writing voltage pulses. In the considered case, Joglekar and Biolek do not have very good switching properties. The presence of parasitic parameters and especially of parasitic capacitance in the modified memristor models K_2p, K_3p, K_5p and C_modp is related to a slight deformation and decrease in the plateau of the voltage impulses across the memory elements. For frequencies lower than 10 kHz, the parasitic parameters do not strongly affect the signals transmitted to the memory cells.

During the operation of memristor-based memory crossbars, some problems related to parasitic parallel sneak paths occur [24]. The existence of reversely connected memristors in each additional current path ensures that the sneak routes within the memristor arrays have a comparatively low influence on their normal functioning [14,15]. The current of memristors and the consumed power are additionally calculated. The electric energy needed for writing and reading a bit of logical information are derived through integration according to time in MATLAB ver. 2016a, and their approximate values are about W_write = 36.2 nJ and W_read = 2.3 nJ. The Joglekar, Biolek and Hann memristor models have a similar behavior, according to the change in memristance. In the considered case, they do not guarantee a sufficient alteration of the memristance for writing logical information. According to the proposed models and the Lehtonen–Laiho memristor model, the state variable x changes between zero and one, and the respective models operate in a state very close to a hard-switching mode. The Lehtonen–Laiho memristor model, the Knowm model and the proposed models C_mod and C_modp guarantee a rapid variation in memristance and in the state variable, and they have very good switching properties. The Strukov–Wiliams, Biolek, Joglekar and Hann memristor models realize a slow change in the memristance and the state variable. This is an advantage of the proposed modified memristor models, according to the classical models. The proposed memristor models are related to polynomial relation between the time derivative of the state variable x and the memristor voltage v, and this confirms their better switching properties. According to the proposed model, the standard self-directed channel Knowm model, and Laiho-Lehtonen model, the memristance does not significantly change in the reading time intervals. When a pulse representing logical one is applied to a memristor, the respective state variable is near to one, and the memristance M has a minimal value. The reading voltage impulses in this case produce a low memristor current. When the memristor stores a logical zero, then the respective state variable is near to zero and the memristance has a maximal value. In this case, the current related to the applied reading pulses is very low and near to zero.

In the next section, a discussion on the derived results and a short comparison of the proposed memristor models with some of the frequently used standard and modified memristor models are presented.

6. Discussion

Here, a discussion on the obtained results and a comparison between the used standard and modified memristor models are provided.

6.1. Comments on the Derived Results

Considering the results presented above, it can be concluded that the proposed memristor models C_mod and C_modp can be correctly adjusted in MATLAB according to the experimental i-v characteristics of Knowm memristors. The suggested models are able to correctly operate at high-frequency signals. The use of an activation threshold allows the proposed models to suitably operate in memory crossbars.

6.2. A Comparison of the Utilized Memristor Models

A short comparison of the standard and modified memristor models designated in this work and their functioning in impulse mode is shown, using different criteria such as model accuracy, complexity, operating frequency, simulation time and switching properties [11,20]. For this analysis, additional simulations were conducted in MATLAB. The exciting voltage signal is a periodic sequence of rectangular unipolar and bipolar pulses, previously sampled in the time domain. The number of samples is 10,000. The number of periods is 5. The derived results are presented in

Table 2. A comparison of the memristor models under analysis, derived for time interval of 0.01 s, 100,000 samples, time step of 0.1 µs, on a computer with Intel i5 processor, 2-core, 2.7 GHz, 512 GB SSD disk, 16 GB RAM.

Model	Accuracy	Complexity	Operating Frequencies	Simulation Time, ms	Switching Properties
Strukov–Williams	low	low	low	35.7	satisfactory
Joglekar	good	low	low	36.1	satisfactory
Biolek	good	middle	low, middle	36.7	good
Lehtonen–Laiho	high	high	low, middle, high	45.6	very good
Knowm	high	high	low, middle, high	43.8	very good
Hann	Good	middle	middle	36.7	good
Cmod	good	low	low, middle, high	39.3	very good
Cmodp	good	middle	low, middle, high	45.8	good

for the representation of the main advantages of the proposed modified memristor models, compared to the standard Strukov–Williams, Joglekar, Biolek, Knowm, Lehtonen–Laiho, and Hann models.

The suggested models have a comparatively low complexity, high operating frequency, sufficient accuracy and very good switching properties. They are appropriate for the analysis and design of memristor-based electronic devices and circuits with a large number of memristor components. For effective identification of the utilized basic terms and criteria, their short description is presented here.

The simulation time needed for the analysis of an allocated memristor model in electronic simulators, as in MATLAB, LTSPICE and others, is directly related to the model’s complexity. It alters with the respective amount of the applied elementary mathematical operations within the memristor model under analysis.

The accuracy (also known as a precision) of a given memristor model is connected to the RMS error (and the respective relative error) between the simulated and the experimental current–voltage characteristics. When the memristor model’s relative error is less than 4%, the model is considered as having a high accuracy. When the relative error is in the interval between 4 and 6%, then the memristor model is considered as having a sufficient level of precision. The memristor model has a low accuracy if the relative error is higher than 6% [20].

The ability of a given memristor model to express rapid changes in the state variable and the memristance at applied voltage impulses is related to the correct representation of the nonlinear ionic dopant drift and the switching behavior of the model.

The operating frequency of a given memristor model is associated with its capability for a correct illustration of the variation in the state variable and the corresponding memristance, associated with the time integral of the voltage signal utilized for the simulation of the memristor element.

In the next section, the concluding notes are presented.

7. Conclusions

In this work, modified and simple memristor models are proposed, and several standard memristor models are applied and analyzed in a memory array. A comparison between the models is conducted. The main parasitic parameters—resistance, capacitance, conductance, and small signal DC voltage and current shifting components—are addressed. The analyses are realized using MATLAB and LTSPICE software. The main purpose of the work is achieved, and the related tasks are successfully resolved.

The processes of writing and reading logical information are simulated in the LTSPICE simulator. The operation of the suggested memristor models is compared to the standard Strukov–Williams, Joglekar, Biolek, Lehtonen–Laiho, Hann, and Knowm memristor models. The switching properties of the models considered, which are very important for operations in memory crossbars, are investigated. For a comparison of the memristor models under analysis, several significant criteria such as the operating frequency, complexity, switching behavior, accuracy and simulation time are used. The proposed memristor model, together with the standard Knowm and Lehtonen–Laiho models, has better switching properties according to the classical Joglekar, Biolek, and Hann models. Due to their good precision, high operating frequency and rapid functioning, the offered memristor models are easy to apply in complex memristor-based electronic devices and circuits. The applied polynomial window function and the implementation of the discussed memristor models and memristor-based schemes in the LTSPICE environment avoid the main convergence problems to a high extent.

An important issue in the analysis of passive crossbar arrays is the “sneak path” problem, which leads to read interference and increased power consumption. The present analysis is mainly related to the signals applied to a single selected memory. In the near future, another analysis of leakage current paths across the entire array and an evaluation of read margins in worst-case scenarios, for example, a selected memory cell in a high-resistance state connected to memristors in low-resistance states, will be conducted. For the evaluation of the model’s effectiveness, performance and scalability, a quantitative analysis of sneak paths will be completed.

The fabrication and related engineering of electronic circuits and devices with memristors in SPICE, applying simple and fast functioning models with a comparatively good accuracy, are a significant step towards the implementation of enhanced, high-density and low-power integrated chips and circuits for computer industry.