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J. Sens. Actuator Netw. 2019, 8(1), 11; https://doi.org/10.3390/jsan8010011

Power-Aware Synchronization of a Software Defined Clock

Dipartimento di Informatica, Università di Pisa, I-56122 Pisa, Italy
Received: 27 November 2018 / Revised: 27 December 2018 / Accepted: 14 January 2019 / Published: 18 January 2019
(This article belongs to the Special Issue Energy Management in Distributed Wireless Networks)
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Abstract

In a distributed system, a common time reference allows each component to associate the same timestamp to events that occur simultaneously. It is a design option with benefits and drawbacks since it simplifies and makes more efficient a number of functions, but requires additional resources and control to keep component clocks synchronized. In this paper, we quantify how much power is spent to implement such a function, which helps to solve the dilemma in a system of low-power sensors. To find widely applicable results, the formal model used in our investigation is agnostic of the communication pattern that components use to synchronize their clocks, and focuses on the scheduling of clock synchronization operations needed to correct clock drift. This model helps us to discover that the dynamic calibration of clock drift significantly reduces power consumption. We derive an optimal algorithm to keep a software defined clock (SDCk) synchronized with the reference, and we find that its effectiveness is strongly influenced by hardware clock quality. To demonstrate the soundness of formal statements, we introduce a proof of concept. For its implementation, we privilege low-cost components and standard protocols, and we use it to find that the power needed to keep a clock within 200 ms from UTC (Universal Time Coordinate) as on the order of 10−5 W . The prototype is fully documented and reproducible. View Full-Text
Keywords: clock synchronization; low-power sensor; sensor network; common time reference; clock drift calibration; low-cost sensor; software defined clock clock synchronization; low-power sensor; sensor network; common time reference; clock drift calibration; low-cost sensor; software defined clock
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This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).

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Ciuffoletti, A. Power-Aware Synchronization of a Software Defined Clock. J. Sens. Actuator Netw. 2019, 8, 11.

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