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Article

An Active Power Filter with Energy Storage and Double DC Conversion for Power Surge Compensation

1
Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering, Departament of Power Electronics and Energy Control Systems, AGH University of Science and Technology, al. Mickiewicza 30, 30-059 Krakow, Poland
2
ABB Corporate Technology Center, Starowislna 13A st., 31-038 Krakow, Poland
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(9), 1489; https://doi.org/10.3390/electronics9091489
Submission received: 31 July 2020 / Revised: 1 September 2020 / Accepted: 4 September 2020 / Published: 10 September 2020
(This article belongs to the Section Industrial Electronics)

Abstract

:
This paper presents a single-phase power filter with an energy storage bidirectional DC/DC converter, both of which are equipped with separate capacitor-based DC links that provides good transient response and reduce energy storage capacity. The device is dedicated to the compensation of active power surges generated by nonlinear loads characterized by intermittent operation, where the operating time of a device in relation to the idle time is relatively short. As a compensated and filtered object, the single-phase spot welding machine with a thyristor current controller was assumed. In the case of such devices, the feeder has to be dimensioned for the peak loads, which increase the cost of installation—due to the fact that the used components have to be oversized. The proposed solution can produce measurable economic benefits by reducing the rated power necessary to energize periodically operating loads and improve the indicators of electrical energy quality. An elaborated control algorithm based on a switchable control structure provides a fast and good transient response. The work contains a comprehensive analysis of storage sizing, confirmed by simulation results performed in the Matlab and Simulink environment. Based on the analyses carried out, the laboratory model of the device was implemented and experimental verification performed.

1. Introduction

The crucial problems of a modern distribution system are limitation in power transfer and the quality of delivery. In some cases, the solution to the issue is the employment of power electronic devices [1,2,3]. It is performed by reactive power compensators and active power filters, compensating the reactive current component according to S. Fryze’s or H. Akagi’s definition [4,5].
Nowadays, asymmetric and non-linear loads (consumers) running continuously or in cycles are fitted with reactive power compensators or active filters [6] which allow for the reduction of the voltage drop of the feeder line when surge currents flow and the current harmonics content increases. However, this solution does not reduce the peak current values of the feeder line and the transformer caused by surges of active power, due to the need to store a large amount of energy and need to inject it into the grid immediately [7,8].
Alternatively, passive filtration can be used, however, it has many drawbacks, e.g., high inductance value for low frequencies, which cannot be miniaturized. Moreover, such filters are expensive and designed only for a selected frequency. In addition, the aging processes observed in passive components have a significant impact on the quality of filter operation. Regardless of their disadvantages, systems of this type are still used due to their reliability, and the ability to operate under high voltages and significant current values [9,10].
Active filters are used in contemporary solutions for asymmetric and non-linear systems [11,12,13,14,15]. Compared to passive filtration, they eliminate problems related to the possibility of resonance and there is no need to tune them to the frequency of the filtered harmonics. They can also remove a DC component from the current of the nonlinear receiver [11]. Regardless of their advantages, active filters (serial or parallel) do not solve the problem of intermittently running nonlinear loads, such as spot welders, crane drives, etc. In these types of loads, currents can reach high instantaneous values and be significantly distorted. An additional problem is the intermittent nature of operation: a system like a welder may work for tens of ms, and then be off for dozens of seconds. In such systems, an active filter minimizes the reactive power and limits the content of current harmonics, however, it does not reduce the value of the active component of the current. In the case of intermittent operation, where the operating time of a device in relation to the idle time is relatively short, the feeder (line, switchgear, transformer and so on) is dimensioned for the peak loads. Therefore, in order to ensure the correct operating conditions for other devices supplied from the same line, the short-circuit level of the network at the point of common coupling (PCC) must be sufficiently high.
Using an additional energy storage, drawing energy when there is no current consumption by the loads, and supporting their supply during their operation, enables a radical decrease in the feeder peak power value. It should be noted that providing correct conditions for the connection of this type of load to the feeder line is expensive since it forces the user to employ a terminal of a sufficiently high power.
The solution of the issue is the employment of a single-phase active power filter (APF) connected to an energy storage (ES) system whose control algorithm will enable the active power surge suppression in the feeder line (by limiting the variable power component value) [16,17]. Such a solution can produce measurable benefits by reducing the rated power necessary to feed periodically operating loads, and it improves the indicators of electrical energy quality. Furthermore, the developed method of active power surge compensation enables a flexible approach to the requirements concerning the rated power at the point at which the periodically operating loads with a high peak current value (apparent power) are connected.
The main contribution of this paper is the development of an active power filter integrated with energy storage, for a single-phase system. A similar integration has been proposed in [18], however, it addresses a three-phase system and renewables. Devices dedicated to the type of load selected in this paper are not well analyzed in the literature, due to relatively low active power, below 4 kW. However, despite the small scale of the considered load and intermittent operation, the algorithm elaborated in this paper and energy balancing can pave the way for more detailed analysis in high power applications.
A similar issue is also occurring in shipboard microgrids, where more generators are kept online, operating far below their efficient point in order to compensate for the fluctuations caused by high dynamic loads and increase the reliability of the system [19]. Hence, the solution presented in this paper may significantly increase the efficiency of such power systems and reduce environmental pollution and fossil fuel consumption.
The simplicity of the used filter topology (H-bridge inverter) in comparison to, e.g., the five-level converter presented in [20], make them easier to implement and guarantee good compensation performance.
In comparison to [12], the elaborated switchable control algorithm is based on proportional-integral controllers (PI) and two control loops. In the developed structure, such a solution ensures a satisfactory transient response. The complexity of the analyzed phenomenon does not require sophisticated field-programmable gate array (FPGA) based on adaptive power management algorithms, as shown in [21].
Moreover, separate DC conversion stages (two different DC links for an APF and ES) provide a good compensation dynamic and allow for the size reduction of filter storage. This feature is extremely important in single-phase circuits due to the limitation of double-line frequency components on DC link capacitors [22]. The presence of this component may cause distortion of the generated line current by the 3rd harmonic.
The time scale, as well as the nature of the compensated phenomenon, enable the use of electrolytic capacitors as an energy storage system in comparison to systems where battery energy storage systems are used [23,24].
Experiments are conducted in which supercapacitors are used as energy stores in compensators of the active power [25,26,27], however, the scale of the problem is different and relates to wind or solar power fluctuations.
The use of flywheel energy storage remains an alternative [28,29,30,31] in that solution. However, even due to the highest rate of current increase di/dt, the cost of installation is not justified in the analyzed case.
The high effectiveness of the solution presented in this article has been confirmed by simulations and laboratory experiments in which the current of a spot welder was compensated.

2. Principle of Operation

The idea of the system operation is presented in Figure 1. The system connected to the feeder line is composed of an active power filter, an energy store and a load switched on at irregular time intervals. In Figure 1, the nature of the feeder line current (Iline) and the load current (Iload) is also marked. A thicker connection to the load symbolizes the requirements for the distribution equipment to handle such peak values of the load current.
A typical APF is not capable of supplying and absorbing the active component of the current (in accordance with S. Fryze’s power theory). Forcing an excessive or an insufficient flow causes an increase or a drop in the voltage in the filter capacitor CF, which must be constant over time for the correct operation of the filter. Due to that, in the proposed solution, an ES system is connected to the filter capacitor, whose function is to stabilize the voltage of the filter capacitor.
The system is composed of an APF with ES and naturally supports the compensation of the active and non-active components of the current injected by the load. In this case, the flow of the active component will not cause a change in the voltage VF, since the resulting fluctuations will be stored in the ES capacitor CS.
The system aim is to continuously draw energy from the feeder line with a continuous flow of current Iline. Hence, the root mean square (RMS) value of this current is many times smaller than the RMS of the load current (Iload).
Under these conditions, the energy is not supplied to the load only from the line, but also through the APF with ES. Such an approach reduces the maximum power on the side of the feeder line, thus the feeder line can be designed for smaller rated currents.
Ensuring the continuous drawing of energy from the feeder line while the consumer runs intermittently means that the system must store energy during pauses in the operation of the load and return it when this intermittent load is turned on. Hence, the operation of the load is supported by an APF with ES and at the peak value the feeder line current is reduced by drawing the previously stored energy.
Assuming that the load operating time is many times shorter than its idle time, a properly selected sinusoidal current value, continuous and almost constant in time, can compensate an intermittent load that is many times greater.
Another advantage of the system is the mitigation of the welder negative impact on the feeder line by eliminating high-order current harmonics. This is achieved by the use of parallel active filter topology.
The turning on of the load, connected to the power line with the RMS voltage V causes the flow of the active current component Iload, as illustrated in Figure 2a. However, the load current can also contain harmonics and reactive power (a non-active component according to S. Fryze), hence, the APF has to be used as an interface between the ES system and the voltage source (power line).
The product of the fundamental voltage harmonic RMS value V and the active current component corresponds to the active power of the load Pload—the average value of the instantaneous power (Figure 2a). The area limited by the power curve is equal to the energy Eload delivered by the source.
The essential function of the system is the compensation of active power surges/fluctuations generated during the turning on of the load. The idea of load pulse averaging is illustrated in Figure 2b.
The amount of energy Eload delivered from the source to the load, during its single activation (pulse), lasting for time ti, is described by the dependence (1):
E load = P load · t i
The reduction of Pload, within a period ti to the power level of PAV (Figure 2b), requires a proportional increase in time, during which the energy is transferred from the source (tAV). Keeping the energy balance through the system means that the surface areas (energies)—Eload and EAV—should be equal. The pulse averaging process is illustrated in Formula (2):
P load · t i = P AV · t AV   P AV =   P load t i t AV  
where PAVtAV = EAV is equivalent to Eload energy consumed by the load operating with PAV power during the period tAV.
General assumptions are:
P AV P load t i t AV   < t GAP  
The interval between successive load turning on (tGAP), as well as the duration of a single turn-on pulse (ti) and its power (Pload), are predefined by the technological process. The sum of ti + tGAP determines the “quasi-period” (Tload)—during which load activation may occur.
Selected by the system according to (2), the value of PAV during time interval tAV (tAV < Tload) should ensure the correct distribution of the Pload pulse before the next one occurs, without increasing the power value of the source during the period Tload, as illustrated in Figure 2c.
The analysis of the technological process allows us to determine the time interval’s characteristic for a given technological line: minimum and maximum duration of the Tload period, within which load activation should occur, as well as the limit values of a single load pulse duration ti—which is a multiple of the full number of voltage source periods.
The system must ensure correct operation with the longest ti_max pulses (load turned on for the maximum time) which are repetitive within the shortest period between successive load turning on Tload_min (maximum energy and power of the source), as well as in the opposite case—the shortest ti_min and Tload_max (important in the context of control system dynamics). Both cases are depicted in Figure 3.
The determination of the maximum load power (Pload_max) and the maximum duration of a single load pulse (ti_max) leads to the calculation of the maximum value of the reduced source power PAV_max (according to Formula (2)), obtainable for the assumed type of load in the assumed shortest time between impulses Tload_min (4):
P AV _ max = P load _ max · t i _ max T load _ min
where Pload_max is the maximum value of the load power; PAV_max is the maximum value of the source power; ti_max is the maximum duration of the load turnon pulse and Tload_min is the minimum interval between the successive load pulses. Formula (4) describes the most critical case when the system is exposed to boundary conditions and has the shortest time (tGAP min) to recover energy before the load is turned on again, as illustrated in Figure 3a.
The operation of the system requires the storage of the ΔE1 portion of the energy in the structure of the ES system (Figure 2c). The ΔE1 energy is released from the system when the load is turned on. It results in the intended effect of source power reduction. After the load is turned off, the energy loss ΔE1 is supplemented by the value ΔE2 with constant power (the system maintains the constant value of the current IAV), thus the energy balance of the system is satisfied (5):
Δ E 2 = Δ E 1
The assumed value of PAV ensures that when tAV < Tload the energy ΔE1 will be supplemented before the load is turned on again, hence the system will be fully prepared for the next switching on of the load.
According to dependence (5), the minimum amount of stored energy ES_min should be greater than ΔE1 for the assumed maximum power of the receiver (Pload_max), operated with the maximum duration of a single pulse (ti_max) and the minimum interval between successive pulses (tGAP_min). The minimum value of the energy stored in the system ES_min, including losses ΔE, was determined by the dependence (6):
E S _ m i n > P load _ max · t i _ max + Δ E E S _ min > E load _ max + Δ E
The implementation of the presented assumptions requires an APF connection with the ES system. The operation of the proposed system does not affect the current (power) of the load, however, it significantly reduces the current of the source.
The function of the APF is to eliminate the harmonics and the reactive current component, while the role of the ES system is to limit the active power fluctuations when the load is turned on. This is done by limiting the active current component as a result of energy transfer from or to the ES system.
The value of filter capacity CF was determined, as a result of the transformation of the dependence describing the energy stored by the capacitor. The voltage across the capacitor during operation with a maximum assumed power Pload_max within one period of source voltage should not fall below the level which provides the correct operation (7):
E F _ max E load _ max ( 1 ) E F _ min
where:
E F _ max = 1 2 C F V F _ max 2  
E F _ min = 1 2 C F V F _ min 2
E load _ max ( 1 ) = P load _ max · T = P load _ max f i  
V F _ min = V F _ max Δ V
where EF_max is the maximum energy level stored in the capacitor CF; EF_min is the minimum energy level stored in the capacitor CF; Eload_max(1) is the maximum level of energy consumed by the load operating at maximum power Pload_max (1 kW) during one period of source voltage; T = 1/fi, fi (50 Hz) is the frequency of the source fundamental harmonic; VF_max (500 V) is the maximum (reference) value of the voltage on CF; VF_min is the minimum value of the voltage on CF; ΔV (100 V) is the assumed voltage drop across the capacitor CF.
As a result of substituting (8)–(11) into (7), the expression (12) was obtained to determine the minimum value of the capacitance of the filter:
C F P load _ max f i ( V F _ max · Δ V Δ V 2 2 ) = 1000 50 ( 500 · 100 100 2 2 ) = 444   μ F
The key issue in the presented system is the selection of the energy storage capacitance value CS. Increasing the amount of stored energy (e.g., through the use of a larger capacitor) allows for the use of a slower voltage controller, thus a better averaging over time of the generated source reference current.
The energy accumulated in the storage capacitor CS should compensate the energy losses in the CF during the load operation as well as the losses in the ΔE elements, without changing the value of the generated (compensated) source current. Too small a value of CS forces an operation with a higher source current (or larger fluctuations of its RMS value).
In the case of a CS capacitor, the maximum operating voltage VS_max cannot exceed the value of the filter maximum voltage VF_max. The acceptable minimum of ES operating voltage VS is equal to 1/2 of the nominal value. This means that the capacitor is charged by 25%. Discharging the capacitor below this value further reduces the operation of the system (the transfer of energy from the ES system to the filter capacitor is ineffective).
The selected value of the CS guarantees the energy reserve for the compensation of the assumed number of load impulses before the CS is discharged to the minimum level.
The value of the CS was determined in a similar way to CF. During the load compensation, the amount of stored energy should not fall below the level guaranteeing the correct operation of the ES system. The value was calculated for the boundary conditions of the load, operating with a maximum power Pload_max and turned on for the longest ti_max (which is a multiple of the total number of source voltage periods ti_max = nmaxT):
E S _ max E load max ( n ) > E S _ min
where
E S _ max = 1 2 C S V S _ max 2
E S _ min = 1 2 C S V S _ min 2
where ES_max is the maximum energy stored in the ES capacitor CS; ES_min is the minimum energy level stored in the capacitor CS; Eload_max (n) is the maximum energy consumed by the load during “n” periods of source voltage; VS_max is the maximum (reference) value of the voltage in CS; VS_min is the minimum value of the voltage in CS.
The energy transferred from the source to the load during a single turn on for n periods of the source voltage can be calculated by (16):
E load max ( n ) = t i _ max · P load _ max = n max · T · P load _ max = n max · E load max ( 1 )
where nmax is the maximum number of load operation periods with maximum power Pload_max during one switch-on cycle; Eload_max(1) is the maximum energy consumed by the load during “1” period of source voltage.
The substitution of (14) and (15) into (13) leads to dependence (17) which enables the calculation of the minimum CS capacity. The selected value guarantees that during a single turn on of the load for maximum time ti_max (6 × 20 ms), operated with maximum power Pload_max (1 kW), voltage across a capacitor will not fall below the minimum level VS_min = 1/2 VS_max = 200 V.
C S > 2.67 P load _ max · t i _ max V S _ max 2 = 2.67 1000 × 120 m s 400 2 = 2   m F

3. Simulation Results

The system preliminary test was carried out in a Matlab and Simulink environment (SimPowerSystems library). A block diagram of the circuit is illustrated in Figure 4.
The analyzed APF is a voltage inverter in the H-bridge topology with current waveforms shaped by pulse width modulation (PWM). The energy storage DC/DC converter is composed of Q1 and Q2 switches as well as a CS capacitor.
The tested device is connected in parallel between the load (spot welder modeled as a series connection of RL elements, where R << XL and a thyristor current controller) and the feeder line, modeled as an AC source with an inductance (100 µH) and resistance (3 mΩ) connected in series. The values are determined using the data sheet of a 15/0.4 kV three-phase distribution transformer.
The switching frequency is equal to 10 kHz, while the entire model is executed at a step of 2 µs (500 kHz).
The operation of the device is controlled by two cascade control loops, depicted in Figure 4 (PI controllers are used). The structure of a single control loop consists of an internal, fast current controller, CC, and two external voltage controllers, VC, one of which is used during the startup procedure and the other during the normal mode of operation. Current controllers are common for both phases of the system operation.
Different dynamics (sizes) of controlled storages CF << CS require quick controller parameter changes as well as input signal (feedback) in order to avoid the transient phenomenon in controlled signals. It is implemented by Loop_SW when appropriate conditions are fulfilled.
During startup, the filter control loop stabilizes voltage across filter capacitor CF, however, in normal operation mode, the dynamics of this control loop should be low in order to ensure proper compensation of the load current. Similarly, once the DC/DC converter control loop is stabilizing voltage across CS, then in normal operation mode it is responsible for the control of voltage across the considerably smaller filter capacitor CF.
The current controllers are characterized by a large (in comparison to voltage controllers) proportional gain Kp (50 ÷ 130), which is necessary to ensure proper dynamics, while the integration time is selected from the interval 1 ÷ 5 ms.
In the case of the voltage controllers, the values of the proportional gain do not exceed one (0.03 ÷ 0.22) and the integration times are selected from the interval 10 ÷ 20 ms. The small value of the proportional gain (Kp < 1) in the structure of the first filter control loop ensures adequate attenuation of the third harmonic during the startup in the generated waveform of the source current.
Due to the load power pulse averaging, the settings of the voltage controller (VC_filter) used during normal operation are the most important. The controller is characterized by a negligible small proportional gain (Kp = 0.03), which guarantees the stabilization of the VS voltage within the assumed range, without the possibility of exceeding the acceptable safety levels.
The integration time of the voltage controller (equal to 40 s), is adopted on the basis of the assumed multiple interval between successive load turn ons (tGAP_max = 20 s).
Selected in such a way, the value ensures an appropriate distribution (averaging) of the load pulse over time. The use of a slow controller is possible only due to a sufficiently large energy store (a CS capacitor). The capacity of the storage must provide an energy supply equal to at least one load pulse ti_max, with the assumed power.
In Figure 5, the block diagram of the used series PI controller topology is depicted, based on [32,33]. Detailed controller parameter specifications can be found in Appendix A, Table A1. The initial values are determined using PID Tuner [34], which were then tuned during the experiment.
Figure 6 presents the simulation results of the feeder line and the DC/DC converter currents (Iline, IS) and the voltages across the filter and converter capacitors (VF, VS), recorded during the developed model startup. After approximately just 1.4 s, the system reaches full ability to operate under load conditions. The startup procedure is initiated by activation of the Main_Relay.
The first startup stage—“StartUp 1/2”—consists of the preliminary charging of the capacity CF. The capacitor is charged by the diodes included in the insulated gate bipolar transistor (IGBT) structure. The value of the charging current is limited by a resistor RB (50 Ω) installed on the input of the filter.
After the voltage VF reaches a steady value, the RB resistor is bypassed by the TB switch (relay). If the voltage of the feeder line is not distorted, the voltage on the capacitor will amount to approximately 325 V. The TB relay is activated when VS > 310 V (VS > 0.95 Vline (MAX)).
During the second stage of “StartUp 2/2” (Figure 6), the impulses controlling the transistors in the filter and the DC/DC converter are unblocked and the control structure is activated.
The purpose of the first control structure (comprising the VC_filter_start and the CC_filter, Figure 4) is to stabilize the voltage on the filter capacitor CF at the reference level of 500 V. This is achieved by developing the appropriate reference of the feeder line current. During this phase, the filter acts as a sinusoidal current rectifier.
Simultaneously with the operation of the filter control, the DC/DC converter control system (which consists of VC_conv_start and CC_conv, Figure 4) is activated. Its function is to stabilize the output voltage of the converter capacitor VS at the reference level 400 V. The capacitor CS is charged by the converter using the energy stored in the filter capacitor CF (the buck mode of operation). This causes a drop in the voltage VF, which is compensated by the filter control circuit. The value of the feeder line reference current has to be increased correspondingly.
In the analyzed case, the current IS, which charges the capacitor CS, is limited to 2 A (the value selected only for the startup 0 ÷ 2 A). The maximum value of the feeder current during the startup is limited to ±7 A. This is achieved by selecting the appropriate saturation value of the voltage controllers.
The startup process ends when the voltage of the energy store exceeds 380 V (VS > 380 V). Then, the final control system is launched (by means of the Loop_SW switches triggered by the Loop_Select signal).
The waveforms of the currents and voltages of the feeder line are recorded when the system is compensating an actuated load within a wide time horizon (30 s). They are shown in Figure 7a (enlarged in Figure 7b). The line current is sinusoidal in and in phase with the line voltage, while the actuation of the load no longer impacts on the line current value.
The effective operation of the system is confirmed by the RMS waveforms of the load (Iload) and line (Iline) currents when the filter with the energy storage is working, as shown in Figure 7c (enlarged in Figure 7d).
The system operation limits the sudden increases of line current RMS value caused by the actuation of the load, as is clearly visible in the enlarged fragment shown in Figure 7d. The RMS value of the current forced by the load is approximately 14 A. The elaborated solution significantly reduced it to the level of 2 A.

4. Experimental Results

The designed and constructed spot welder, as well as active power filter with an additional energy storage DC/DC converter, are depicted in Figure 8. Both of them are based on electrolytic capacitors. Detailed system specifications can be found in Appendix A, Table A2.
Construction of the welder requires a step-down transformer and two thyristors connected antiparallel on the primary transformer side. In the analyzed case, the welding current was about 600 A and galvanized steel plates (0.25 mm thickness) were welded.
The welder current controller enables smooth adjustment of the thyristor firing angle, moreover, the welding time (ti) can also be adjusted.
During the laboratory tests, an analysis of the steady and dynamic states was performed. The elaborated algorithms of the control concepts were verified in the full range of the load.
The system startup process was the same as that presented in the simulation results in Figure 6. The recorded oscillogram with marked startup phases is presented in Figure 9. After approx. 1.5 s, the device was ready to work.
The working conditions for which this system was designed are shown in Figure 10a. The drawing shows the waveforms of the feeder line and load currents as well as the voltage in the DC/DC converter circuit. The waveform recording duration was limited to 100 s. A compensated spot welder was incidentally actuated with a constant welding duration time (ti = 6 × 20 ms) and a constant thyristor firing angle α = 70°, as illustrated in Figure 11 (load operated with a maximum power Pload_max and turned on for the longest assumed time ti_max).
As a result of the system operation, the maximum value of the feeder line current did not exceed 4 A, while the peak value of the current forced by the load was equal to approx. 22 A.
This means that the peak current of the line, and hence the requirements for the components supplying energy to the compensated load (e.g., the conductor cross section), was reduced by over 80%.
The non-repeatability of the shape of the recorded welding currents (e.g., the differences between the maximum values regardless of maintaining a constant welding angle) are due to phenomena occurring between electrodes (the burning out of oxides and contamination, uneven contact pressure, etc.) [16].
Figure 10b is a detail of Figure 10a. It shows two subsequent actuations of the load occurring at different time intervals. In the presented case, the load is actuated at an interval shorter than 5 s, but the system is still able to restore the voltage VS within approx. 1 s and retain its compensation ability. This proves that the assumed time interval (Tload_min = 5 s) between subsequent actuations of the load ensures the appropriate safety margin for restoring the voltage VS even when the welding time is increased.
Based on the waveforms of the feeder line current and load current shown in Figure 10a,b, the RMS values of these signals were determined in accordance with a true RMS algorithm [35]. A graph of the waveforms produced in the analyzed time horizon is presented in Figure 10c (zoomed-in Figure 10d).
The RMS value of the load current fluctuates within the range of 10 ÷ 12 A, even if the thyristor firing angle is kept constant by the welder control system (due to different welding conditions). The operation of the developed system limits the RMS value of the line current to approx. 2.5 A (an almost five-fold reduction of the RMS feeder line current). This confirms that the aims set for the apparatus were achieved.
The operation of the device also reduced rated power, which is required at the point of connection where such loads are used.
Due to the step-down transformer in the structure of the used welding machine, currents are distorted by odd harmonics (especially 3, 5, 7—core saturation effect) [16]. The operation of the filter also limits their content in the line current. The operation with a small value of the firing angle of the thyristor of α < 70° was omitted due to the fact that the shape of the current was similar to currents occurring during a short circuit, in which an aperiodic DC component could be observed.
The final test of the device is illustrated in Figure 12. The load was turned on for 12 periods of line voltage (twice as long as assumed). During compensation of this load pulse ES capacitance CS was discharged to 35% (236 V), however, it is still above the assumed minimum level of VS_min = 1/2 VS_max = 200 V. The obtained results confirm the correct selection of the ES capacity and proper operation of the device.
The comparison of simulation and experimental results can be found in Appendix A, Table A3. In both cases, similar results were obtained, hence the high accuracy of the developed model was confirmed. It should be noted that the control part of the developed model was used directly for digital signal processor (DSP) controller programming and tested in a real-time simulator [36].

5. Conclusions

The operating concept of the single-phase active filter with additional energy storage was presented in this paper. Both of them are based on electrolytic capacitors, and have separate DC links. Such a solution provides a good compensation dynamic and allows for the size reduction of filter storage.
The developed device is dedicated to compensation of single-phase loads as, for example, used in the experimental spot welder. Electric spot welders are perfect representatives of nonlinear loads and characterized by intermittent operation. However, this issue also concerns other objects, due to their cyclic operation mode, e.g., crane and lift drives.
The theoretical analyses were used to develop a simulation model of the system in a Matlab and Simulink environment. In the final step, a laboratory model was developed and fully tested.
The simulation and experimental results confirm that the proposed thesis was fully achieved. Its general assumptions included:
  • Limitation of the RMS value of the feeder current—the operation of the system reduced it well below the value of the current of the consumer itself, which resulted from load rated active power (a fourfold reduction);
  • The feeder current remaining in a sinusoidal shape (with a dominant 1st harmonic) and in phase with the feeder line voltage.
The proposed solution can produce measurable economic benefits by reducing the rated power necessary to energize periodically operating loads and improving the indicators of electrical energy quality. Moreover, the cross-section areas of power cables can be reduced.
Future work on the issue requires the development of predictive or AI control algorithms dedicated to line current control in a wide time horizon, as well as the optimization of energy storage capacity. In future experiments, the use of other types of energy storage systems, e.g., flying wheels, is also planned. Additionally, the device will be dedicated to three-phase systems and asymmetrical loads.

Author Contributions

Conceptualization, K.S., M.B. and S.P; methodology, K.S., M.B. and S.P.; software, K.S. and M.B.; validation, K.S. and M.B; formal analysis, K.S., M.B. and S.P.; investigation, K.S and M.B.; resources, K.S.; data curation, K.S. and M.B.; writing—original draft preparation, K.S.; writing—review and editing, M.B., S.P.; visualization, K.S.; supervision, M.B. and S.P.; project administration, K.S.; funding acquisition, K.S. and M.B. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A

Table A1. Parameters of used controllers.
Table A1. Parameters of used controllers.
ParametersDC/DC Converter ControllersFilter Controllers
VC RU_conv_startVC RU_convCC RI_convVC RU_filter_startVC RU_filterCC RI_filter
Kp [-]0.220.6500.090.03130
Ti [s]20 × 10−311 × 10−35 × 10−310 × 10−3401 × 10−3
Saturation upper limit2 A20 A500 V7 A15 A500 V
Saturation lower limit0−20 A0−7 A−15 A−500 V
Table A2. System parameters and specifications.
Table A2. System parameters and specifications.
SymbolQuantityValue
Lfilter input inductance4 mH
CFfilter capacitor400 μF
LSDC/DC converter inductor4 mH
CSDC/DC converter capacitor4700 μF
VFfilter reference voltage500 V
VSDC/DC converter reference voltage400 V
fsw_filterfilter switching frequency with unipolar modulation10 kHz
fsw_convDC/DC converter switching frequency10 kHz
IS_maxmaximum DC/DC converter current20 A
ISDC/DC converter ripple current level15%
Table A3. Comparison of simulation and experimental results.
Table A3. Comparison of simulation and experimental results.
ParameterSimulationExperiment
Startup duration1.4 s1.55 s
iline_max during startup7 A7 A
Vline_RMS230 V225 V
iload_max20 A22 A
Iload_rms_max14 A12 A
iline_max3.2 A4 A
Iline_rms_max2.1 A3.3 A

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Figure 1. Single-phase active filter with energy storage—principle of operation diagram.
Figure 1. Single-phase active filter with energy storage—principle of operation diagram.
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Figure 2. General idea of load pulse averaging by an active power filter (APF) with energy storage (ES): (a) single pulse of the load; (b) the averaging procedure—energy distribution over time; (c) series load pulse averaging over time; ti—load pulse duration, tGAP—interval between turning on of successive loads, Tload—quasi-period of load activation.
Figure 2. General idea of load pulse averaging by an active power filter (APF) with energy storage (ES): (a) single pulse of the load; (b) the averaging procedure—energy distribution over time; (c) series load pulse averaging over time; ti—load pulse duration, tGAP—interval between turning on of successive loads, Tload—quasi-period of load activation.
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Figure 3. Boundary load conditions with a constant value of power: Pload: (a) operation with maximum duration of the load turn-on pulse ti_max and minimum interval Tload_min between successive load pulses (maximum of the energy); (b) operation with minimum duration of the load pulse ti_min and maximum interval Tload_max between successive load pulses; IAV_min/IAV_max—the min/max average values of the line current which ensure electrical energy balance in the APF + ES circuit.
Figure 3. Boundary load conditions with a constant value of power: Pload: (a) operation with maximum duration of the load turn-on pulse ti_max and minimum interval Tload_min between successive load pulses (maximum of the energy); (b) operation with minimum duration of the load pulse ti_min and maximum interval Tload_max between successive load pulses; IAV_min/IAV_max—the min/max average values of the line current which ensure electrical energy balance in the APF + ES circuit.
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Figure 4. Block diagram of the model used during simulations in the Matlab and Simulink environment—sections used during startup are marked red, where: CC—current controller, VC—voltage controller, VM—voltage measurement sensor, CM—current measurement sensor.
Figure 4. Block diagram of the model used during simulations in the Matlab and Simulink environment—sections used during startup are marked red, where: CC—current controller, VC—voltage controller, VM—voltage measurement sensor, CM—current measurement sensor.
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Figure 5. The block diagram of the series proportional-integral (PI) controller, where: e(k)—the control error signal, y(k)—the controller output signal, KP—the proportional gain, Ts—the sample time, Ti—the integral time constant.
Figure 5. The block diagram of the series proportional-integral (PI) controller, where: e(k)—the control error signal, y(k)—the controller output signal, KP—the proportional gain, Ts—the sample time, Ti—the integral time constant.
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Figure 6. APF with ES startup procedure—simulation results.
Figure 6. APF with ES startup procedure—simulation results.
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Figure 7. Waveforms of line and load current during compensation/filtration of the load: (a) instantaneous values of Vline and Iline in a wide time horizon (30 s) nlarged in (b); (c) calculated root mean square (RMS) values of line and load current in a wide time horizon (30 s) enlarged in (d).
Figure 7. Waveforms of line and load current during compensation/filtration of the load: (a) instantaneous values of Vline and Iline in a wide time horizon (30 s) nlarged in (b); (c) calculated root mean square (RMS) values of line and load current in a wide time horizon (30 s) enlarged in (d).
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Figure 8. Developed laboratory stand used during experiment, where: (1) load—spot welder with thyristor current controller; (2) active power filter with energy storage; (3) oscilloscope TEK DPO4054; (4) PC computer with GUI interface; (5) HV Differential Probe TEK P5205A, (6) Current Probe TEK TCP0020.
Figure 8. Developed laboratory stand used during experiment, where: (1) load—spot welder with thyristor current controller; (2) active power filter with energy storage; (3) oscilloscope TEK DPO4054; (4) PC computer with GUI interface; (5) HV Differential Probe TEK P5205A, (6) Current Probe TEK TCP0020.
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Figure 9. APF with ES startup procedure, experimental results corresponding to simulation result presented in Figure 6.
Figure 9. APF with ES startup procedure, experimental results corresponding to simulation result presented in Figure 6.
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Figure 10. Measured Iline, Iload currents, line voltage Vline and DC/DC converter voltage VS during compensation of the load—spot welder turned on randomly for six periods of line voltage (6 × 20 ms) in a wide time horizon (100 s), firing angle of thyristors equal to α = 70°: (a) instantaneous values of measured signals—a zoomed-in view in (b); (c) calculated RMS values of measured signals in a wide time horizon (100 s)—enlarged in (d).
Figure 10. Measured Iline, Iload currents, line voltage Vline and DC/DC converter voltage VS during compensation of the load—spot welder turned on randomly for six periods of line voltage (6 × 20 ms) in a wide time horizon (100 s), firing angle of thyristors equal to α = 70°: (a) instantaneous values of measured signals—a zoomed-in view in (b); (c) calculated RMS values of measured signals in a wide time horizon (100 s)—enlarged in (d).
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Figure 11. Measured Iline, Iload currents and line voltage Vline during compensation of the load—spot welder, turned on for six periods of line voltage (6 × 20 ms), firing angle of thyristors equal to α = 70°: (a) wider time horizon—illustration of line current flow stretched over time; (b) single welder turn-on instance, zoomed-in view.
Figure 11. Measured Iline, Iload currents and line voltage Vline during compensation of the load—spot welder, turned on for six periods of line voltage (6 × 20 ms), firing angle of thyristors equal to α = 70°: (a) wider time horizon—illustration of line current flow stretched over time; (b) single welder turn-on instance, zoomed-in view.
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Figure 12. Measured Iline, Iload currents, line voltage Vline and DC/DC converter voltage VS during compensation of the load—spot welder, turned on for 12 periods of line voltage (12 × 20 ms), firing angle of thyristors equal to α = 70°: (a) wider time horizon—illustration of line current flow stretched over time; (b) single welder turn-on instance, zoomed-in view.
Figure 12. Measured Iline, Iload currents, line voltage Vline and DC/DC converter voltage VS during compensation of the load—spot welder, turned on for 12 periods of line voltage (12 × 20 ms), firing angle of thyristors equal to α = 70°: (a) wider time horizon—illustration of line current flow stretched over time; (b) single welder turn-on instance, zoomed-in view.
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MDPI and ACS Style

Baszynski, M.; Sowa, K.; Pirog, S. An Active Power Filter with Energy Storage and Double DC Conversion for Power Surge Compensation. Electronics 2020, 9, 1489. https://doi.org/10.3390/electronics9091489

AMA Style

Baszynski M, Sowa K, Pirog S. An Active Power Filter with Energy Storage and Double DC Conversion for Power Surge Compensation. Electronics. 2020; 9(9):1489. https://doi.org/10.3390/electronics9091489

Chicago/Turabian Style

Baszynski, Marcin, Kacper Sowa, and Stanislaw Pirog. 2020. "An Active Power Filter with Energy Storage and Double DC Conversion for Power Surge Compensation" Electronics 9, no. 9: 1489. https://doi.org/10.3390/electronics9091489

APA Style

Baszynski, M., Sowa, K., & Pirog, S. (2020). An Active Power Filter with Energy Storage and Double DC Conversion for Power Surge Compensation. Electronics, 9(9), 1489. https://doi.org/10.3390/electronics9091489

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