# Simplified Modal-Cancellation Approach for Substrate-Integrated-Waveguide Narrow-Band Filter Design

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## Abstract

**:**

## 1. Introduction

## 2. Materials and Methods

#### 2.1. Mode Selection

#### 2.2. Mode Cancellation Using Inductive Obstacles

Algorithm 1 Defining frequency-selective obstacles. |

## 3. Results

#### 3.1. Narrow-Band Filter Design

- Multiple transverse electromagnetic modes should be tested.
- Verify the effect of the microstrip–SIW transition for different modes. For the sake of simplicity, the first filter was modeled as a no tapered SIW–microstrip transition.
- Different materials were tested using the proposed methodology. Complementary-metal-oxide-semiconductor (CMOS) integration requires the use of silicon (undoped silicon with ${\u03f5}_{r}=11.9$) as the substrate of the SIW devices, while traditional radio-frequency (RF) circuitry uses common FR4 and Rogers substrates.
- Devices with minimal sizes are always desired; for this, varying thicknesses of silicon were tested for different frequency ranges.

^{®}, and FR4 were used. Ansys HFSS was used with a PC setup with two processors, Intel Xeon Gold 6130 CPU $@2.10$ GHz and 128 GB of RAM. Each iteration consisted of running a simulation in Ansys in HFSS and then introducing its results into MATLAB, where the set of algorithms was executed. Each full-wave simulation took approximately 25 min to complete, while MATLAB identification could take a maximum of five minutes, thus adding to a total of 30 min per iteration. Each design could take approximately eight iterations to complete, leading to a total of 240 min of computational time per design. The lower-frequency filter was optimized to be fabricated in a simple manner by an LPKF s103 PCB maker.

#### 3.1.1. 28 GHz Filter Based on Smart Modal Selection

^{®}with ${\u03f5}_{r}=2.2$, $\delta =0.0004$, and $1.575$ mm of thickness with two 18 µm layers of copper is used as the substrate. The filter consisted of a rectangular SIW ($W=4.54$ mm and $L=27.55$ mm) with $0.16$ mm vias in diameter and a pitch of $0.14$ mm. Our mode of interest had its two closest neighbors at $26.24$ GHz and $30.05$ GHz. The SIW was discretized, as shown in Figure 4, for the three frequencies of interest. The ${C}_{N}$ cells of 0.3 mm size were exported from Ansys HFSS. Due to the electric-field configuration of the electric mode, seven inductive obstacles were selected as $\mathrm{max}\left(v\right)$. After obtaining the null cells, we selected the geometric center of the SIW as the starting point. One obstacle with a diameter of $0.16$ mm was positioned in the geometric. The immediate lower-order mode had a strong coupling inside the waveguide; as can be seen after the first obstacle introduction (Figure 5a), modal recombination was preferable.

**.**Lastly, seven equal vias 0.16 mm in diameter were located symmetrically inside the structure (equivalent impedance shown in Figure 6a). Three vias were located in the center null, while the four others were positioned vertically on the sides. Utilizing the circuit equations (Section 2.2), the MATLAB solver, and Optimetrics from HFSS, the filter was designed to have a narrow-band response with low insertion loss. To obtain the desired behavior, only seven iterations were needed to have a narrow response, that being much faster to converge than other computer-aided techniques [20,21]. The implementation of Algorithm 1 for this 28 GHz narrow-band filter is shown in Algorithm 2. Lastly, the geometry of Figure 6b was selected. The corresponding frequency response performed by HFSS is shown in Figure 6c. The filter had 20 dB matching in the frequency band of 27.90–28.04 GHz with a mean insertion loss of 0.4643 dB. The amount of copper used for the metal layers, and the metallization of the silver used to fill the vias strongly influenced the quality factor of the filter.

Algorithm 2: Application of Algorithm 1 on the design of 28 GHz narrow-band filter. |

#### 3.1.2. 5.8 GHz Filter Based on Smart Modal Selection

^{®}. A silicon SIW filter based on $T{E}_{3,1}$ mode is proposed. The filter includes a tapered transition between the microstrip line and waveguide for smooth field matching. Typical thickness for silicon wafers (400 µm) with ${\u03f5}_{r}=11.9$ is used as the substrate. Thinner silicon wafers would not allow propagation due to high conductivity losses [18]. The bottom and top metallic layers were assumed to be $1\text{}$µm thick. The diameter of the vias of the metal fence was 0.271 mm, with a pitch of $0.0678$ mm between each. The layout of the proposed filter after discretization is shown in Figure 7 with the tapered transition.

#### 3.2. Fabrication and Proof of Concept for 3.2 GHz Filter

^{®}series, and low-loss connectors could reduce the effect of the insertion losses.

## 4. Discussion

## 5. Conclusions

## Author Contributions

## Funding

## Acknowledgments

## Conflicts of Interest

## Appendix A

## Appendix B

## References

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**Figure 1.**Schematic showing diameter and pitch of substrate-integrated-waveguide (SIW) metallic vias.

**Figure 2.**Inductive obstacles: SIW model, cross-section, and circuit equivalent for inductive metal post.

**Figure 3.**Obstacle location inside SIW. (

**a**) SIW discretized into C

_{i,j}square cells; (

**b**) division of cells inside SIW.

**Figure 4.**Discretized SIW operating under mode $T{E}_{4,1}.$ Electric field discretized for $28\text{}$ GHz using nonmodel object cells of $0.3\text{}$ mm side in Ansys HFSS.

**Figure 5.**Increasing obstacles for simulated 28 GHz band Rogers 5880 filter: (

**a**) one, (

**b**) three, (

**c**) five, and (

**d**) seven obstacle(s).

**Figure 6.**Simulated 28 GHz band Rogers 5880 filter. (

**a**) Equivalent circuit for 28 GHz filter. Each via corresponds to an LC four-terminal element. ${R}_{S}$ and ${R}_{L}$, equivalent resistance of source and load. (

**b**) Schematic of proposed filter: $W=4.54\text{}$ mm, ${W}_{1}=2.19\text{}$ mm, ${W}_{2}=0.24\text{}$ mm, $L=27.55\text{}$ mm, and ${L}_{1}=6.8875\text{}$ mm. (

**c**) Simulated S-parameters.

**Figure 7.**Discretized SIW with SIW–microstrip transition operating under mode $T{E}_{3,1}$. Electric field discretized for $5.8\text{}\mathrm{GHz}$ using nonmodel object cells of size $0.34$ mm in Ansys HFSS.

**Figure 8.**Simulated 5.8 GHz band silicon filter. (

**a**) Equivalent circuit for 5.8 GHz filter. Each via corresponded to LC four-terminal element. ${R}_{S}$ and ${R}_{L}$ are equivalent resistance of source and load. (

**b**) Schematic of proposed filter: $W=19.571\text{}$ mm, ${W}_{1}=0.4$ mm, ${W}_{2}=9.3\text{}$ mm, ${W}_{3}=1.1\text{}$ mm, ${W}_{4}=1.355\text{}$ mm, L = 24.6 mm, ${L}_{1}=4.4515\text{}$ mm, and ${L}_{2}=3.8\text{}$ mm. (

**c**) Simulated S-parameters.

**Figure 9.**Fabricated filter on FR4 using second-mode $T{E}_{11}$ approach. (

**a**) Schematic of 3.2 GHz FR4 simple narrow-band filter; $W=36.1\text{}$ mm, ${W}_{1}=30\text{}$ mm, ${W}_{2}=2\text{}$ mm, $L=32.15\text{}$ mm, ${L}_{1}=25\text{}$ mm, and ${L}_{2}=1\text{}$ mm. (

**b**) Photograph of fabricated filter. (

**c**) Simulated and measured S-parameters of proposed filter.

Ref. | Center Frequency | Bandwidth | Topology SIW | Number of Reported Variables | Size $\mathbf{(}{\mathit{\lambda}}_{\mathbf{0}}\mathbf{\times}{\mathit{\lambda}}_{\mathbf{0}}\mathbf{)}$ |
---|---|---|---|---|---|

28 GHz filter using smartly positioned obstacles | 28 GHz | 0.27 GHz | Single layer—seven inner vias | 7 | $2.57\times 0.42$ |

5.8 GHz filter using smartly positioned obstacles | 5.8 GHz | 0.2 GHz | Single layer—seven inner vias | 11 | $0.37\times 0.47$ |

3.2 GHz filter using smartly positioned obstacles | 3.2 GHz | 0.28 GHz | Single layer—one inner via | 8 | $0.12\times 0.14$ |

[23] | 3.35 GHz | 0.2 GHz | Two sawtooth CRLH | >10 | $0.12\times 0.09$ |

[24] | 5 GHz | 0.7 GHz | Modified CRLH | >10 | $0.37\times 0.25$ |

[25] | 6.8 GHz | 0.2 GHz | CRLH | >10 | $0.23\times 0.14$ |

[26] | 8.25 GHz | 0.33 GHz | Single layer—multiple cavities | >10 | $1.27\times 1.27$ |

[27] | 34.5 GHz | 0.86 GHz | Multilayered—multiple slots | >15 | $0.46\times 0.44$ |

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**MDPI and ACS Style**

Celis, S.; Farhat, M.; Almansouri, A.S.; Bagci, H.; Salama, K.N.
Simplified Modal-Cancellation Approach for Substrate-Integrated-Waveguide Narrow-Band Filter Design. *Electronics* **2020**, *9*, 962.
https://doi.org/10.3390/electronics9060962

**AMA Style**

Celis S, Farhat M, Almansouri AS, Bagci H, Salama KN.
Simplified Modal-Cancellation Approach for Substrate-Integrated-Waveguide Narrow-Band Filter Design. *Electronics*. 2020; 9(6):962.
https://doi.org/10.3390/electronics9060962

**Chicago/Turabian Style**

Celis, Sebastian, Mohamed Farhat, Abdullah S. Almansouri, Hakan Bagci, and Khaled N. Salama.
2020. "Simplified Modal-Cancellation Approach for Substrate-Integrated-Waveguide Narrow-Band Filter Design" *Electronics* 9, no. 6: 962.
https://doi.org/10.3390/electronics9060962