Next Article in Journal
Dimensionality Reduction for Smart IoT Sensors
Previous Article in Journal
A Novel Highly Linear Voltage-To-Time Converter (VTC) Circuit for Time-Based Analog-To-Digital Converters (ADC) Using Body Biasing
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Power Integrity Analysis of Power Distribution Network Segmented Using DGS–Electromagnetic Bandgap Structure in Mixed-Signal PCBs

Department of ICT and Robotics Engineering, Hankyong National University, Anseong 17579, Korea
Electronics 2020, 9(12), 2036; https://doi.org/10.3390/electronics9122036
Submission received: 6 November 2020 / Revised: 25 November 2020 / Accepted: 26 November 2020 / Published: 1 December 2020
(This article belongs to the Section Microwave and Wireless Communications)

Abstract

:
In this paper, we present the power integrity analysis of a power distribution network (PDN) employing a segmentation technique based on the electromagnetic bandgap (EBG) structure with a defected ground structure (DGS). For efficient analysis of power integrity, a domain decomposition method (DDM) with a novel modeling of the DGS–EBG-based PDN is presented. In the DDM, analytical models for the partitioned parts of the PDN are developed, and their impedance parameters are analytically extracted. The resonant modes for the power integrity analysis are rigorously examined using the DDM and electric-field distribution. The effect of the DGS–EBG stopband on the resonant modes are analyzed. The proposed DDM and power integrity analysis are verified using full-wave simulation and measurements. The DDM result shows good agreement with the full-wave simulation and measurements.

1. Introduction

In mixed-signal printed circuit boards (PCBs), high-speed digital devices, radiofrequency (RF) components, and analog devices are densely integrated with a common power distribution network (PDN). The high-speed digital device generates a switching noise, which is known as power/ground noise. The power/ground noise is coupled to a noise-sensitive device such as a wireless communication device and an analog device through the PDN shared by them. The performances of the wireless and analog devices are severely deteriorated by the power/ground noise [1,2,3,4,5]. The power/ground noise significantly degrades the sensitivity of the receiving signal in a wireless device, inducing the malfunction of the analog device. Therefore, power/ground noise suppression between the digital PDN and RF/analog PDN is required in mixed-signal PCBs.
As a solution to the noise problem, PDNs employing a segmentation technique have been extensively studied [6,7,8,9,10,11,12,13]. In particular, the PDN segmented by the electromagnetic bandgap (EBG) structure with a defected ground structure (DGS) is considered a promising technique for power/ground noise suppression [14,15,16,17,18,19,20,21,22,23]. Figure 1 illustrates the PDN employing DGS–EBG segmentation. It mainly consists of a PDN for digital devices, PDN for RF/analog devices, and DGS–EBG array. As show in Figure 1a, the DGS–EBG array configures in various ways to optimize its performance considering power/ground noise isolation, design flexibility, and current–resistance (IR) drop problem. The IR drop problem induces from the narrow branches of the DGS–EBG structure, and the DGS–EBG structure should be cautiously designed considering this limitation [24]. The size of the DGS–EBG array can be defined as the number of DGS–EBG structures and the number of unit cells in a single DGS–EBG structure. DGS–EBG arrays with sizes 2 × 2, 1 × 4, and 3 × 1 are shown as an example configuration.
Most studies focused on the noise coupling of DGS–EBG-based segmentation, as DGS–EBG-based segmentation shows a distinguished feature of power/ground noise suppression between the PDN with digital devices and the PDN with RF/analog devices. However, the power integrity characteristics of the PDN with the digital device are also important because the power integrity substantially affects the performance of the digital device. For a digital device to function properly, we need to ensure that the power/ground impedance is less than the target impedance over the wideband frequency range [25,26,27,28,29]. The target impedance typically requires a lower impedance value in the low-frequency range compared with the impedance value in the high-frequency range. Therefore, the resonance peaks of the power/ground plane impedance in the low-frequency ranges should be strictly prohibited for the robust design of a high-speed digital device.
For a PDN adopting DGS–EBG-based segmentation, the resonance peak in the low-frequency range becomes a serious problem. Application of the DGS–EBG array to a PDN leads to an increase in the capacitance and inductance of the power/ground plane, which results in a substantial decrement in the frequency of the resonance mode. The preliminary results of the power integrity of the DGS–EBG-based PDN are illustrated in Figure 1b. The self-impedances of the PDNs with and without DGS–EBG arrays are compared. As seen in this result, the DGS–EBG array significantly reduces the frequency of the first resonant mode such that a resonance peak with a high impedance value appears in the low-frequency range. This resonance peak may induce a serious problem for high-speed digital devices. To reduce the resonance peaks in the low-frequency ranges, combining a PDN with a decoupling capacitor can be considered [30,31,32,33]. However, an interaction between the decoupling capacitor and the PDN impedance can generate an additional resonance peak or just shift its frequency. Consequently, the effect of DGS–EBG-based segmentation on the power integrity characteristics of the PDN should be carefully considered for the successful operation of the high-speed digital device.
The DGS–EBG structure is typically employed for the isolation of the power/ground noise between digital and analog PDNs. However, the impact of DGS–EBG-based segmentation on power integrity is incredibly significant. In this study, we focus on the power integrity characteristics of the PDN by adopting the DGS–EBG segmentation technique. Its effect is rigorously analyzed using the proposed analytical method, as well as electromagnetic (EM) simulation. The proposed analytical method is developed for the efficient analysis of power integrity. It is based on the domain decomposition method (DDM) combined with a physics-based model of the DGS–EBG structure which can be applied to various DGS sizes. The resonant modes of the DGS–EBG-based PDN and the proposed DDM are validated using the measurements. The remainder of this paper is organized as follows: Section 2 presents the proposed DDM for an efficient analysis of power integrity characteristics. An analytical modeling method for decomposed parts of the PDN is also presented. In Section 3, the resonant modes of the PDN are analyzed using the DDM and EM simulation. The effect of the DGS–EBG array on the power integrity is thoroughly investigated. The power integrity analysis and the proposed DDM result are also verified through measurements. Lastly, the paper is concluded in Section 4.

2. Methods

2.1. Overview of Proposed DDM

A DDM for an inhomogeneous EBG-based PDN was developed to analyze the power integrity of digital switching devices on a D-PDN in the presence of EBG structures and the other PDNs for noise-sensitive devices. In general, an inhomogeneous EBG-based PDN consists of several D- and NS-PDNs connected to each other through DGS-EBG arrays. Although various configurations of EBG segmentation for the inhomogeneous EBG-based PDN can be considered [19,20,21,22,23,34,35,36], we focus on the PDN configured as a non-closed-loop interface between an EBG array and a D- or NS-PDN. The non-closed-loop interface implies that the boundary between an EBG array and a D-PDN is different from the boundary for an EBG array and an NS-PDN. This type of segmentation is preferred because a PDN design can be simple and straightforward; it is also easy to implement.
The procedure of DDM for an inhomogeneous EBG-based PDN including a non-closed-loop interface is presented in Figure 2a. The proposed DDM mainly consists of three steps: partitioning, modeling, and recombining. In partitioning of a PDN, an inhomogeneous EBG-based PDN is divided into several segments. The segments can be further decomposed to facilitate their simple modeling, and then an appropriate model for a segment is developed using microwave and circuit theory. From the models, we can extract the corresponding impedance parameters (Z-parameters). In the recombining step, the Z-parameter of the original PDN is acquired using an impedance recombination technique.
More specifically, the inhomogeneous EBG-based PDN is decomposed into the DGS–EBG array, D-PDN, and NS-PDN during the partitioning step of the proposed DDM. Applying the DDM, the original domain (Ωo) of the EBG-based PDN is divided into subdomains (Ω1, Ω2, Ω3) of the DGS–EBG array, D-PDN, and NS-PDN, as shown in Figure 2b. The interfaces between Ω1 and Ω2 and between Ω1 and Ω3 are represented as Γ1 and Γ2, respectively, whereas the interface between Ω2 and Ω3 is not defined. For Ω1 (i.e., DGS–EBG array), we perform a partitioning step to obtain the segments that can be modeled in a simple manner. The DGS–EBG array is divided into a via-shorted microstrip line (Ω1a), a parallel plate waveguide (Ω1b), and two microstrip lines (Ω1c, Ω1d). The relationship between the original PDN and its decomposed segments is summarized as follows:
Ω o = Ω 1   Ω 2   Ω 3 ,
Ω 1 = Ω 1 a   Ω 1 b   Ω 1 c   Ω 1 d ,
Ω 1   Ω 2 = Γ 1 , Ω 1   Ω 3 = Γ 2 , Ω 2   Ω 3 = ϕ ,
where the interfaces among Ω1c, Ω1d, Ω1c, and Ω1d are not significant and, thus, are not shown here. They are described in the next subsection.

2.2. Segment Modeling

In this subsection, all segments are represented as their own models using microwave and circuit theory. From the models, we can extract the Z-parameters of the segments to describe the current–voltage relationship of all ports. The first segment for the electrical modeling is a DGS–EBG array, as shown in Figure 3a. Two EBG unit cells are shown, but the proposed DDM is not limited by the number of cells. As mentioned previously, the domain of the DGS–EBG array is denoted as Ω1, which is further decomposed into two microstrip lines and EBG unit cells. The impedance diagram for the DGS–EBG array is illustrated in Figure 3b. The Z-matrices of the microstrip lines, EBG unit cells, and DGS–EBG array are represented as ZTL, ZUC, and Ze, respectively. ZTL is easily extracted using the transmission line theory [37]. However, the modeling of the EBG unit cell is more complicated. Here, we focus on the modeling of the unit cell.
To accurately capture the characteristics of electromagnetic propagation in the DGS–EBG unit cell and conveniently perform its modeling, the physics-based model of the unit cell of the DGS–EBG structure is employed. When the wave propagates through the EBG unit cell, it is observed that the current density substantially increases at the surface of the conductors owing to the skin effect [37]. For instance, the skin depth of copper at a frequency of 1 GHz is 2.1 μm, whereas the thickness of a copper layer in high-speed packages and PCBs is typically 18 μm. Therefore, we assume that most currents flow on the surface. This can be applied to an EBG patch. Figure 4 depicts the conceptual illustration of the current flow in the DGS-EBG unit cell considering the skin effect. The current on the EBG patch is concentrated on the surface such that the current path is approximately divided into upper and lower plates. The current on the EBG patch detours around its edge.
According to this physics-based phenomenon, we separated the unit cell into a high-Zo segment and low-Zo segment, as shown in Figure 5. The high-Zo segment consists of a defected ground plane and an upper plate of an EBG patch that are connected through a via. The low-Zo segment comprises a low plate of the EBG patch and a power plane. From the viewpoint of wave propagation, the high-Zo segment includes a narrow conductor, resulting in high characteristic impedance, whereas the characteristic impedance of a low-Zo segment is relatively low owing to its wide conductor. The high- and low-Zo segments are two-port components. For the high-Zo segment, the ports are defined with the terminals of a defected ground plane and an upper plate. The ports of the low-Zo segment are associated with the terminals of the lower plate and the power plane. Considering a bypass current at the edge of the EBG patch, the terminals of the upper and lower plates should be directly connected to each other. The current detour induces a small inductance, but it can be ignored in the frequency range of interest.
The ports of the DGS–EBG unit cell and their relationships are illustrated in Figure 5. The original ports of the DGS–EBG unit cell are represented as u ¯ and v ¯ which are called external ports. The ports of the high- and low-Zo segments are p ¯ HS , q ¯ HS , r ¯ LS , and s ¯ LS , and are called internal ports. In Figure 5, all ports are shown as a pair of two terminals for simplification. However, each port can have multiple pairs. When the width of the conductor in the high- and low-Zo segments is comparable to or larger than the minimum wavelength (λmin), multiple ports are employed to capture the phase variations perpendicular to the longitudinal wave propagation. Hence, the ports of the DGS-EBG unit cell and their segments are generally expressed as an N × 1 array. For simplicity, only the port q ¯ is expressed as a port array. The voltage–current relationship of the DGS–EBG unit cell and the segments can be explained using a Z-parameter. The Z-parameters of the DGS–EBG unit cell and the high- and low-Zo segments are represented as ZUC, ZHS, and ZLS, respectively.
Their relationship is depicted in Figure 6. From this impedance diagram, ZUC is expressed as ZHS and ZLS. For all ports of the DGS–EBG unit cell, the terminal of the DGS–EBG unit cell is equal to the positive terminal of the high-Zo segment, whereas the other terminal is connected to the negative terminal of the low-Zo segment. Moreover, the negative terminals of the high-Zo segment are directly connected to the corresponding positive terminals of the low-Zo segment. This leads to a series–series connection configuration of two segments for all ports. Thus, ZUC is simply expressed as
Z UC = Z HS + Z LS ,
where
Z UC = [ Z 11 , UC Z 12 , UC Z 1 ( 2 N ) , UC Z 21 , UC Z 22 , UC Z 2 ( 2 N ) , UC Z ( 2 N ) 1 , UC Z ( 2 N ) 2 , UC Z ( 2 N ) ( 2 N ) , UC ] ,
Z HS = [ Z = pp Z = pq Z = qp Z = qq ] ,
Z LS = [ Z = rr Z = rs Z = sr Z = ss ] ,
Z ij = [ Z ( i 1 ) ( j 1 ) Z ( i 1 ) ( jN ) Z ( iN ) ( j 1 ) Z ( iN ) ( jN ) ] ,   ( i ,   j = p ,   q ,   r ,   s ) .
The high-Zo segment consists of a narrow plane connected to the wide plane through the via, as shown in Figure 7. The wide plane corresponds to the upper plate of the EBG patch. The length of the wide plane is dp. The DGS size is represented by ddgs. The width of the narrow plane is dp–ddgs, which is inversely proportional to the DGS size. The via is located at the center of the narrow plane. The via height is hhs, being equal to the dielectric thickness. To extract the ZHS, a full-cavity mode frequency-domain resonator model [38] is adopted, which provides an analytical expression for the voltage–current relationship of the power/ground planes. The electromagnetic model of the high-Zo segment is a resonant cavity including ports p ¯ HS , q ¯ HS , and r HS located at one edge, the other edge, and the middle of the power/ground planes, respectively. The r HS is defined as an auxiliary port for modeling a via inductance (Lvia). A diagram of the Z-matrix with the ports of p ¯ HS , q ¯ HS , and r HS is depicted in Figure 7b, which is obtained by applying the resonant cavity model to the high-Zo segment. Using the condition of terminating the port r HS with Lvia, the reduced Z-matrix of the high-Zo segment is given by
V HS = [ V 1 , p V N , p V 1 , q V N , q ] = [ Z = pp Z = pq Z = qp Z = qq ] [ I 1 , p I N , p I 1 , q I N , q ] = Z HS I HS ,
Z ij = Z ij + Z rj 1 ω L via Z rr ,
Z ij = m = 0 n = 0 C m 2 C n 2 μ h hs d p ( d p d dgs ) 1 ω ( k xm 2 + k yn 2 k 2 ) cos   ( k xm x i ) cos ( k yn y i ) cos ( k xm x j ) cos ( k yn y j ) , ( i ,   j = p 1 ,   , p N ,   q 1 ,   , q N ) ,
where kxm = (mπ/dc), kyn = (nπ/(dc − ddgs)), and k = ω μ ε . The constant Cm is equal to 1 or 2 for m = 0 or m ≠ 0, respectively. Similarly, Cn is 1 or 2 for n = 0 or n ≠ 0, respectively. The Z-matrix is partitioned into three factors:
(1)
Constant factor
C m 2 C n 2 μ h hs d p ( d p d dgs ) ;
(2)
Green’s-function-like factor
1 ω ( k xm 2 + k yn 2 k 2 ) ;
(3)
Cosine factors
cos ( k xm x i ) cos ( k yn y i ) cos ( k xm x j ) cos ( k yn y j ) .
We can acquire an insight into the behavior of the high-Zo segment by analyzing the effect of these three factors on the Z-matrix. The constant factor is mainly determined by the geometrical parameters. Specifically, it is observed that the DGS size affects the Z-matrix. The Green’s-function-like factor is dependent on the frequency. It defines the locations of the poles or peaks in the system impedance. The cosine factors show the influence of the port locations on the Z-matrix. This model can be applied to the various DGS sizes.
For the low-Zo segment, the Z-matrix is extracted using a resonant cavity model. The ports, design parameters, and impedance diagram are illustrated in Figure 8. The application of the resonant cavity model yields the Z-matrix of the low-Zo segment as follows:
Z ij = m = 0 n = 0 C m 2 C n 2 μ h LS d p 2 1 ω ( k xm 2 + k yn 2 k 2 ) cos ( k xm x i ) cos ( k yn y i ) cos ( k xm x j ) cos ( k yn y j ) , ( i ,   j = s 1 ,   , s N ,   t 1 ,   , t N ) .
The Z-matrix of the low-Zo segment can be described in a similar manner as that of the high-Zo segment.
Figure 9 shows the PDN where the DGS–EBG array is removed. The D- and NS-PDNs are rectangular-shaped parallel plates. The sizes of the D- and NS-PDNs are xd × yd and xns × yns, respectively. The distance between the power and ground planes (i.e., dielectric thickness) is h, which is equal to the sum of hHS and hLS, when the copper thickness can be ignored. The port definitions are shown in Figure 9. To investigate the power integrity characteristics of the D-PDN, the ports from p1 to pm are defined. To connect with the DGS–EBG array, internal ports q ¯ and t ¯ are employed in the D-PDN and NS-PDN, respectively. The port u ¯ is additionally defined to extend the proposed model. For instance, the proposed model can include the NS-PDN with decoupling capacitors located at the port u ¯ . The Z-parameters of the D-PDN (ZD) and NS-PDN (ZN) are derived using the resonant cavity model [38]. They are not described in detail because their derivations are similar to extracting the Z-matrix of the low-Zo segment.

2.3. Recombination

To analyze the effect of EBG-based segmentation on the power integrity characteristics, the Z-parameter of the original PDN is acquired by recombining the Z-matrices derived in the previous subsection. An interconnection diagram for the D-PDN, DGS–EBG array, and NS-PDN is shown in Figure 10a. The port q ¯ of the D-PDN is connected to the port r ¯ of the DGS–EBG array. The DGS–EBG array consists of n EBG structures, including several unit cells. The aforementioned EBG structure in Figure 3 includes two unit cells, but the EBG structure can generally comprise several unit cells. The other interconnection between the DGS–EBG array and the NS-PDN is implemented through the internal ports of s ¯ and t ¯ . The power integrity characteristics of the D-PDN are monitored through the external port p ¯ , whereas the external port u ¯ is used for capturing noise coupling or connecting to an electrical component such as a decoupling capacitor.
For impedance recombination, the Z-matrix of the DGS–EBG array is formed as a diagonal matrix, as shown in Figure 10b. Its entities consist of Ze, which is the Z-matrix of the DGS–EBG structure derived in the previous subsection. Because the Z-parameters of all segments (ZD, ZE, ZN) are extracted on the basis of the equations, the Z-matrix of the original PDN can be obtained analytically. The Z-matrix (Z’) recombines the Z-matrices of the D-PDN with the DGS-EBG array as follows [39]:
Z = Z pp + ( Z pq Z pr ) ( Z qq + Z rr ) 1 ( Z rp Z qp ) ,
where
Z pp = [ Z 11 , D Z 1 m , D 0 0 Z m 1 , D Z mm , D 0 0 0 0 Z ( n + 1 ) ( n + 1 ) , E Z ( n + 1 ) ( 2 n ) , E 0 0 Z ( 2 n ) ( n + 1 ) , E Z ( 2 n ) ( 2 n ) , E ] ,
Z pq = [ Z 1 ( m + 1 ) , D Z 1 ( m + n ) , D Z m ( m + 1 ) , D Z m ( m + n ) , D 0 0 0 0 ] ,
Z pr = [ 0 0 0 0 Z ( n + 1 ) 1 , E Z ( n + 1 ) n , E Z ( 2 n ) 1 , E Z ( 2 n ) n , E ] ,
Z qq = [ Z ( m + 1 ) ( m + 1 ) , D Z ( m + 1 ) ( m + n ) , D Z ( m + n ) ( m + 1 ) , D Z ( m + n ) ( m + n ) , D ] ,
Z rr = [ Z 11 , E Z 1 n , E Z n 1 , E Z nn , E ] ,
Z rp = [ 0 0 Z 1 ( m + 1 ) , E Z 1 ( m + n ) , E 0 0 Z n ( m + 1 ) , E Z n ( m + n ) , E ] ,
Z qp = [ Z ( m + 1 ) 1 , D Z ( m + 1 ) m , D 0 0 Z ( m + n ) 1 , D Z ( m + n ) m , D 0 0 ] .
Consequently, the recombination of Z′ with the Z-matrix of the NS-PDN yields
Z original = Z pp + ( Z ss + Z tt ) ( Z ps Z pt ) 1 ( Z tp + Z sp ) ,
where the Z-matrices of the right-hand side are not shown redundantly because they are expressed in a similar manner to Equations (7)–(13).

3. Results and Discussion

Using the proposed DDM, the effect of DGS–EBG-based segmentation on the PDN power integrity is investigated. The PDN in Figure 1 is employed as an example structure and its dimensions are chosen considering the typical process of mixed-signal PCBs, as shown in Table 1. The board sizes of the D-PDN (xd, yd) and NS-PDN (xNS, yNS) are 20 × 23 mm2 and 28 × 36 mm2, respectively. The unit cell size (dc) in the DGS-EBG array is 4 mm. The length of the DGS is 3.4 mm. The patch length (dp) is 3.8 mm. The dielectric thicknesses of the high- and low-Zo segments are 0.8 and 0.1 mm, respectively. Port p1 is defined in the D-PDN, where we rigorously examine the power integrity characteristics. Its position (xp1, yp1) is (5 mm, 4 mm) with the origin located at the higher left corner of the PDN, as shown in Figure 1. The other ports of q1, q2, r1, and r2 are exhibited as internal ports for DDM. In this demonstration, Port u is not used for the sake of simplicity. The positions of the other ports (xq1, yq1), (xq2, yq2), (xr1, yr1), and (xr2, yr2) are (5, 4), (20, 22), (20, 10.9), (24, 12), and (24 mm, 0.9 mm), respectively.
The power integrity characteristics of the PDN segmented by the DGS–EBG structure are analyzed using a self-impedance (Z11). By applying the proposed DDM, the self-impedance (Z11) of this PDN is obtained, as shown in Figure 11. To verify the results of the proposed DDM, the results of the EM field solver [40] are also shown. It is observed from both results that Z11 includes several resonance peaks at which the Z11 values are quite high. The Z11 peaks are induced from the resonance modes of the DGS-EBG-based PDN. They are named Modes 1 to 5 in the order of frequency. From the DDM results, the resonance frequencies of Modes 1 to 5 are 0.65, 1.15, 3.10, 3.62, and 4.73 GHz, respectively, whereas those from the EM simulation are 0.55, 1.17, 3.23, 3.73, and 4.68 GHz, respectively. A discrepancy between the DDM and the EM simulation is shown at a frequency of 0.85 GHz. The DDM generates an additional resonance peak, which results from ignoring inductive and capacitive coupling effects at the interfaces of the segments. Excluding the additional peak, the proposed DDM shows good agreement with the EM simulation. To enhance the correlation between them, the fringing capacitance of the PDN for the DDM can be considered. The proposed DDM shows superior characteristics of computation time compared to the EM simulation. The computation time of the EM simulation is 184 s, whereas that of the DDM is only 0.7 s.
Further analysis of the resonance peaks is performed using electric-field (E-field) distributions of the DGS–EBG-based PDN at all frequencies of the resonance modes, as shown in Figure 12. The E-field distributions are acquired from the resonant mode analysis of the EM field solver [29]. As shown in Figure 12a,b, the E-field distributions for the resonant modes 1 and 2 are determined by the electromagnetic properties of the entire segments, namely, D-PDN, DGS–EBG array, and NS-PDN. However, the resonant modes 3, 4, and 5 are affected by D-PDN only. These mode frequencies are mainly determined by the size of the D-PDN. Mode 3 is similar to the lowest mode of rectangular-shaped power/ground planes having the same size as the D-PDN. Modes 4 and 5 approximately correspond to the second- and third-order modes of the rectangular-shaped power/ground planes, respectively. This notable result originates from the isolation achieved by the DGS–EBG array. To explain the isolation, a low cutoff frequency of the DGS-EBG array is obtained. Using EM simulation with Floquet theory [41], the low cutoff frequency is equal to 2.11 GHz. Resonant modes above the frequency of 2.11 GHz can be analyzed by separating the D-PDN from the NS-PDN. It is shown that the analysis of the power integrity characteristics of the EBG-segmentation-based PDN above a low cutoff frequency of the DGS–EBG structure can be performed by independent examination of the D-PDN. The isolation characteristics in the power integrity analysis imply that the resonant modes of the NS-PDN do not affect the D-PDN either. Figure 13 depicts the E-field distribution at a frequency of 3.37 GHz, which is higher than the low cutoff frequency. The figure indicates that the E-field distribution is determined by the NS-PDN only, and the E-field value in the D-PDN is equal to 0. Therefore, a resonance peak at 3.37 GHz is not observed in Figure 11.
To rigorously investigate the effect of DGS-EBG segmentation on the power integrity and demonstrate the proposed DDM, the self-impedance for the PDN having a different size in the NS-PDN is obtained. The length xns of the NS-PDN is reduced from 28 mm to 20 mm. This leads to a decrease in the plane capacitance of the entire PDN such that the frequency of Mode 1 increases, as shown in Figure 14. The frequencies of modes 1 for xns of 28 mm and 20 mm are 0.65 and 0.71 GHz, respectively. It is anticipated that Modes 2–5 are not influenced by this change. For Mode 2, the mode frequency is mainly determined by the length of the yns, as shown in Figure 12b. For Modes 3–5, the mode frequencies are only affected by the D-PDN owing to the isolation of the DGS–EBG array, which was previously explained. As shown in Figure 14, the DDM successfully reflects this phenomenon compared to the EM simulation results. The frequencies for xns of 28 mm and 20 mm from the EM simulation are 0.55 and 0.60 GHz, respectively.
Another effect of DGS–EBG segmentation on PDN power integrity is investigated by changing the patch size (dp) of the EBG structure. The self-impedances of the PDNs with EBG patch lengths of 4 and 3 mm are compared, as shown in Figure 15a. In addition to DDM, the EM simulation results are acquired to validate the DDM results, as shown in Figure 15b. The frequencies of Mode 2 for dp values of 4 and 3 mm from the DDM are 1.17 and 1.44 GHz, respectively, whereas those from the EM simulation are 1.17 and 1.37 GHz, respectively. It is observed that the frequency of Mode 2 increases as dp decreases. The reduction in dp does not affect Modes 1, 3, 4, and 5. For Mode 1, the mode frequency is mainly affected by the total length of the D- and NS-PDNs. The reduction in dp leads to a decrease in the capacitance of the EBG patch. However, it can be ignored compared with the plane capacitances of the D- and NS-PDNs. For Modes 3, 4, and 5, the frequencies are still higher than the low cutoff frequency of the DGS–EBG structure with a dp of 3 mm, which is equal to 2.75 GHz. This result is observed from the results of both DDM and EM simulation.
To experimentally verify the proposed DDM, the example PDN is fabricated using a conventional PCB process. The dimensions of the fabricated PCB are identical to those in Table 1. Copper and FR-4 are used as conductors and dielectric materials, respectively. The dielectric constant and loss tangent of FR-4 are 4.3 and 0.02, respectively. The copper thickness is 18 μm. The scattering parameters (S-parameters) of the fabricated PCB are measured using a vector network analyzer and 500 μm pitch GSG (ground-signal-ground) probes. The measured S-parameters are converted into Z-parameters to acquire the self-impedance Z11. The results of DDM, EM simulation, and measurements are compared in Figure 16. It is observed that the DDM result shows good agreement with the measurements.
To additionally demonstrate the DGS effect on noise isolation, Figure 17 depicts the DGS–EBG-based PDN with two ports located at (5 mm, 4 mm) and (37 mm, 4 mm) on the D- and NS-PDNs, respectively. The Z21 results, showing noise isolation between the D- and NS-PDNs, are obtained using the proposed DDM as shown in Figure 17b. The ddgs values are varied as 0.4, 2.3, and 3.4 mm, which affects the DGS characteristics. It is demonstrated that the power/ground noise reduction is improved as the DGS effect becomes dominant.

4. Conclusions

We analyzed the power integrity characteristics of the PDN implementing the DGS–EBG-based segmentation technique. To examine the effect of DGS-EBG-based segmentation, an analytical DDM was proposed. The DDM involved the physics-based model of the DGS-EBG structure and the resonant cavity model of the D- and NS-PDNs to obtain the Z-matrix of the entire PDN. From the Z-matrix, the resonant modes of the PDN were investigated. It is shown that the resonant mode, whose frequency is less than the cutoff frequency of the DGS-EBG structure, was affected by the entire PDN including the D-PDN, DGS–EBG array, and NS-PDN. The resonant modes in the stopband of the DGS–EBG structure were influenced by the D-PDN only. This was validated by performing the E-field distributions of the resonant modes. In addition, the effects of adjusting the PDN and EBG patch sizes were examined using DDM. The proposed DDM was verified by an EM simulation and measurements. The power integrity analysis based on the DDM provides insight into the design of EBG-based segmentation considering the resonant modes. The proposed DDM enables a rapid and efficient analysis of the power integrity of the PDN by adopting the DGS–EBG partitioning technique.

Funding

This work was supported by a National Research Foundation of Korea (NRF) grant funded by the Korea government (Ministry of Science and ICT) (NRF-2019R1C1C1005777).

Conflicts of Interest

The author declares no conflict of interest.

References

  1. McCredie, B.D.; Becker, W.D. Modeling, measurement, and simulation of simultaneous switching noise. IEEE Trans. Compon. Packag. Manuf. Technol. Part B 1996, 19, 461–472. [Google Scholar] [CrossRef]
  2. Chun, S.; Swaminathan, M.; Smith, L.D.; Srinivasan, J.; Jin, Z.; Iyer, M.K. Modeling of simultaneous switching noise in high speed systems. IEEE Trans. Adv. Packag. 2001, 24, 132–142. [Google Scholar] [CrossRef]
  3. Wu, T.-L.; Chuang, H.-H.; Wang, T.-K. Overview of power integrity solutions on package and PCB: Decoupling and EBG isolation. IEEE Trans. Electromagn. Compat. 2010, 52, 346–356. [Google Scholar] [CrossRef]
  4. Li, E.-P.; Wei, X.; Cangellaris, A.C.; Liu, E.-X.; Zhang, Y.; D’Amore, M.; Kim, J.; Sudo, T. Progress Review of Electromagnetic Compatibility Analysis Technologies for Packages, Printed Circuit Boards, and Novel Interconnects. IEEE Trans. Electromagn. Compat. 2010, 52, 248–265. [Google Scholar]
  5. Swaminathan, M.; Chung, D.; Grivet-Talocia, S.; Bharath, K.; Laddha, V.; Xie, J. Designing and Modeling for Power Integrity. IEEE Trans. Electromagn. Compat. 2010, 52, 288–310. [Google Scholar] [CrossRef] [Green Version]
  6. Chen, J.Y.; Jone, W.B.; Wang, J.S.; Lu, H.; Chen, T.F. Segmented bus design for low-power systems. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 1999, 7, 25–29. [Google Scholar] [CrossRef]
  7. Fan, J.; Drewniak, J.; Shi, H.; Knighten, J. DC power-bus modeling and design with a mixed-potential integral-equation formulation and circuit extraction. IEEE Trans. Electromagn. Compat. 2001, 43, 426–436. [Google Scholar] [CrossRef]
  8. Cui, W.; Fan, J.; Ren, Y.; Shi, H.; Drewniak, J.; Dubroff, R. DC power-bus noise isolation with power-plane segmentation. IEEE Trans. Electromagn. Compat. 2003, 45, 436–443. [Google Scholar] [CrossRef]
  9. Wang, Z.; Wada, O.; Toyota, Y.; Koga, R. Modeling of gapped power bus structures for isolation using cavity modes and segmentation. IEEE Trans. Electromagn. Compat. 2005, 47, 210–218. [Google Scholar] [CrossRef]
  10. Hampe, M.; Dickmann, S. Improving the behavior of PCB power-bus structures by an appropriate segmentation. In Proceedings of the 2005 International Symposium on Electromagnetic Compatibility (EMC 2005), Chicago, IL, USA, 8–12 August 2005; Volume 3, pp. 961–966. [Google Scholar]
  11. Feng, G.; Fan, J. Analysis of Simultaneous Switching Noise Coupling in Multilayer Power/Ground Planes With Segmentation Method and Cavity Model. IEEE Trans. Electromagn. Compat. 2010, 52, 699–711. [Google Scholar] [CrossRef]
  12. Feng, G.; Fan, J. An Extended Cavity Method to Analyze Slot Coupling Between Printed Circuit Board Cavities. IEEE Trans. Electromagn. Compat. 2010, 53, 140–149. [Google Scholar] [CrossRef]
  13. Preibisch, J.B.; Duan, X.; Schuster, C. An Efficient Analysis of Power/Ground Planes with Inhomogeneous Substrates Using the Contour Integral Method. IEEE Trans. Electromagn. Compat. 2013, 56, 980–989. [Google Scholar] [CrossRef]
  14. Shi, L.-F.; Sun, Z.-M.; Liu, G.-X.; Chen, S. Hybrid-Embedded EBG Structure for Ultrawideband Suppression of SSN. IEEE Trans. Electromagn. Compat. 2017, 60, 747–753. [Google Scholar] [CrossRef]
  15. De Paulis, F.; Nisanci, M.H.; Orlandi, A. Practical EBG application to multilayer PCB: Impact on power integrity. IEEE Electromagn. Compat. Mag. 2012, 1, 60–65. [Google Scholar] [CrossRef]
  16. Zhu, H.-R.; Sun, Y.-F.; Huang, Z.; Wu, X.-L. A Compact EBG Structure with Etching Spiral Slots for Ultrawideband Simultaneous Switching Noise Mitigation in Mixed Signal Systems. IEEE Trans. Compon. Packag. Manuf. Technol. 2019, 9, 1559–1567. [Google Scholar] [CrossRef]
  17. Shi, L.-F.; Zhang, G.; Jin, M.-M.; Chen, S.; Hu, X.-J. Novel Subregional Embedded Electromagnetic Bandgap Structure for SSN Suppression. IEEE Trans. Compon. Packag. Manuf. Technol. 2016, 6, 613–621. [Google Scholar] [CrossRef]
  18. Wu, T.-L.; Fan, J.; De Paulis, F.; Wang, C.-D.; Scogna, A.C.; Orlandi, A. Mitigation of noise coupling in multilayer high-speed PCB: State of the art modeling methodology and EBG technology. IEICE Trans. Commun. 2010, E93-B, 1678–1689. [Google Scholar] [CrossRef] [Green Version]
  19. Kim, M.; Koo, K.; Kim, J. Noise isolation modeling of partial EBG power bus using segmentation method and cavity model in multi-layer PCBs. In Proceedings of the 2011 IEEE International Symposium on Electromagnetic Compatibility, Long Beach, CA, USA, 14–19 August 2011; pp. 710–714. [Google Scholar]
  20. Wang, T.-H.; Chiang, J.-W.; Lin, D.-B. Combine partial EBG structure and Z-shape power bus for noise isolation in multi-layer PCBs. In Proceedings of the 2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC), Taipei, Taiwan, 26–29 May 2015; pp. 106–108. [Google Scholar]
  21. Kim, M.; Kam, D.G. Wideband and Compact EBG Structure With Balanced Slots. IEEE Trans. Compon. Packag. Manuf. Technol. 2015, 5, 818–827. [Google Scholar] [CrossRef]
  22. Wang, T.-H.; Zheng, L.-Z.; Lin, D.-B.; Hsieh, M.-H. On the simultaneous switching noise suppression by the integration of Z-shape power bus and bandstop filter. In Proceedings of the 2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), Singapore, 14–18 May 2018; pp. 973–976. [Google Scholar]
  23. Lin, D.-B.; Wang, T.-H.; Chiang, J.-W. Suppression of Wideband Simultaneous Switching Noise Through Application of a Partial Electromagnetic Band-Gap Structure in Multilayer Printed Circuit Boards. IEEE Trans. Electromagn. Compat. 2020, 62, 1247–1255. [Google Scholar] [CrossRef]
  24. Zhang, M.-S.; Tan, H.Z. IR-drop modeling and reduction for high-performance printed circuit boards. IEEE Electromagn. Compat. Mag. 2015, 4, 90–101. [Google Scholar] [CrossRef]
  25. Kim, J.; Wu, S.; Wang, H.; Takita, Y.; Takeuchi, H.; Araki, K.; Feng, G.; Fan, J. Improved target impedance and IC transient current measurement for power distribution network design. In Proceedings of the 2010 IEEE International Symposium on Electromagnetic Compatibility, Fort Lauderdale, FL, USA, 25–30 July 2010; pp. 445–450. [Google Scholar]
  26. Zhang, N.M.-S.; Tan, N.H.-Z.; Mao, N.J.-F. New Power Distribution Network Design Method for Digital Systems Using Time-Domain Transient Impedance. IEEE Trans. Compon. Packag. Manuf. Technol. 2013, 3, 1399–1408. [Google Scholar] [CrossRef]
  27. Kim, J.; Takita, Y.; Araki, K.; Fan, J. Improved Target Impedance for Power Distribution Network Design With Power Traces Based on Rigorous Transient Analysis in a Handheld Device. IEEE Trans. Compon. Packag. Manuf. Technol. 2013, 3, 1554–1563. [Google Scholar]
  28. Kim, Y.; Kim, K.; Cho, J.; Kim, J.; Kang, K.; Yang, T.; Ra, Y.; Paik, W. Power distribution network design and optimization based on frequency dependent target impedance. In Proceedings of the 2015 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Seoul, Korea, 14–16 December 2015; pp. 89–92. [Google Scholar]
  29. Smith, L.; Anderson, R.; Forehand, D.; Pelc, T.; Roy, T. Power distribution system design methodology and capacitor selection for modern CMOS technology. Advanced Packaging. IEEE Trans. Adv. Packag. 1999, 22, 284–291. [Google Scholar] [CrossRef] [Green Version]
  30. Kim, H.; Sun, B.K.; Kim, J. Suppression of GHz range power/ground inductive impedance and simultaneous switching noise using embedded film capacitors in multilayer packages and PCBs. IEEE Microw. Wirel. Compon. Lett. 2004, 14, 71–73. [Google Scholar]
  31. Engin, A.E. Efficient Sensitivity Calculations for Optimization of Power Delivery Network Impedance. IEEE Trans. Electromagn. Compat. 2010, 52, 332–339. [Google Scholar] [CrossRef] [Green Version]
  32. Luo, G.-X.; Cui, X.; Wei, X.-C.; Li, E.-P. Distributed decoupling analysis on PG planes for PDN design. In Proceedings of the International Symposium on Electromagnetic Compatibility-EMC EUROPE, Rome, Italy, 17–21 September 2012; pp. 1–5. [Google Scholar]
  33. Chen, J.; Hashimoto, M. A Frequency-Dependent Target Impedance Method Fulfilling Voltage Drop Constraints in Multiple Frequency Ranges. IEEE Trans. Compon. Packag. Manuf. Technol. 2020, 10, 1769–1781. [Google Scholar] [CrossRef]
  34. Kim, B.; Kim, D.-W. Improvement of Simultaneous Switching Noise Suppression of Power Plane using Localized Spiral-Shaped EBG Structure and λ/4 Open Stubs. In Proceedings of the 2007 Asia-Pacific Microwave Conference, Bangkok, Thailand, 11–14 December 2007; pp. 1–4. [Google Scholar]
  35. Zhu, H.-R.; Mao, J.-F. Localized Planar EBG Structure of CSRR for Ultrawideband SSN Mitigation and Signal Integrity Improvement in Mixed-Signal Systems. IEEE Trans. Compon. Packag. Manuf. Technol. 2013, 3, 2092–2100. [Google Scholar] [CrossRef]
  36. Engin, A.E.; Ndip, I.; Lang, K.-D.; Aguirre, G. Power Plane Filter Using Higher Order Virtual Ground Fence. IEEE Trans. Compon. Packag. Manuf. Technol. 2017, 7, 519–525. [Google Scholar] [CrossRef]
  37. Ludwig, R. RF Circuit Design Theory and Applications; Prentice-Hall: Englewood Cliffs, NJ, USA, 2000. [Google Scholar]
  38. Lei, G.-T.; Techentin, R.; Gilbert, B. High-frequency characterization of power/ground-plane structures. IEEE Trans. Microw. Theory Tech. 1999, 47, 562–569. [Google Scholar]
  39. Okoshi, T. Planar Circuits for Microwave and Lightwaves; Springer: New York, NY, USA, 1985; pp. 85–96. [Google Scholar]
  40. Ansys. Ansys SIwave. Available online: https://www.ansys.com/products/electronics/ansys-siwave (accessed on 23 November 2020).
  41. Kim, M.; Koo, K.; Hwang, C.; Shim, Y.; Kim, J.; Kim, J. A Compact and Wideband Electromagnetic Bandgap Structure Using a Defected Ground Structure for Power/Ground Noise Suppression in Multilayer Packages and PCBs. IEEE Trans. Electromagn. Compat. 2012, 54, 689–695. [Google Scholar]
Figure 1. (a) Power distribution network (PDN) segmented by the electromagnetic bandgap (EBG) structure with a defected ground structure (DGS) and various configurations of the DGS–EBG array; (b) comparison of impedance parameters of the PDNs with and without DGS–EBG array segmentation.
Figure 1. (a) Power distribution network (PDN) segmented by the electromagnetic bandgap (EBG) structure with a defected ground structure (DGS) and various configurations of the DGS–EBG array; (b) comparison of impedance parameters of the PDNs with and without DGS–EBG array segmentation.
Electronics 09 02036 g001
Figure 2. (a) Procedure of proposed domain decomposition method for power integrity analysis of EBG-based PDN and (b) a domain diagram.
Figure 2. (a) Procedure of proposed domain decomposition method for power integrity analysis of EBG-based PDN and (b) a domain diagram.
Electronics 09 02036 g002
Figure 3. (a) Decomposition of DGS–EBG structure into microstrip lines and EBG unit cells; (b) their impedance diagram.
Figure 3. (a) Decomposition of DGS–EBG structure into microstrip lines and EBG unit cells; (b) their impedance diagram.
Electronics 09 02036 g003
Figure 4. Skin effect and current flow on the DGS–EBG unit cell.
Figure 4. Skin effect and current flow on the DGS–EBG unit cell.
Electronics 09 02036 g004
Figure 5. Decomposition of the DGS–EBG unit cell into high- and low-Zo segments.
Figure 5. Decomposition of the DGS–EBG unit cell into high- and low-Zo segments.
Electronics 09 02036 g005
Figure 6. Impedance diagram (ZUC) for DGS–EBG unit cell, high- and low-Zo segments.
Figure 6. Impedance diagram (ZUC) for DGS–EBG unit cell, high- and low-Zo segments.
Electronics 09 02036 g006
Figure 7. (a) Ports and design parameters; (b) the Z-matrix (ZHS) of the high-Zo segment.
Figure 7. (a) Ports and design parameters; (b) the Z-matrix (ZHS) of the high-Zo segment.
Electronics 09 02036 g007
Figure 8. (a) Ports and design parameters; (b) the Z-matrix (ZLS) of the low-Zo segment.
Figure 8. (a) Ports and design parameters; (b) the Z-matrix (ZLS) of the low-Zo segment.
Electronics 09 02036 g008
Figure 9. Port definitions of D- and NS-PDNs for extraction of Z-parameters.
Figure 9. Port definitions of D- and NS-PDNs for extraction of Z-parameters.
Electronics 09 02036 g009
Figure 10. (a) Domain decomposition method (DDM) interconnection diagram; (b) impedance diagram for extraction of the Z-parameter of the original PDN.
Figure 10. (a) Domain decomposition method (DDM) interconnection diagram; (b) impedance diagram for extraction of the Z-parameter of the original PDN.
Electronics 09 02036 g010
Figure 11. Self-impedances (Z11) of the DGS–EBG-based PDN for power integrity analysis.
Figure 11. Self-impedances (Z11) of the DGS–EBG-based PDN for power integrity analysis.
Electronics 09 02036 g011
Figure 12. Electric field distributions of the resonant modes of (a) 1, (b) 2, (c) 3, (d) 4, and (e) 5.
Figure 12. Electric field distributions of the resonant modes of (a) 1, (b) 2, (c) 3, (d) 4, and (e) 5.
Electronics 09 02036 g012
Figure 13. Electric field distribution of the resonant mode (3.37 GHz) that is not seen in the D-PDN.
Figure 13. Electric field distribution of the resonant mode (3.37 GHz) that is not seen in the D-PDN.
Electronics 09 02036 g013
Figure 14. Comparison of self-impedances of different size PDNs from (a) DDM and (b) electromagnetic (EM) simulation.
Figure 14. Comparison of self-impedances of different size PDNs from (a) DDM and (b) electromagnetic (EM) simulation.
Electronics 09 02036 g014
Figure 15. Self-impedances of (a) DDM and (b) EM simulation for analysis of the effect of patch size of the DGS–EBG structure on power integrity.
Figure 15. Self-impedances of (a) DDM and (b) EM simulation for analysis of the effect of patch size of the DGS–EBG structure on power integrity.
Electronics 09 02036 g015
Figure 16. DDM validation by comparing the results of DDM, EM simulation, and measurements.
Figure 16. DDM validation by comparing the results of DDM, EM simulation, and measurements.
Electronics 09 02036 g016
Figure 17. (a) DGS–EBG-based PDN with two ports and (b) Z21 results from the proposed DDM for analysis of DGS effect on noise reduction between D- and NS-PDNs.
Figure 17. (a) DGS–EBG-based PDN with two ports and (b) Z21 results from the proposed DDM for analysis of DGS effect on noise reduction between D- and NS-PDNs.
Electronics 09 02036 g017
Table 1. Design parameters and dimensions (units: mm).
Table 1. Design parameters and dimensions (units: mm).
ParametersDimensionsParametersDimensions
xd20hHS0.8
yd23hLS0.1
xns28(xp1, yp1)(5, 4)
yns36(xq1, yq1)(20, 22)
dc4(xq2, yq2)(20, 10.9)
dp3.8(xr1, yr1)(24, 12)
ddgs3.4(xr2, yr2)(24, 0.9)
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Share and Cite

MDPI and ACS Style

Kim, M. Power Integrity Analysis of Power Distribution Network Segmented Using DGS–Electromagnetic Bandgap Structure in Mixed-Signal PCBs. Electronics 2020, 9, 2036. https://doi.org/10.3390/electronics9122036

AMA Style

Kim M. Power Integrity Analysis of Power Distribution Network Segmented Using DGS–Electromagnetic Bandgap Structure in Mixed-Signal PCBs. Electronics. 2020; 9(12):2036. https://doi.org/10.3390/electronics9122036

Chicago/Turabian Style

Kim, Myunghoi. 2020. "Power Integrity Analysis of Power Distribution Network Segmented Using DGS–Electromagnetic Bandgap Structure in Mixed-Signal PCBs" Electronics 9, no. 12: 2036. https://doi.org/10.3390/electronics9122036

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop