Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems

Wang, Weike; Zhang, Xiaobing; Hao, Qiang; Zhang, Zhun; Xu, Bin; Dong, Haifeng; Xia, Tongsheng; Wang, Xiang

doi:10.3390/electronics8010052

Open AccessArticle

Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems

by

Weike Wang

^1,*,

Xiaobing Zhang

¹,

Qiang Hao

¹,

Zhun Zhang

¹,

Bin Xu

¹,

Haifeng Dong

^2,*,

Tongsheng Xia

¹ and

Xiang Wang

^1,*

¹

School of Electronic and Information Engineering, Beihang University, Beijing 100191, China

²

School of Instrumentation Science and Opto-Electronics Engineering, Beihang University, Beijing 100191, China

^*

Authors to whom correspondence should be addressed.

Electronics 2019, 8(1), 52; https://doi.org/10.3390/electronics8010052

Submission received: 10 December 2018 / Revised: 26 December 2018 / Accepted: 27 December 2018 / Published: 2 January 2019

(This article belongs to the Special Issue Safe and Secure Embedded Systems)

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Abstract

At present, the embedded systems are facing various kinds of attacks, especially for the data stored in the external memories. This paper presents a hardware-enhanced protection method to protect the data integrity and confidentiality at runtime, preventing the data from spoofing attack, splicing attack, replay attack, and some malicious analysis. For the integrity protection, the signature is calculated by the hardware implemented Lhash engine before the data sending off the chip, and the signature of the data block is recalculated and compared with the decrypted one at the load time. For the confidentiality protection, an AES encryption engine is used to generate the key stream, the plain data and the cipher data can translate through a simple XOR operation. The hardware cryptographic engines are optimized to work simultaneously with the memory access operation, which reduces the hardware overhead and the performance overhead. We implement the proposed architecture within OR1200 processor on Xilinx Virtex 5 FPGA platform. The experiment results show that the proposed hardware-enhanced protection method can preserve the integrity and confidentiality of the runtime data in the embedded systems with low power consumption and a marginal area footprint. The performance overhead is less than 2.27% according to the selected benchmarks.

Keywords: embedded system; data security; confidentiality; integrity; hardware-enhanced protection

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MDPI and ACS Style

Wang, W.; Zhang, X.; Hao, Q.; Zhang, Z.; Xu, B.; Dong, H.; Xia, T.; Wang, X. Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems. Electronics 2019, 8, 52. https://doi.org/10.3390/electronics8010052

AMA Style

Wang W, Zhang X, Hao Q, Zhang Z, Xu B, Dong H, Xia T, Wang X. Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems. Electronics. 2019; 8(1):52. https://doi.org/10.3390/electronics8010052

Chicago/Turabian Style

Wang, Weike, Xiaobing Zhang, Qiang Hao, Zhun Zhang, Bin Xu, Haifeng Dong, Tongsheng Xia, and Xiang Wang. 2019. "Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems" Electronics 8, no. 1: 52. https://doi.org/10.3390/electronics8010052

APA Style

Wang, W., Zhang, X., Hao, Q., Zhang, Z., Xu, B., Dong, H., Xia, T., & Wang, X. (2019). Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems. Electronics, 8(1), 52. https://doi.org/10.3390/electronics8010052

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Hardware-Enhanced Protection for the Runtime Data Security in Embedded Systems

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