Order Article Reprints

Acevedo J, Scheffel R, Wunderlich S, Hasler M, Pandi S, Cabrera J, Fitzek FHP, Fettweis G, Reisslein M. Hardware Acceleration for RLNC: A Case Study Based on the Xtensa Processor with the Tensilica Instruction-Set Extension. Electronics. 2018; 7(9):180. https://doi.org/10.3390/electronics7090180

Acevedo, Javier, Robert Scheffel, Simon Wunderlich, Mattis Hasler, Sreekrishna Pandi, Juan Cabrera, Frank H. P. Fitzek, Gerhard Fettweis, and Martin Reisslein. 2018. "Hardware Acceleration for RLNC: A Case Study Based on the Xtensa Processor with the Tensilica Instruction-Set Extension" Electronics 7, no. 9: 180. https://doi.org/10.3390/electronics7090180

Acevedo, J., Scheffel, R., Wunderlich, S., Hasler, M., Pandi, S., Cabrera, J., Fitzek, F. H. P., Fettweis, G., & Reisslein, M. (2018). Hardware Acceleration for RLNC: A Case Study Based on the Xtensa Processor with the Tensilica Instruction-Set Extension. Electronics, 7(9), 180. https://doi.org/10.3390/electronics7090180