# Data-Adaptive Coherent Demodulator for High Dynamics Pulse-Wave Ultrasound Applications

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Background and Motivation

#### 2.1. Pulse Wave Signals in Industrial Echo-Doppler Applications and Their Processing

#### 2.2. Coherent Demodulator and CIC Filter Basics

_{i}(t) with two sinusoids of frequency F

_{T}, affected by a 90° phase difference. In PWD applications the frequency F

_{T}typically matches the transmission carrier. Each multiplier is followed by a low-pass filter that eliminates the spectral replica generated by the multiplication. The filtered signals, I(t) and Q(t), represent the phase and quadrature components of the complex output.

^{–i}represents an i-position delay. Basically, the integrator accumulates all of the input samples, while the comb removes from the accumulation the sample delayed of K-positions. The result is the summation of the latest K-samples. The IC cell is described with the following time-discrete equation, corresponding to the Z-domain transfer function $H\left(Z\right)$:

_{N}is i/K, with I = 1,2,3, etc. The side lobes have an amplitude of −13 dB. An example of the cell filter mask is reported in Figure 3b for a cut-off normalized frequency of F

_{L}= 0.04, obtained with K = 15.

_{L}= 0.04, now obtained with D·K = 8. The transfer function is:

^{N}. In other words, if n is the number of bits used in input to the filter, all of the filter calculations and delay registers should work with a number of bits of:

_{L}, etc.) and is not suitable for a programmable CIC whose FPGA architecture should work with different parameter sets.

#### 2.3. Demodulator Desired Features

- Cut-off frequency programmable in a wide range of frequencies;
- Input dynamic range sufficient for accommodating both the strong pipe echoes and weak fluid signal;
- Low mathematical noise;
- Reasonable FPGA resource utilization;
- Up to 100 MHz working frequency.

## 3. Methods

#### 3.1. Modified-CIC FilterAarchitecture

_{1}–C

_{4}, which include both the integrator and the comb, alternated to 4 decimators. At the output of each cell, a barrel shifter is added. The “Settings Manager” block sets the K

_{0–3}and D

_{1–4}values which establish the mask filter shape; while the “Dynamics Manager” block monitors the data amplitude at every cell output and sets the barrel-shifter according to a control strategy that is detailed in the next section. The transfer function of the modified filter, referred to the input frequency, is:

_{0}= 9, K

_{1}= 5, K

_{2}= 10, K

_{3}= 3, D

_{1}= 1, D

_{2}= 1, D

_{3}= 2, D

_{4}= 1. The normalized cut-off frequency is F

_{L}= 0.04 and it can be compared with the corresponding filter mask shown in Figure 3b produced by the standard CIC with 4 cells and B·K = 8. Both filters achieve an attenuation higher than 50 dB outside the main lobes.

#### 3.2. Dynamics Management

_{i}and D

_{i}) to establish the filter mask, gain, etc. Then the training session starts. During the first 10 PRIs, the “Dynamics manager” block monitors the data amplitude at the output of the first IC cell, i.e., C

_{1}, and saves the maximum value. The “Dynamics manager” block uses the read value to tune the first barrel-shifter at the output of C

_{1}. Then, the next 10 PRIs are acquired, and now the “Dynamics manager” block observes the data out of C

_{2}, saves the maximum amplitude, and sets the second barrel-shifter. The procedure is repeated in sequence for C

_{3}and C

_{4}and, after 40 PRIs all the barrel-shifters are set for optimal performance. These first PRIs, corrupted by gain steps, are not suitable for Doppler analysis and thus are discarded, but the following are acquired and processed without even stopping the PRIs sequence between the training and acquisition sessions. In a typical set-up, a single PRI lasts about 100–1000 µs, while a complete Doppler measurement involves the acquisition and processing of several thousands of PRIs. Thus, the training session takes no more than 0.1 s of the several hundreds of second that take the whole measurement. The delay due to the filter training is negligible and not perceivable by the final user.

- 1)
- “Setting Manager” block program K
_{0}, K_{1}, K_{2}, K_{3}, and D_{1}, D_{2}, D_{3}, D_{4} - 2)
- Repeat for IC
_{i}cells I = 1 to 4:- Detect the maximum data amplitude on 10 PRIs, M=max(abs(Data))
- Calculate the bits necessary to represent data: J=ceil(log2(M))+1
- Set the shifter so that J is the most significant bit
- Discard the PRIs used for training

- 3)
- Start normal data acquisition and processing

#### 3.3. FPGA Implementation

_{i}= 64, although the cell can be set for a lower K

_{i}value. The input data bus of width BI

_{i}bits feeds a First Input First Output (FIFO) memory and an adder that constitutes the accumulator together with the following register. The delay of K-sample is obtained by generating with the suitable clock-delay the “write” and “read” commands of the FIFO memory that holds the data stream. The adder sums up the input data to the accumulator register value and subtracts the delayed samples coming from the FIFO.

_{i}bits of input data. An integration factor of K corresponds to a maximum gain of the same value K. The maximum data word-growth is 6 bits. Thus, the adder and the accumulation register work with a bit-width of:

_{i}= BI

_{i}+ 6

_{i}.

_{i}cell is designed to reduce the input-to-output bus width of 3 bits, i.e.,:

_{i}= BI

_{i}− 3

_{i}is the bus-width in output. The combination of Equations (6) and (7) produces:

_{i}= BA

_{i}− 9

_{i}(t) sampled up to 100 Ms/s at 16-bit enters the demodulator. The coherent sin/cos sources are represented at 13-bit. The 2 multipliers produce an output at 16 + 13 − 1 = 28 bits that feed the 2 identical filters composed by 4 sections for the phase and quadrature channels. The filters take in input the 2 buses at 28 bits, and, since each IC stage decreases the bus width of 3 bits, the I/Q signals are outputted at 16 bits. The number of words in FIFO (Mw), the total memory bits in FIFO (Mb), the adder, and accumulator width (BA), and the barrel-shifter positions for data-adaptive strategy (BS) are reported in Figure 8 inside the graphical blocks of each specific IC cell in the filter chain.

## 4. Experiments and Results

#### 4.1. Resources Utilization

#### 4.2. Demodulator Noise Performance

_{16}’ was the original signal itself, the second and the third signals, named ‘S

_{12}’ and ‘S

_{08}’ were obtained by reducing the dynamics of the original signal to 12 and 8 bits, respectively. This was obtained by dividing the data to 2

^{4}and 2

^{8}but maintaining the 16 bits word representation. These last two signals mimic a non-optimal tuning of the analog input gain of the front-end of the system.

^{®}(Mentor Graphics Corp. Wilsonville 97070 OR). The filter parameters were set to obtain F

_{L}= 0.01, that, for a 100 MHz sampling frequency, corresponds to a 1 MHz bandwidth. The employed parameters are detailed in Table 2.

^{®}(The Mathworks, Natick, MA, USA) as well, and used to process the test signals in double precision. These results were considered as reference and named SDRxx. The signals were compared in Matlab

^{®}by computing the Signal-to-Noise ratio with the following metric:

^{®}demodulator with the Sxx signals quantized at 16, 12, 08 bits. Thus, the quantization input noise is not included in the SNR evaluated by (9). SNR calculated by Equation (9) accounts for the mathematical noise of the demodulator and the final 16-bit quantization noise. The results, expressed in dB, are listed in Table 3. In addition, the maximum SNR achievable for the signals present in this application was further calculated in Matlab

^{®}. The output of the ideal demodulator SDRxx with in input the S

_{16}signal was normalized at full dynamics and quantized at 16 bits. The SNR due to this quantization was calculated and reported in the last column of Table 3 (Reference). Note that the typical formula 6.02∙N + 1.76 (where N is the number of bits) [9] results in SNR = 98.1 dB instead of 85.0 dB for N = 16 bits. In fact, the aforementioned formula is valid for a full-dynamics sinusoidal signal, while the actual signal used here exploits the full dynamics only for a small part of the acquired period (see Figure 1a).

_{i}column reports the position of the barrel-shifter at the end of the cell IC

_{i}. A value of m in the table means that the shifter scales the signal by 2

^{−m}.

^{−9}, i.e., the 6 positions related to the maximum filter gain (K

_{i}up to 64) plus 3 for the bus-width reduction (7). In the coeff-adaptive approach, the positions correspond to the actual filter settings, plus the 3 positions for bus-width reduction. For example, since K

_{0}= 32 (see Table 2), BS

_{1}= ceil (log2(32)) + 3 = 8. However, the settings are the same regardless of the input signal Sxx. In a data-adaptive approach the filter positions change for different rows of Table 4, i.e., they depend on the signal dynamics. BS

_{1}scales 7 positions for the strong signal S

_{16}, but 0 positions for S

_{08}, thus recovering 7 bits of dynamics. BS

_{2}scales 6 positions for S

_{08}and 7 for the other signals. BS

_{3}and BS

_{4}have the same behavior for all the signals. This means that the dynamics of S

_{08}is recovered mostly by BS

_{1}and BS

_{2}. Then BS

_{3}and BS

_{4}scale 6 positions like for the other signals. This explains how the demodulator achieves the best performance of 83.4 dB when processing S

_{08}(see Table 3).

#### 4.3. Flow Simulation

^{®}through the Field II ultrasound simulator [31,32], freely available at https://field-ii.dk. Field II, given the position of a set of scattering particles, the transducer characteristics, and the TX pulse, simulates the echo data acquired in each PRI. In this test, a piston transducer transmitted bursts of 5 cycles at 6 MHz in a 45 mm diameter pipe. The positions of the scattering particles were updated every PRI to mimic the typical parabolic profile of a Newtonian fluid flowing in a straight pipe [33]. The peak velocity was set to 1 m/s. A 16-bit AD converter was simulated by scaling the amplitude of the data generated by Field II and by applying the 16 bits fixed point representation. Two data sets were generated: The first was composed by the echoes from the particles in the flow only, while the other included the echoes from the static pipe wall as well. The power ratio between echoes from pipe wall and from flow particles was 35 dB.

#### 4.4. Example of Application

## 5. Discussion and Conclusion

## Author Contributions

## Funding

## Acknowledgments

## Conflicts of Interest

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**Figure 1.**Raw signal (

**a**) and I/Q demodulated signal (

**b**) acquired from a fluid flowing in an 8 mm diameter pipe investigated with 6 MHz bursts. The strong echoes visible at 5 µs and 16 us are the reflections of the pipe walls; the useful signal of the moving fluid is barely visible in-between the pipe echoes.

**Figure 2.**(

**a**) Integrated-comb (IC) cell of cascaded-IC (CIC) filter and (

**b**) an example of frequency mask obtained for K = 15, which corresponds to normalized cut-off frequency F

_{L}= 0.04. Horizontal dashed line represents the −6 dB level.

**Figure 3.**(

**a**) 4-cell CIC filter and (

**b**) an example of filter masks with DK = 8 for cut-off frequency F

_{L}= 0.04. Horizontal dashed line represents the −6 dB level.

**Figure 4.**Modified CIC architecture based on Combo-Integrator sections interconnected by a barrel-shifter and a decimator. A dynamics manager monitors the dynamics in output of every section and operates the barrel-shifters.

**Figure 5.**Filter mask obtained by the CIC architecture of Figure 6 with K

_{0}= 9, K

_{1}= 5, K

_{2}= 10, K

_{3}= 3, D

_{1}= 1, D

_{2}= 1, D

_{3}= 2, D

_{4}= 1. The cut-off normalized frequency is F

_{L}= 0.04. Horizontal dashed line represents the –6 dB level.

**Figure 7.**Barrel-shifter positions for the three different dynamics management strategies. The accumulator of the cell C

_{i}features BA

_{i}bits numbered from BA

_{i}−1 to 0. The output bus features BO

_{i}bits numbered from BO

_{i}−1 to 0. The shifter has 1, 6, 10 positions for non-, coeff-, data- adaptive strategies, respectively.

**Figure 8.**Architecture of the data-adaptive demodulator. IC cells report the memory words (Mw), the memory bits (Mb), the accumulator width (BA), and the barrel-shifter (BS) positions. The bus-widths in input and output of each IC cell are reported as well.

**Figure 9.**Power spectral matrices obtained for a simulated parabolic flow with 1 m/s peak velocity in a 45 mm diameter pipe. In (

**c**,

**d**) the signal from a static pipe-wall is added with a power 35 dB higher than the flow signal; in (

**a**,

**b**) the only flow signal is present. (

**a**,

**c**) are obtained with non-adaptive demodulator; (

**b**,

**d**) with data-adaptive demodulator. Horizontal axes report the Doppler shift converted to velocity. Vertical dashed lines correspond to the simulated peak velocity.

**Figure 10.**Power spectral matrices calculated by the system, including the proposed demodulator. Horizontal and vertical axes report Doppler shift and depth, respectively. Matrices processed with non-, coeff-, data- adaptive strategies are reported in columns; input signal equivalent to 16, 12, 08 bits are reported in rows.

Device | Cyclone V | ||||
---|---|---|---|---|---|

ALM | ALUT | Reg | Memory Bits | DSP | |

data-adaptive demodulator | 831 | 1271 | 871 | 17700 | 2 |

coeff-adaptive demodulator | 818 | 1056 | 869 | 17700 | 2 |

non-adaptive demodulator | 523 | 758 | 803 | 17700 | 2 |

Parameters K_{i} | Parameters D_{i} | Cut-off Frequency (Normalized) | Cut-off Frequency |
---|---|---|---|

K_{0} = 32, K_{1} = 17, K_{2} = 9, K_{3} = 14 | D_{1} = 1, D_{2} = 3, D_{3} = 1, D_{4} = 1 | F_{L} = 0.01 | 1 MHz |

SNR (dB) | Non-Adaptive | Coeff-Adaptive | Data-Adaptive | Reference |
---|---|---|---|---|

S_{16} | 24.7 | 60.2 | 83.4 | 85.0 |

S_{12} | 5.7 | 36.3 | 83.4 | 85.0 |

S_{08} | 0.0 | 14.2 | 83.4 | 85.0 |

Non-Adaptive | Coeff-Adaptive | Data-Adaptive | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|

BS_{1} | BS_{2} | BS_{3} | BS_{4} | BS_{1} | BS_{2} | BS_{3} | BS_{4} | BS_{1} | BS_{2} | BS_{3} | BS_{4} | |

S_{16} | 9 | 9 | 9 | 9 | 8 | 8 | 7 | 7 | 7 | 7 | 6 | 6 |

S_{12} | 9 | 9 | 9 | 9 | 8 | 8 | 7 | 7 | 3 | 7 | 6 | 6 |

S_{08} | 9 | 9 | 9 | 9 | 8 | 8 | 7 | 7 | 0 | 6 | 6 | 6 |

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## Share and Cite

**MDPI and ACS Style**

Ricci, S.; Meacci, V.
Data-Adaptive Coherent Demodulator for High Dynamics Pulse-Wave Ultrasound Applications. *Electronics* **2018**, *7*, 434.
https://doi.org/10.3390/electronics7120434

**AMA Style**

Ricci S, Meacci V.
Data-Adaptive Coherent Demodulator for High Dynamics Pulse-Wave Ultrasound Applications. *Electronics*. 2018; 7(12):434.
https://doi.org/10.3390/electronics7120434

**Chicago/Turabian Style**

Ricci, Stefano, and Valentino Meacci.
2018. "Data-Adaptive Coherent Demodulator for High Dynamics Pulse-Wave Ultrasound Applications" *Electronics* 7, no. 12: 434.
https://doi.org/10.3390/electronics7120434