A Bidirectional Double Uneven Power Converter Based DC–DC Converter for Solid-State Transformers
Abstract
:1. Introduction
2. Bidirectional Double Uneven Power (BiDUP) Converter
2.1. Circuit Configuration
2.2. Fundamental Operation
2.2.1. Forward Operation
- (1)
- t0: t0 is the instant when a new switching period starts by turning off the negative switch pair in the ‘main’ converter and turning on the positive switch pairs in both the ‘main’ and ‘control’ converters simultaneously. Since there was no current flowing in both the converters prior to t0, not only the negative switch pair in the ‘main’ converter is turned off under ZCS condition, but also the positive switch pairs are turned on under ZCS condition as indicated in Figure 3.
- (2)
- t0–t1: during this interval, the sum of the output voltages of both the converters (N1·Vin + N2·Vin) is larger than the terminal output voltage (Vo), so that the transformer currents in both the converters and the output current increase linearly. The rate of the output current change (dio/dt) is determined by the filter inductance (including the leakage inductances of the transformers) and the transformer turn-ratios.
- (3)
- t1: t1 is the instant when the positive switch pair in the ‘control’ converter is turned off under HS condition. Therefore, the turn-off switching loss is inevitable in the switch pair. However, since the power processed by the ‘control’ converter itself is only a small portion of the overall power, the turn-off switching loss in the ‘control’ converter is not significant. As can be seen from the figure, there is a regenerative current flowing through the antiparallel diodes of the negative switch pair in the ‘control’ converter for a short time period right after turning off the positive switch pair. This current is due to the leakage inductance of the transformer in the ‘control’ converter.
- (4)
- t1–t2: after the regenerative current vanishes, there is no current flowing in the transformer of the ‘control’ converter. The output current is now flowing directly through both the legs of the diode bridge in the ‘control’ converter, producing zero output voltage. Since the output voltage of the ‘main’ converter alone (N1·Vin) is smaller than the terminal output voltage (Vo), the output current and the current in the ‘main’ converter decease linearly during this interval and reaches zero before the next half switching period starts at t3. Again, the rate of the output current change (dio/dt) is determined by the filter inductance and the transformer turn-ratios and, in turn, the shape of the output current waveform can be manipulated by them. The detailed design method shaping the output current will be presented in the next section.
- (5)
- t2–t3: during this interval, even though the positive switch pair in the ‘main’ converter still remains turned on, there is no current flowing in both the ‘main’ and ‘control’ converters. The total output current from the converters is zero and the load current is supplied by the output filter capacitor (Co).
- (6)
- t3: t3 is the instant when a new half switching period starts by turning off the positive switch pair in the ‘main’ converter and turning on the negative switch pairs in both the converters. Since there was no current flowing in both the converters prior to t3, the ZCS is achieved. The rest of the switching period is symmetrical to the previous half switching period as explained and will not be elaborated upon here.
2.2.2. Backward Operation
- (1)
- t4: t4 is the instant when a new switching period starts by turning off the positive switch pair in the ‘main’ converter and turning on the negative switch pairs in both the ‘main’ and ‘control’ converters simultaneously. Since there was no current flowing in both the converters prior to t4, all the switch pairs change their switching-states under ZCS condition as indicated in Figure 3. Since the positive switch pair in the ‘control’ converter was already turned on prior to t4, now, all the switches in the ‘control’ converter are turned on to form a shoot-through path.
- (2)
- t4–t5: during this interval, the sum of the secondary side voltages of both the converters (N1·Vin + 0 = N1·Vin) is smaller than the terminal output voltage (Vo), so that the current in the filter inductor, assumed to be placed separately at the output, decreases linearly. Since the rate of the secondary current change (dio/dt) is, again, determined by the filter inductance and the transformer turn-ratios, it is the same as that in the forward operation.
- (3)
- t5: t5 is the instant when the positive switch pair in the ‘control’ converter is turned off under HS condition. Again, the turn-off switching loss is not significant because only a small share of power is processed by the ‘control’ converter. As can be seen from the current conduction path, the output current is now forced to start flowing in the ‘control’ converter’s transformer. If the leakage inductance of the ‘control’ converter’s transformer is large enough to prevent the rapid increase of the transformer current and to cause intolerable voltage surges, an additional snubbing or clamping circuit might be required.
- (4)
- t5–t6: now, the output current is flowing through the transformers in both the converters, so that the sum of the secondary voltages of both the converters (N1·Vin + N2·Vin) is larger than the terminal secondary voltage (Vo). Consequently, the secondary current increases linearly back to zero before the next half switching period starts at t7.
- (5)
- t6–t7: this is the non-conducting period in the DCM. Although all the switches are maintaining their switching-states, there is no current flowing in any of the converters. The load current is supplied by the input filter capacitor (Cin).
- (6)
- t7: t7 is the instant when a new half switching period starts by turning off the negative switch pair in the ‘main’ converter and turning on the positive switch pairs in both the converters. Since there was no current flowing in both the converters prior to t7, the ZCS is achieved. The rest of the switching period is symmetrical to the previous half switching period as explained and will not be elaborated upon here.
2.3. Equivalent Circuits
2.4. Main Design Parameters (N1, N2, and Lfilter)
3. Solid-State Transformer (SST) Application
4. Simulation
5. Experiments
6. Conclusions
Author Contributions
Funding
Conflicts of Interest
References
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System Specification | |
Rated Power | 10 kVA |
Input Voltage (Vin) | 3.6 kVrms |
High-voltage dc Voltage (Vhdc) | 5.7 kV |
Output Voltage (Vo) | 120 Vrms |
Low-voltage dc Voltage (Vldc) | 200 V |
Rectifier Stage | |
Input Filter Inductance (Lin) | 135 mH |
Switching Frequency | 1.2 kHz |
High-voltage dc-link Capacitance (Cin) | 500 μF |
DC-DC Converter Stage | |
Switching Frequency | 3.6 kHz |
Leakage Inductance (‘main’) | 2.2 mH |
Leakage Inductance (‘control’) | 1 μH |
Turn-ratio (‘main’) | 10.5:1 |
Turn-ratio (‘control’) | 50:1 |
Inverter Stage | |
Input Filter Inductance (Lo) | 1 mH |
Switching Frequency | 10.8 kHz |
Low-voltage dc-link Capacitance (Co) | 20 mF |
Rectifier Stage | |
P Gain for Voltage Controller (Kp_rvc) | 47.12 × 10−3 |
I Gain for Voltage Controller (Ki_rvc) | 2.61 |
P Gain for Current Controller (Kp_rcc) | 610.73 |
I Gain for Current Controller (Ki_rcc) | 45,239 |
DC-DC Converter Stage | |
P Gain for Voltage Controller (Kp_dcdc) | 1.26 |
I Gain for Voltage Controller (Ki_dcdc) | 94.75 |
Reverse Function Gain (Arev) | 3.80 × 10−3 |
Inverter Stage | |
P Gain for Current Controller (Kp_icc) | 13.57 |
I Gain for Current Controller (Ki_icc) | 2714.30 |
Power | 250 W | |
Input Voltage | 100 V | |
Output Voltage | 300 V | |
Switching Frequency | 10 kHz | |
Trans. Turn-Ratio | ‘main’ | 2.75 |
‘control’ | 0.5 | |
Leakage Inductance | ‘main’ | 2 μH |
‘control’ | 1 μH | |
Filter Inductance (primary side) | 47 μH |
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Park, K.; Lee, K.-B. A Bidirectional Double Uneven Power Converter Based DC–DC Converter for Solid-State Transformers. Electronics 2018, 7, 334. https://doi.org/10.3390/electronics7110334
Park K, Lee K-B. A Bidirectional Double Uneven Power Converter Based DC–DC Converter for Solid-State Transformers. Electronics. 2018; 7(11):334. https://doi.org/10.3390/electronics7110334
Chicago/Turabian StylePark, Kiwoo, and Kyo-Beum Lee. 2018. "A Bidirectional Double Uneven Power Converter Based DC–DC Converter for Solid-State Transformers" Electronics 7, no. 11: 334. https://doi.org/10.3390/electronics7110334
APA StylePark, K., & Lee, K. -B. (2018). A Bidirectional Double Uneven Power Converter Based DC–DC Converter for Solid-State Transformers. Electronics, 7(11), 334. https://doi.org/10.3390/electronics7110334