Air-Core PCB Toroid for Switching Converters: Design and Comparison with Other Inductor Topologies

Abstract

This study examines the design, manufacturing, and testing of planar PCB inductors (spiral and toroid), including multilayer PCB toroid configurations. These inductors are intended for environments with strong magnetic fields, such as high-energy physics experiments and medical applications, where traditional inductors with ferromagnetic cores are unsuitable. Twelve inductor samples were manufactured and tested. The focus was on maximizing inductance and evaluating performance in a high-frequency DC-DC step-down converter. Key parameters measured included inductance, resistance, thermal performance, electromagnetic interference (EMI), and frequency-dependent behavior in multilayer PCB implementations. The results showed that planar spiral inductors handled higher currents and achieved better efficiency, reaching up to 74.86%. Planar toroid inductors were more tolerant of added shielding, maintaining their inductance, while multilayer toroid designs exhibited reduced DC resistance but increased frequency dependence and sensitivity to parasitic effects. Overall, planar inductors were found to be viable for applications where ferromagnetic cores are unsuitable. Further optimization of geometry, layer configuration, and manufacturing processes could enhance their performance.

1. Introduction

In applications with high-intensity static magnetic fields, such as medical imaging (e.g., MRI machines) and high-energy physics experiments, the use of inductors with ferromagnetic cores is inherently challenging [1,2]. The magnetic field intensity can reach up to 4 T, causing saturation of the magnetic core material. This leads to a malfunction of the DC-DC converter [1,2]. To address this problem, air-core inductors are often employed due to their immunity to magnetic saturation [1,2,3,4,5]. However, this approach introduces new design challenges. Air-core inductors achieve lower inductance. As a result, they demonstrate higher switching losses and increased noise in the converter. This can lead to increased interference with nearby electronics [1,3,4].

The article presents the selected inductor options, describes their design processes, and compares their parameters. Based on manufactured samples and measurements, it evaluates which option is most suitable for the intended applications. Specifically, the study focuses on planar PCB inductors, which offer excellent manufacturing repeatability and scalability [4,6,7,8,9]. These inductors are compared across critical parameters such as inductance, DC resistance, quality factor Q, DC-DC converter efficiency, electromagnetic interference (EMI), and ease of manufacturing.

PCB air-core inductors are able to operate at very high frequencies [3,6]. They do not use a ferromagnetic core, making core losses virtually zero [8,10,11]. Moreover, the inductance of a planar PCB inductor is not very sensitive to manufacturing variations [4,12,13,14].

Three primary PCB inductor geometries are widely used: planar spiral, planar solenoid, and planar toroid [1,3]. Spiral inductors are straightforward to implement and require minimal PCB area, making them a versatile and cost-effective option [4,15]. However, spiral and solenoid inductors, while offering higher inductance density, generate significant EMI due to their uncontained magnetic fields [4,5]. In contrast, toroidal inductors constrain the magnetic flux within their core, significantly reducing external emissions and providing superior EMI performance [3,4,5,6,8,9]. Toroidal geometries implemented in PCBs are also simple to fabricate. Moreover, additional shielding layers can be easily applied to enhance EMI performance without affecting the inductance [5]. This makes toroidal air-core inductors ideal for applications where EMI must be strictly controlled, such as in multi-megahertz power converters [2,4,10].

High-frequency operation of the converter is a crucial requirement, as it compensates for the inherently low inductance values [2,3,10,16]. Depending on their size, planar inductors can reach inductances ranging from tens to hundreds of nanohenries [5,10]. This study utilizes a DC-DC converter that operates at a switching frequency of 2.2 MHz. To minimize switching losses, fast GaN transistors can be used [7,10].

Ease of manufacturing and part availability were prioritized in this study. For tested samples, no custom silicon components were used, and advanced PCB manufacturing techniques, such as extra-thick copper plating or copper-filled vias, were avoided.

2. Design of Tested Planar Inductors

2.1. PCB Spiral Inductor

There are three main planar PCB topologies: planar spiral, planar solenoid, and planar toroid [3]. In spiral topology, winding can take various shapes, such as round, square, or polygonal. By using multiple PCB layers, additional windings can be stacked on top of each other, with vias providing interconnections. More advanced geometric patterns have been proposed in other studies to enhance the current carrying performance [14], but the verification was performed at lower frequencies.

The design of the PCB spiral is relatively straightforward. This work focuses on a round spiral geometry. Due to its shape and chosen dimensions, the results can be directly compared to the PCB toroid geometry.

2.1.1. Inductance Calculation

The inductance of a planar spiral inductor has been the subject of many papers in the past [12,13,15,16,17]. For this design, we refer to [12]. This choice is due to its simplicity, as precise calculation of the inductance is not the focus of this paper.

The inductance of the spiral is calculated using the following formula:

$$L={\displaystyle \frac{N_T^2{d}_{avg}{c}_1{\mu }_0}{2}}(ln({\displaystyle \frac{c_2}{\sigma }})+c_3\sigma +c_4{\sigma }^2),$$

(1)

where L is the inductance, $N_T$ is the number of turns, $c_1$ to $c_4$ are the layout dependent coefficients (for the circular inductor $c_1=1.00$, $c_2=2.46$, $c_3=0.00$, $c_4=0.20$) [12] and $d_{avg}$, $\sigma$ are defined as follows:

$$d_{avg}={\displaystyle \frac{d_O+d_I}{2}},$$

(2)

$$\sigma ={\displaystyle \frac{d_O-d_I}{d_O+d_I}}.$$

(3)

where $d_O$ is the outer diameter of the inductor, and $d_I$ is the inner diameter of the inductor [12].

For multilayer design, it is necessary to consider mutual inductance between the windings. A calculation was proposed in [18].

$$L=L_1+L_2\pm 2K_C\sqrt{L_1·L_2},$$

(4)

where $L_1,L_2$ are inductances of the spiral winding, and $K_C$ is defined as follows:

$$K_C={\displaystyle \frac{N_T^2}{(A{h}^3+B{h}^2+Ch+D)}}·{\displaystyle \frac{1}{(1.67N_T^2-5.84N_T+65)·0.64}},$$

(5)

where h is the distance between the inductors, and $A,B,C,D$ are coefficients as follows: $A=0.184$, $B=-0.525$, $C=1.038$, and $D=1.001$.

2.1.2. DC Resistance Calculation

The DC resistance of the inductor contributes significantly to losses in the converter [3,10]. Calculation of the DC resistance is relatively straightforward. The spiral is created using a PCB trace with specified dimensions. The resistance of the conductor can be calculated manually or using tools such as Saturn PCB, which is based on IPC-2152 [19]. This calculation is based on the trace’s width, length, and thickness of the copper plating.

The resistance of the via $R_{Via}$ is then calculated, either manually or with software tools. These individual resistances are then summed to determine the total DC resistance of the inductor.

$$R_{DC}=R_{Via}+2R_{trace},$$

(6)

For a double-sided spiral inductor, the resistance of the spiral trace $R_{trace}$ can be easily calculated using the basic resistance formula:

$$R_{trace}=\rho {\displaystyle \frac{l}{A}}=\rho {\displaystyle \frac{l_{trace}}{w_{trace}·h}},$$

(7)

where $\rho$ is the resistivity of the conductor, $l_{trace}$ is the length in meters, and A is the cross-sectional area. The cross-sectional area is given by the width of the conductor ($w_{trace}$) and the thickness of the copper plating (h). The length of the spiral can be calculated according to the following formula:

$$l_{trace}=\pi N_T{\displaystyle \frac{d_O+d_I}{2}}.$$

(8)

This process was used to estimate the resistance of the inductor samples during the design phase.

2.1.3. Shielding

The easiest way to mitigate EMI is shielding [5]. Shielding of the inductor itself can be beneficial and improve the results [20,21]. For planar spiral inductors, shielding can be applied using a metal can or foil placed near the PCB. However, the spiral geometry interacts strongly with nearby shielding materials, which can affect its magnetic field and inductance. The placement of the shield must be carefully controlled to minimize these effects [5].

2.2. PCB Toroid Inductor

Similar to a planar PCB spiral, a planar PCB toroid is created using PCB traces and vias. The toroidal shape of the inductor is formed by connecting two copper layers on the PCB with vias, creating windings within the volume of the PCB core material. The geometry can be customized in various ways, such as by adjusting dimensions, the number of turns, and substrate thickness. These options are discussed in more detail later in the article.

An alternative physical construction to the traditional PCB toroid was described in [4]. In this method, two PCBs act as petals, with vertical wire interconnects between them. This design offers higher inductance within a similar footprint compared to a single PCB solution. However, the manufacturing process is more complex. This geometry can also be fabricated as MEMS directly on silicon [10].

Using a single PCB construction, multiple copper layers in parallel can be used to increase the current-handling capacity and reduce resistance. Additional layers may also be employed for shielding [5].

The design of the geometry is highly customizable. At the inner circumference, a single via with a larger diameter is used. On the outer circumference, multiple smaller vias are placed within the same turn to maintain symmetrical geometry. The shape of the copper petal connecting these vias varies depending on the inductor parameters.

A fully parametric 3D model (shown in Figure 1) was created using Fusion 360 CAD software (v. 2701.1.18). By entering the required parameters, the model generates the inductor geometry. The petal shape (Figure 2) can then be exported for use in PCB design software.

During this process, the parametric model calculates the estimated inductance and the DC resistance. This feature enables design optimization while taking physical geometry into account.

2.2.1. Inductance Calculation

Since PCB toroid inductors are less common than spiral ones, inductance calculation methods are less diverse. However, the formula provided in [4,8] matches well with measurements performed on real samples.

The formula used for the calculations is as follows:

$$L={\displaystyle \frac{N_T^{2}h{\mu }_0}{2\pi }}ln({\displaystyle \frac{1}{r_{ratio}}})+r_O{\displaystyle \frac{r_{ratio}+1}{2}}{\mu }_0[ln(8{\displaystyle \frac{1+r_{ratio}}{1-r_{ratio}}})-2],$$

(9)

where L is the inductance, $N_T$ is the number of turns, h is the thickness of the substrate, $r_O$ is the outer radius of the inductor, $r_I$ is the inner radius of the inductor, and $r_{ratio}$ is defined as

$$r_{ratio}={\displaystyle \frac{r_I}{r_O}}.$$

(10)

2.2.2. DC Resistance Calculation

The resistance of the PCB toroid inductor has two main components: the copper layers (top and bottom) and the vias. In this case, the vias contribute significantly more to the total resistance compared to the PCB spiral. The number of vias is directly proportional to the number of turns of the inductor.

The total DC resistance is calculated as the sum of the virtual length of the copper trace used for the winding and the combined resistance of the inner and outer vias.

$$R_{DC}=N_T·R_{ViaIn}+N_T{\displaystyle \frac{R_{ViaOut}}{VPT}}+R_{trace},$$

(11)

where $N_T$ is the number of turns, $R_{ViaIn}$ is the resistance of one via on the inner circumference, $R_{ViaOut}$ is the resistance of one via on the outer circumference, $VPT$ is the number of vias per single turn on the outer circumference, and $R_{Trace}$ is the resistance of the virtual winding copper trace. First, we calculate the mean trace width of a single turn:

$$w_{trace}={\displaystyle \frac{w_{in}+w_{out}}{2}},$$

(12)

where $w_{in}$ is the width of the trace on the inner circumference. This width is equal to the outer diameter of the via pad. $w_{out}$ is the width of the turn on the outer inductor circumference. This width is dependent on the outer diameter of the inductor, the number of turns, and the number of vias per turn. Based on the geometry, the width approximation can be written as follows:

$$w_{out}={\displaystyle \frac{d_O}{\sqrt{2}}}·\sqrt{1-cos({\displaystyle \frac{(VPT-1)·360}{N_T·VPT}})}+d_{ViaOut},$$

(13)

where $d_{ViaOut}$ is the diameter of the vias on the outer circumference. Then, the length of the virtual trace $l_{trace}$ can be calculated. In this simplified approach, there is a small error caused by the angle of the turn, which is not taken into account.

$$l_{trace}=2N_T·(r_O-r_I),$$

(14)

Finally, the resistance of the virtual trace $R_{trace}$ can be calculated:

$$R_{trace}=\rho {\displaystyle \frac{l_{trace}}{w_{trace}·h}}.$$

(15)

2.2.3. Shielding

Planar toroid inductors are less sensitive to shielding placement than planar spiral inductors. Shielding can be added using a metal can or foil, or directly integrated into the PCB using extra copper layers [5]. The toroid’s magnetic field is mostly confined within its core, allowing the shield to be placed closer without significant interference [5].

There are two additional methods proposed for reducing the magnetic field generated by the inductor in [9]. One of them is the addition of a single turn across the core, while the second method suggests the addition of a second, duplex winding. These methods were not tested in this work but might be worth considering for future development.

2.2.4. Design Decisions of a PCB Toroid

When designing a PCB toroidal inductor, several key parameters must be considered. These parameters influence both the performance of the inductor and its manufacturing cost. The most critical parameters are as follows:

Physical dimensions—the physical dimensions of the inductor are determined by the maximum available volume, which includes the outer diameter and the substrate thickness. As shown in Equation (9), both parameters directly influence the resulting inductance.

A thicker substrate and a larger diameter increase the inductance. However, these dimensions are limited by the constraints of the specific application or design requirements.

Number of turns, inner diameter—the selection of these parameters is entirely up to the designer and plays a critical role in determining the resulting inductance. For a given outer diameter, numerous combinations of inner diameters and the number of turns are possible.

A larger inner diameter enables the placement of more turns, assuming the trace width and via dimensions remain unchanged. To maximize inductance, optimization can be used to determine the best combination of parameters.

Turn conductor width–the width of the turn conductor is directly related to the inner diameter and the number of turns. A wider conductor reduces the DC resistance, which improves efficiency. However, increasing the conductor width reduces the number of turns that can fit within the design, leading to a decrease in inductance. It is necessary to balance the requirements.

Vias—they are a crucial component of this type of inductor. They significantly affect the overall DC resistance. In the manufactured samples, via resistance accounted for up to 45% of the total inductor resistance.

In standard PCB manufacturing, via resistance depends on the via’s diameter, the plating thickness, and the substrate thickness. A larger via diameter reduces resistance, but using smaller vias allows multiple vias to be placed in parallel on each turn, effectively decreasing the total resistance.

Lower resistance of the toroid can be achieved using copper-filled vias [5].

Number of PCB layers—the topology inherently requires at least a two-layer PCB. However, additional layers can be incorporated to improve performance. Adding two extra layers with the same pattern reduces DC resistance, thereby lowering IR losses compared to a two-layer PCB [5].

Copper layers can also serve as shielding. By placing the inductor on the two middle layers of a stack and filling the outer layers with solid copper, the inductor is effectively shielded [5].

Surface finish—the solder mask is typically used to cover PCB traces. To improve cooling performance, the solder mask can be removed, allowing the PCB to dissipate heat more efficiently [22]. However, other studies imply that removing the solder mask does not improve the thermal performance [23]. In this study, the effect will be tested.

Removing the solder mask has a drawback: it leaves live traces exposed, which may be unsuitable or undesirable for certain applications.

3. Experimental Part

3.1. Tested Inductor Samples

In this work, four types of inductors were selected. The inductors are intended for use in a low-voltage DC-DC switching converter. The target output current is in the range of 5–10 A, with an operating switching frequency of approximately 2.2 MHz. These conditions define the required inductor parameters.

Reference inductor—a reference inductor (Würth Elektronik, type 7447709001, L = 1 μH) was used as a baseline for the comparison of electromagnetic interference levels for the air-core inductors. Additional inductors were used for the normalization of the DC-DC converter efficiency across different inductances, as will be discussed later.

Off-the-shelf wire-wound solenoid—the first air-core inductor tested was a commercially available wire-wound solenoid by Coilcraft, type 2014VS-251MED. It has an inductance of 257 nH and a DC resistance of 2.15 mΩ, as specified in the datasheet. The sample is shown in Figure A1.

Wire-wound toroid with 3D-printed core—a high-frequency multi-core Litz wire is often used in high-frequency inductors [7,14,15]. It was selected for winding the toroidal inductor. The toroid was wound onto a PLA 3D-printed core. As this was a prototype, no thermal stresses on the sample were considered.

The core has an outer diameter of 30 mm and has a total of 18 turns (Figure A2). The calculated inductance is approximately 530 nH.

As a prototype, this inductor is challenging to manufacture. The core must be 3D printed and then wound manually. In production, these steps could be outsourced to a manufacturing company. This technique is also more sensitive to production variation than are PCB inductors [4]. Another option is to print the core and use metal casting to complete the construction [24]. Alternatively, the core could be 3D printed and plated with conductive materials [11].

Planar PCB spiral—for the samples, a two-layer PCB was used. The windings were placed on both sides of the PCB in corresponding directions, with a single via at the center connecting the two spirals.

The samples were manufactured using a PCB thickness of 1.6 mm, 35 µm copper plating with ENIG surface finish, and vias without infill. The designs varied in trace thickness and the number of turns. The outer diameter of all the samples was 26.1 mm, so direct comparison of space efficiency is possible.

The first spiral (Spiral 1) had a higher number of turns with a 1 mm trace width, prioritizing inductance. The second (Spiral 2) used a 2 mm trace with fewer turns, focusing on reduced resistance and higher current capacity. One of the spiral samples can be seen in Figure A3. The list of manufactured samples and their parameters can be found in

Table A1. Design parameters of manufactured planar samples I.

	Number of Turns NT (-)	Mean Trace Width wtrace (mm)	Number of Layers (-)	Winding Layer Thickness (μm)	Winding Layer Distance (mm)
Toroid 1	20	2.59	2	35 + 25 *	1.55
Toroid 2	20	2.59	4	35 + 25; 35	1.006
Toroid 3	20	2.59	2	35 + 25	1.55
Toroid 4	20	2.59	4	35 + 25; 35	1.006
Toroid 5	24	2.24	2	35 + 25	1.55
Toroid 6	24	2.24	4	35 + 25; 35	1.006
Toroid 7	39	1.89	2	35 + 25	1.55
Toroid 8	39	1.89	2	35 + 25; 35	1.55
Toroid 9	39	1.89	2	35 + 25	1.55
Toroid 10	39	1.89	2 (4) **	35 + 25; 35	1.006
Spiral 1	2 × 10	1	2	35 + 25	1.55
Spiral 2	2 × 5	2	2	35 + 25	1.55

* Copper foil + plating, ** Two outer layers used as shielding.

and

Table A2. Design parameters of manufactured planar samples II.

	Inner Diameter di (mm)	Outer Diameter do (mm)	Vias per Turn VPT (-)	Inner via Diameter (mm)	Outer via Diameter (-)
Toroid 1	9	20	3	0.7	0.2
Toroid 2	9	20	3	0.7	0.2
Toroid 3	10	20	3	0.7	0.2
Toroid 4	10	20	3	0.7	0.2
Toroid 5	11	20	3	0.7	0.2
Toroid 6	11	20	3	0.7	0.2
Toroid 7	16.1	26	2	0.7	0.4
Toroid 8	16.1	26	3	0.7	0.2
Toroid 9	16.1	26	2	0.7	0.4
Toroid 10	16.1	26	2	0.7	0.4
Spiral 1	2.1	26	1	1	-
Spiral 2	2	26	1	2	-

.

Planar toroid—ten planar toroid inductors were fabricated and tested, using the same PCB specifications as the spiral samples. The designs were split into two batches.

The first batch (Toroids 1–6) was used to validate the design concept, to measure the parameters, and to verify inductance calculations. These samples had an outer diameter of 20 mm with varying inner diameters and numbers of turns. Three samples included additional copper layers to improve current capacity.

The second batch increased the outer diameter to 26.1 mm (Figure A4), to match the standard dimension set for topology comparison. Optimization was applied to identify the ideal number of turns and inner diameter for maximum inductance. These samples tested different numbers of vias per turn (Toroids 7–8) and the effect of removing the solder mask to improve cooling performance (Toroid 9). One sample (Toroid 10) included additional copper layers for shielding (Figure 3). The list of manufactured samples and their parameters can be found in Table A1 and Table A2.

The theoretical inductance was calculated using Equations (1) and (9), respectively, and the results were compared. However, the inductance of multilayer PCB toroid geometries was not calculated theoretically, as Equation (9) does not account for the effects of additional layers.

3.2. RLC Measurement Methodology

After manufacturing, the inductance of each sample was measured three times using a Keysight E4980A LCR meter and averaged, with the standard deviation listed in the table. The quality factor was measured for each sample and then compared with the quality factor from the simulation. A four-wire measurement fixture was developed to ensure reliable and repeatable connection with the samples. Measurements were performed at a frequency of 2 MHz, as the inductors were designed to operate in this frequency range.

The inductance of chosen samples was also measured with applied shielding. This shielding had two forms. First, a shielding foil. The shielding foil was tested at a 2 mm distance from the PCB for both the planar toroid (Toroid 7) and the spiral (Spiral 2). The second shielding option, tested for a planar toroid, was to add copper shielding layers to the PCB. This was done on the Toroid 10 sample.

The DC resistance of the samples was measured using the Hioki RM3548 resistance meter. As with the inductance measurements, the measured values were compared with the calculated and simulated values.

3.3. Frequency Response Analysis Methodology

The accurate characterization of frequency-dependent electrical parameters in PCB-based inductors is essential for the design of efficient inductors and other high-frequency components. At low frequencies, inductor behavior is primarily determined by DC resistance and self-inductance, but at higher frequencies, effects such as the skin effect and proximity effect affect the current distribution, leading to an increase in resistance and variations in inductance. Understanding these phenomena is critical for optimizing the inductor performance across a wide frequency range.

In this work, several PCB-based inductor geometries were investigated using Ansys Q3D Extractor. The inductors differ in the number of turns and overall geometry, including both spiral and toroidal configurations. The main objective of the study is to determine the resistance and inductance as functions of frequency, providing insight into how geometry and multilayer topology influence high-frequency behavior.

The PCB inductors’ 3D models were imported into Ansys Q3D, simplified, and adjusted for simulation. The surrounding environment was defined as a vacuum because it does not affect the resistance and inductance of the inductor. All conductive elements, including traces, vias, and holes, were assigned the material properties of copper, without additional settings for plating or solder mask.

This study provides a systematic analysis of frequency-dependent behavior in PCB inductors, highlighting how geometric design, layer configuration, and conductor placement affect performance. The simulation setup is detailed in

Table 1. Analysis setup.

	DC R	DC L	AC RL
Maximum Number of Passes	10	1	10
Minimum Number of Passes	1	1	5
Minimum Convergence Passes	1	1	3
Percent Error	1%	1%	0.1%
Percent Refinement Per Pass	30%	30%	30%
Accuracy Level Normal	-	Normal	-
Solver type	-	-	ACA
Mesh Method	Auto	Auto	Auto
Mesh Resolution Level	6	6	6

, while the resulting characteristics and their interpretation are presented in subsequent sections.

Unlike traditional finite element method (FEM) solvers that require a truncated simulation domain with an explicit air box, Q3D utilizes a quasi-static solver based on the method of moments (MoM) and boundary element method (BEM) for AC extractions. These integral equation-based methods intrinsically formulate the open-space boundary conditions, computing the fields in an infinite vacuum domain without the need for artificial bounding volumes [25].

Two main frequency-dependent effects affect the performance of the inductor.

The skin effect causes the AC to concentrate near the surface of the conductors as the frequency increases, with the characteristic depth of the skin.

$$\delta =\sqrt{{\displaystyle \frac{2}{\omega \mu \gamma }}},$$

(16)

The proximity effect is the redistribution of current within a trace caused by the time-varying magnetic field of nearby conductors (adjacent turns), producing additional eddy currents and often a larger frequency-dependent loss than the skin effect alone.

The PCB inductors are frequency-dependent components, and for high-frequency applications, it is important to know their frequency response.

3.4. In-Application Test Methodology

Buck (or step-down) converters are the most commonly used converter type [16]. A DC-DC buck converter with GaN transistors was designed to evaluate the various inductor geometries. It consisted of an LM5141 PWM controller IC from Texas Instruments, an LMG1205 gate driver from Texas Instruments, and a half-bridge implemented with two GAN7R0-150 transistors from Nexperia. The topology was based on the design proposed in [26]. The converter operates at a 2.2 MHz switching frequency. It provides a 3.3 V output with a current of up to 7.1 A. A 12 V input voltage was used for testing. The final converter used for testing is shown in Figure A5.

All inductors were tested in this configuration, measuring load characteristics to compare three parameters: maximum output current, peak efficiency, and average efficiency. Similar to the RLC measurements, shielded options were also included. This test is inherently challenging because the samples offered different inductance values. To take this effect into account, a set of reference inductors with ferromagnetic cores was measured. The inductance ranged from 100 nH to 3500 nH in order to characterize the behavior of the converter controller. The performance of the converter is listed in

Table 2. Measured converter parameters with a varying inductance.

Inductance	Imax (A)	ηmax (%)	ηavg (%)
100 nH	7.1	80.69	79.60
180 nH	7.1	83.43	82.28
250 nH	7.1	81.49	79.91
560 nH	7.1	83.94	82.58
1000 nH	7.1	85.29	83.36
2000 nH	7.1	86.40	83.74
2600 nH	7.1	85.79	83.17
3500 nH	7.1	85.98	82.99

. All tested reference samples were able to provide the maximum output current, and the achieved efficiency ranged between 80 and 85%.

To compensate for the inductance-dependent efficiency variation of the converter, a polynomial model was fitted to the measured reference data. This model was then used to estimate the expected efficiency of an ideal inductor for a given inductance value. The residual efficiency difference between the measured value and the predicted reference value was subsequently calculated for each tested sample. This residual represents the deviation of a particular inductor design from the expected converter performance at the same inductance.

3.5. EMI Measurement Methodology

For each type of inductor, the converter was tested in the EMC anechoic chamber. The experiment focused on comparing the electromagnetic emissions of different types of inductors. The overall performance of the converter was not evaluated.

The measurement setup followed EN 61000-6-3 standards, consisting of a linear mains power supply, the converter under test, and a resistive load. The inductors were swapped for each measurement, and both horizontal and vertical antenna polarization were used. Only the worst-case scenarios for each inductor geometry were compared, with shielding efficiency excluded from the scope. Because the EN 61000-6-3 was used, the spectrum was measured at a starting frequency of 30 MHz, which is above the switching frequency of the converter. Only the higher switching harmonics can be observed. Therefore, this test was chosen as the primary starting point for future work, and in this article, the results are just preliminary.

4. Results

4.1. RL Simulation

Figure 4 shows the simulated resistance as a function of frequency. As expected, the resistance increases with frequency due to the skin and proximity effects. At low frequencies (below approximately 10 kHz), the resistance remains nearly constant, corresponding to the DC resistance of the copper trace. Above the threshold frequency, a noticeable rise in resistance can be observed, which becomes more pronounced towards 100 MHz. A noticeable difference can be observed between the spiral and toroidal inductors. The spiral inductors exhibit a lower frequency threshold—the point where resistance begins to rise significantly—compared to the toroidal designs. Since the thickness of the PCB is the same for all inductors, this is mainly caused by the proximity effect [27].

Figure 5 presents the inductance as a function of frequency. The inductance remains nearly constant up to several dozen kHz, after which a slight decrease is observed. This behavior can be attributed to the redistribution of current within the conductor cross-section (skin effect) and the coupling between adjacent turns. However, the variation remains within a few percent across the entire frequency range, confirming that the inductor geometry maintains stable inductive behavior up to high frequencies. Inductors made from four-layer PCBs are more frequency dependent than two-layer ones. This will be discussed in the next chapter.

The results presented in Figure 6 show that the spiral coils achieve higher Q-factor values at low frequencies, indicating lower relative losses under quasi-DC conditions. However, as frequency increases, all Q-curves gradually converge—around 100 kHz, the differences between geometries become minimal.

These results demonstrate that while geometric variations influence low-frequency behavior, the designs tend to equalize at higher frequencies relevant to practical operation. This suggests that both spiral and toroidal configurations can achieve efficient performance in the MHz range, provided that conductor width and spacing are properly optimized.

For a DC-DC converter design feasibility estimation, this is satisfactory.

As expected, the results show that higher inductance is associated with higher DC resistance for PCB toroidal inductors. Adding two layers in parallel (Toroid samples 2, 4, and 6) significantly reduces the DC resistance. However, this also results in a noticeable decrease in inductance, which is undesirable. In contrast, the spiral inductor samples demonstrated higher inductance and lower DC resistance for the same PCB footprint.

4.2. Simulation Performance of Multilayer PCB Toroid

Toroid 1 is implemented on a two-layer PCB, whereas Toroid 2 utilizes a four-layer design. In the four-layer configuration, the top and first inner layers are connected in parallel, as are the bottom and second inner layers. This arrangement reduces the overall resistance by distributing the current across multiple conductive paths. However, as the frequency increases, the current tends to concentrate in the inner layers, where the loop area is smaller, resulting in a slight decrease in the effective inductance. Similar behavior is observed for the inductor pairs Toroid 3–4 and Toroid 5–6. The frequency dependence of inductance was presented in the previous section. Here, the analysis focuses on these specific inductors to enable a clearer comparison (Figure 7). The colors in the corresponding figures were adjusted to improve visual distinction.

As can be seen from the results, the four-layer inductors exhibit a much stronger dependence on frequency compared to their two-layer counterparts. Although the total conductor thickness is greater, the outer layers contribute very little to the overall current flow. At higher frequencies, the current is confined primarily to the inner layers due to the combined influence of the skin and proximity effects. This behavior effectively reduces the active cross-sectional area for current conduction, which increases the AC resistance and alters the inductive characteristics of the coil.

To evaluate the impact of the layer stack-up on the current distribution, a comparative analysis is conducted between two specific printed circuit board (PCB) toroidal coil configurations: a standard two-layer design (designated as Toroid 1) and a four-layer design (designated as Toroid 2). The geometric parameters defined in the model represent the typical cross-sectional dimensions of these coils. Both variants feature an overall board thickness of 1.5 mm. The cross-section specifies an average trace width of 2 mm across all conductive paths, with an edge-to-edge clearance of 0.4 mm between adjacent traces. This close spacing induces a pronounced proximity effect, resulting in the crowding of current density along the lateral edges of the tracks. Furthermore, the copper foil thickness is assigned to reflect typical manufacturing profiles, utilizing 60 μm for the outer layers (top and bottom) in both configurations, and 35 μm for the internal conductive layers specific to the four-layer variant (Toroid 2). In this four-layer design, the dielectric distance between the top copper layer and the adjacent inner layer is specified as 130 μm. This precise spatial definition serves as the structural foundation for the subsequent numerical simulations of the current density profiles within the coil cross-sections.

For a more detailed comparison, an additional simulation was performed to analyze the current density (J) distribution across the coil cross-section. The operating point was set to 2 MHz with a current amplitude of 1 A. Figure 8a illustrates the current density in the two-layer coil, while Figure 8b presents the corresponding distribution in the four-layer coil.

To summarize, the incorporation of inner layers introduces strongly frequency-dependent behavior in the inductor’s electromagnetic performance. As shown in Figure 7, at frequencies up to 100 kHz, the inductance remains stable while the electrical resistance is reduced, resulting in a higher quality factor (Q) than in standard two-layer designs. In contrast, at higher frequencies, this advantage is reversed. Although the inner layers still lower the resistance, this benefit is entirely offset by a decrease in inductance, leading to a significantly lower Q-factor. Therefore, the strategic integration of inner layers is highly beneficial for sub-100 kHz applications, whereas conventional two-layer coils remain superior for high-frequency regimes.

4.3. RL Measurements

To compare the results, measured values were taken as the reference for the calculated and simulated values.

Table 3. Measured inductance of manufactured samples. Subscripts: M—measured, C—calculated, S—simulated.

	LM (nH)	LC (nH)	LS (nH)	ErrorM−C (%)	ErrorM−S (%)
Toroid 1	102.97 ± 0.78	108.57	110.85	5.44	7.65
Toroid 2	79.84 ± 0.84	-	90.6	-	13.48
Toroid 3	95.93 ± 0.60	97.05	101.00	1.17	5.29
Toroid 4	72.88 ± 0.54	-	83.00	-	13.89
Toroid 5	112.31 ± 0.44	119.57	120.30	6.46	7.11
Toroid 6	87.40 ± 0.63	-	98.70	-	12.93
Toroid 7	232.57 ± 1.06	246.18	243.80	5.85	4.83
Toroid 8	235.85 ± 1.10	246.18	245.20	4.38	3.96
Toroid 9	232.00 ± 1.11	246.18	250.20	6.11	7.84
Toroid 10	108.20 ± 2.65	246.18	106.00	127.52	132.25
Spiral 1	2864.70 ± 11.85	2833.77	2750.00	−1.08	−4.00
Spiral 2	561.98 ± 3.44	587.12	561.98	4.47	−0.58

shows that the calculated inductance values generally match the measured values within a 10% tolerance. The simulated values match the measured ones within a 15% tolerance. This shows that analytical calculations can, in these cases, give results with comparable precision to simulations. The tolerance range is acceptable for DC-DC converter applications, as it is similar to that of commercially available inductors.

Resistance measurements are compared in

Table 4. Measured DC resistance of manufactured samples. Subscripts: M—measured, C—calculated, S—simulated.

	RM (mΩ)	RC (mΩ)	RS (mΩ)	ErrorM−C (%)	ErrorM−S (%)
Toroid 1	71.2 ± 0.89	66.64	55.90	−6.42	−21.49
Toroid 2	50.2 ± 0.19	53.68	40.10	6.93	−20.12
Toroid 3	68.2 ± 0.48	63.44	52.80	−6.98	−22.58
Toroid 4	47.6 ± 0.27	51.66	38.10	8.53	−19.96
Toroid 5	76.0 ± 0.54	75.88	62.20	−0.16	−18.16
Toroid 6	57.5 ± 0.33	61.84	45.00	7.55	−21.74
Toroid 7	130.1 ± 0.82	131.71	111.50	1.23	−14.30
Toroid 8	129.1 ± 0.64	137.40	114.50	6.43	−11.31
Toroid 9	130.4 ± 2.54	131.71	111.20	1.00	−14.72
Toroid 10	180.5 ± 3.77	186.92	136.00	3.56	−24.65
Spiral 1	263.2 ± 1.04	251.68	234.50	−4.38	−10.90
Spiral 2	61.2 ± 0.29	65.14	56.70	6.44	−7.35

. In this case, all calculated values match the measured values within a 10% tolerance.

Based on the values of inductance and AC resistance at 2 MHz, a quality factor Q was determined. The results are compared in

Table 5. Q-factors of manufactured samples.

	Qmeasured (-)	Qsimulated (-)
Toroid 1	14.24 ± 0.29	16.07
Toroid 2	9.76 ± 0.10	13.10
Toroid 3	13.87 ± 0.41	15.65
Toroid 4	9.95 ± 0.11	14.65
Toroid 5	14.35 ± 0.35	15.81
Toroid 6	9.75 ± 0.11	14.89
Toroid 7	16.10 ± 0.13	19.08
Toroid 8	16.12 ± 0.33	18.35
Toroid 9	15.37 ± 0.35	18.76
Toroid 10	5.06 ± 0.40	5.43
Spiral 1	17.98 ± 0.09	19.65
Spiral 2	11.32 ± 0.07	11.89

. As can be seen from the comparison, adding two layers in parallel (samples Toroid 2, 4, and 6) reduces the Q factor of the inductor significantly. In this case, toroidal samples 7–9 yielded a higher quality factor (around 16) compared to Spiral 2. Spiral 1 had the highest Q factor of all the planar samples.

At the target operating frequency of 2 MHz, where the coils are intended to function, most geometries exhibit similar Q-values, confirming comparable loss performance. The main exceptions are Spiral 2 and Toroid 10, which deviate slightly from the trend: Spiral 2 maintains a marginally lower Q, while Toroid 10 shows a significant reduction. The lower Q of Toroid 10 can be explained by its internal layer configuration with shielding on the top and bottom layers, as will be discussed in the following chapters.

4.4. In-Application Measurements

The set of reference inductors with a ferromagnetic core showed the best performance. It provided the full output current and achieved the highest efficiency, both peak and average. The other samples were compared with this set. The comparison is shown in

Table 6. Comparison of maximum current and converter efficiency, with residuals relative to a reference.

	Imax (A)	ηmax (%)	Δηmax (%)	ηavg (%)	Δηavg (%)
Wire-wound Solenoid	5.7	83.18	−0.04	80.23	−3.14
Wire-wound Toroid	7.1	84.41	0.56	81.05	−1.64
PCB Toroid 1	4.0	67.27	−12.50	64.88	−10.17
PCB Toroid 2	3.6	68.05	−10.91	66.02	−6.95
PCB Toroid 3	3.9	68.98	−10.55	66.71	−7.73
PCB Toroid 4	3.4	66.74	−11.96	64.76	−7.54
PCB Toroid 5	4.2	69.06	−11.01	66.67	−9.15
PCB Toroid 6	3.7	68.22	−11.02	66.23	−7.45
PCB Toroid 7	5.6	72.79	−10.08	69.36	−13.25
PCB Toroid 8	5.7	72.39	−10.53	68.65	−14.07
PCB Toroid 9	5.7	71.65	−11.21	67.81	−14.78
PCB Toroid 10	3.9	57.49	−22.45	53.99	−21.49
PCB Spiral 1	6.9	75.23	−10.36	64.83	−18.13
PCB Spiral 2	6.9	77.88	−5.83	74.86	−7.15

and in Figure 9. The wire-wound solenoid did not reach the maximum current and had lower efficiency. This was likely due to its solid copper wire construction, as opposed to multi-stranded high-frequency Litz wire. The wire-wound toroid performed well, delivering the full current with efficiency close to that of the reference inductor set:

PCB toroid inductors showed limited performance. From the first batch (Toroids 1–6), the maximum current achieved was 4.2 A, far below the 7.1 A capability. The average efficiency was approximately 67%. With the correction for the inductance value, the performance worsened by approximately 10%. Additional copper layers (Toroids 2, 4, and 6) did not improve performance, as these samples reached lower maximum currents than the two-layer designs, suggesting that parallel copper layers degraded performance.

The second batch, which incorporated optimization, performed better. These inductors delivered up to 5.7 A with an average efficiency of about 69%. However, with the correction for inductance value, the average efficiency worsened by approximately 14%.

The planar spiral inductors performed relatively well. Both samples supplied the full output current. However, Spiral 1 had low efficiency (64.8%, 18.9% below the reference), likely caused by its high DC resistance. In contrast, Spiral 2 reached an average efficiency of 74.86%, making it the best-performing planar inductor that was able to provide full output current.

The performance of sample Toroid 10 was very unsatisfactory, with an average efficiency of only 54%, compensated for by the inductance value, which represents a 21.5% drop.

4.5. EMI Measurements

The results, shown in Figure 10, indicate that the reference inductor with a ferromagnetic core exhibited the best performance. Both the wire-wound solenoid and the PCB toroid had similar results. The PCB spiral performed slightly worse, though it did not exceed the limit more than the other samples. The wire-wound toroid yielded the poorest results. However, all samples were unshielded, suggesting that better results are achievable with proper shielding. Thorough EMI characterization, including shielding strategies, will be a subject of future work.

Furthermore, the spatial distribution of the simulated magnetic field reveals a stark contrast between the toroidal Figure 11a and spiral coil Figure 11b topologies. While the toroidal configuration effectively confines the magnetic flux within its structure, the spiral coil exhibits a significantly larger and more directional stray field emission. Due to this pronounced external radiation, it can be reasonably assumed that the spiral coil design will generate higher levels of electromagnetic interference (EMI).

4.6. Inductor Performance Comparison

For reference, a set of inductors with a ferromagnetic core was tested. It delivered the best performance in terms of DC-DC converter maximum current, with an average efficiency of 82.58%, and also performed the best in EMI tests. This serves as the baseline for the other topologies.

The off-the-shelf wire-wound solenoid was the most readily available component. While it could not supply the maximum current like the reference, its average efficiency of 80.23% was still acceptable. However, its EMI performance was worse than that of the reference inductor, as expected.

The wire-wound toroid with a 3D-printed core was the most difficult to manufacture. It performed well in the converter, achieving an average efficiency of 81.05%, but its EMI results were very poor.

Both planar topologies were easy and inexpensive to manufacture once the initial design was complete. The parametric model created for these designs made modifications straightforward.

The spiral PCB inductor could supply the maximum current of the converter, but its efficiency was lower than that of the non-planar topologies, with an average of 74.86%. EMI results were worse than all other samples except the wire-wound toroid. However, it did not significantly exceed the limits.

The best-performing PCB toroid inductor did not supply the full current range of the converter, reaching only 5.7 A out of a possible 7.1 A. Its average efficiency was also lower than the other topologies, at 69.36%.

4.7. Impact of Design Parameters on Toroidal Inductor Properties

Inductors were designed in two batches, each focusing on different aspects of the design parameters. The first batch included three inductor geometries with varying inner diameters and numbers of turns, used to validate analytical calculations of inductance and DC resistance. A multilayer variant of each design was also fabricated to study multilayer effects, which will be discussed in the next section.

The second batch focused on optimizing the inner-diameter-to-turn ratio for a given size, as well as evaluating the impact of PCB vias and the effect of the solder mask on cooling performance. It was found that using two larger-diameter vias (0.4 mm) per turn on the outer circumference is practically equivalent in terms of inductance, DC resistance, and overall performance to using three smaller vias (0.2 mm) per turn.

4.8. Effect of Solder Mask Removal on Cooling Performance

There are contradictory opinions on removing the solder mask to improve cooling performance. The work [22] says it can improve heat radiation from the trace, while others do not agree [23]. Toroidal inductors, with their relatively high resistance, dissipate significant amounts of heat. To compare the impact of the solder mask, two samples with identical topologies (Toroid 7 and Toroid 9) were tested under the same conditions using a DC-DC converter setup. The current drawn from the output was 3 A. The temperature of the samples was monitored using a contact temperature sensor.

The sample without the solder mask exhibited worse thermal performance than the one with the solder mask. Each measurement was repeated three times, with the results averaged. The standard deviation was below $\pm 0.92$ °C for the sample with the solder mask and below $\pm 1.35$ °C for the sample with a solder mask. The final temperature of the sample with the solder mask was approximately 78 °C, while the sample with the solder mask removed reached up to 89 °C, as shown in Figure 12. This discrepancy can be explained by the higher emissivity of the solder mask. These results align with [23], which reports a negative impact on thermal performance when the solder mask is removed. Additionally, the color of the solder mask may also influence cooling efficiency, as suggested in [28].

4.9. Shielded Inductor Performance

During the evaluation of the measured inductance across the tested samples, Toroid 10 exhibited a distinct deviation from the general trend. This specific behavior was directly attributed to the presence of embedded additional shielding. A comprehensive comparison of these shielding effects on inductance is detailed in

Table 7. Measured effect of shielding on inductance.

	Lunshielded (nH)	Lshielded (nH)	Decrease (%)
Toroid 7	232.00	217.91	6.47
Spiral 2	561.98	255.42	120.02
Toroid 10	235.85 *	108.20	127.52

* calculated based on a geometry without shielding.

. While external shielding foil was applied to samples such as Toroid 7 and Spiral 2, Toroid 10 utilized shielding layers directly integrated into the PCB structure, as illustrated in Figure 3. Specifically, the internal conductive structure of Toroid 10 replicates the geometry of Toroid 7, but it is embedded within the inner layers of a four-layer PCB, where the two outer layers serve exclusively as electromagnetic shielding.

For Toroid 10, measurements showed poor results, with inductance reduced to less than half of the theoretical value (Table 7). The issue is related to the high operating frequency of the converter. The proximity of the shield to the winding, approximately 130 µm [29], created a high parasitic capacitance (measured 256 pF @2 MHz, 247 pF simulated), severely impacting performance [13].

With shielding applied, the planar spiral showed a significant inductance drop, while the inductance of Toroid 7 remained stable. This demonstrates that toroid shielding is less space-intensive than spiral geometry.

The experimental VNA measurements of the embedded Toroid 10 (from 1 kHz to 50 MHz) reveal a non-ideal frequency response (Figure 13). The system behaves as a lossy distributed transmission line. The constant S₂₁ magnitude at lower frequencies indicates a stable inductive reactance. However, as the frequency approaches 27 MHz, the S₂₁ magnitude gradually decreases, while the S₁₁ parameter indicates that energy is increasingly reflected back to the source. This behavior suggests that the high parasitic capacitance to the top and bottom shielding layers is not a single lumped node, but is distributed along the winding.

4.10. Manufacturability and Cost-Benefit Considerations

Besides electrical performance, the practical applicability of the evaluated inductors is also influenced by manufacturing complexity and cost. Conventional wire-wound inductors are typically manufactured using well-established processes and are widely available as off-the-shelf components. In contrast, toroidal air-core inductors made from Litz wire often require custom winding for specific inductance and current ratings. PCB-integrated inductors eliminate the need for discrete components, but may increase the PCB manufacturing cost, especially when thicker copper layers or multilayer boards are required.

A qualitative cost-benefit and manufacturability comparison of the considered solutions is summarized in

Table 8. Manufacturability and cost-benefit comparison of evaluated inductor implementations.

Inductor Type	Manufacturing/ Availability	Manufacturing Complexity	Approx. Cost (Prototype)	Cost-Benefit Assessment
PCB (2-layer)	Standard PCB fabrication, integrated in PCB	Low	∼13 €	Very good integration, no assembly, good repeatability, low cost
PCB (4-layer, thicker plating)	Multilayer PCB fabrication with thicker copper plating	Moderate	∼34 €	Ineffective, based on results. Lower DC resistance, higher cost.
PCB (copper-filled vias)	Advanced PCB process with filled vias and thick copper plating	Moderate–high	∼50 €+	Might improve overall performance, but significantly increases PCB cost
Wire-wound solenoid	Standard wound component, widely available off-the-shelf	Low	∼3 €	Cost-effective and simple solution
Wire-wound toroid	Typically custom wound using Litz wire	High	∼40 €	Excellent converter efficiency, but expensive and physically large

. The listed costs are approximate real prices based on actual prototype fabrication carried out within this work; for copper-filled vias, the cost is only an indicative quote, as prototype availability is very limited and typically involves a substantial one-time setup fee. Low-volume (prototype) production is considered, and for higher volumes, the cost-benefit ratio may change.

5. Conclusions

In this study, 12 planar PCB inductors were manufactured and tested, along with an off-the-shelf wire-wound solenoid, a wire-wound toroid with 3D-printed cores, and a reference inductor with a ferromagnetic core.

The planar spiral inductors delivered the full output current of 7.1 A, with Spiral 2 reaching an average efficiency of 74.86%, making it the best-performing planar design. The PCB toroidal inductors showed limited capability, with the first batch reaching only 4.2 A and about 67% average efficiency, which decreased by roughly 10% after correcting for the inductance value. The optimized second batch improved the maximum current to 5.7 A with an average efficiency of about 69%, but the inductance correction reduced the efficiency by approximately 14%. The wire-wound solenoid did not reach the maximum current and showed lower efficiency, while the wire-wound toroid delivered the full current with efficiency close to that of the reference inductors with a ferromagnetic core.

Toroidal inductors demonstrated better performance with added shielding, showing minimal changes in inductance. In contrast, the planar spiral inductors suffered from a significant drop in inductance due to the external shielding. The additional PCB layer shielding in the toroidal design caused a significant decrease in inductance. A certain minimum distance between the winding and shielding appears to be necessary to ensure low parasitic capacitance.

Thermal performance tests revealed better behavior of the sample inductors with the solder mask compared to those without it. The solder mask appears to facilitate heat dissipation, reducing the surface temperature by nearly 10 °C.

In conclusion, planar inductors are suitable for high-frequency converters, provided the inductor design is done carefully and the parameters are well optimized.

6. Future Development

A deeper exploration of inductor shielding and the overall converter design would be valuable for future development. The findings of this study establish a solid foundation for designing a DC-DC converter that can operate effectively in static magnetic fields. Additionally, revisiting the design of toroidal inductors with more advanced PCB manufacturing techniques—such as thicker copper plating, copper-filled vias, and a thicker core substrate—could lead to significant improvements in inductor performance. Thorough EMI performance characterization is planned.

Another very important topic for the reliable operation of PCB inductors is the effect of thermal cycling, mechanical stress, and vibration, as these factors can lead to damage of copper traces (e.g., cracking, delamination) or vias [30,31]. Thermal cycling, in particular, is very typical during DC-DC converter operation and can occur simply by powering the converter on and off repeatedly. For future work, it would be valuable to investigate these effects on a control group of inductors and measure any degradation to evaluate whether failures are likely over the lifetime of the converter in the intended operating environment.