Next Article in Journal
First Study of Bubble Error Artifacts in Field-Programmable Gate Array (FPGA)-Based Tapped Delay-Line Time-to-Digital Converters with Sum-of-Ones Decoder on Xilinx 28 nm 7-Series FPGA
Previous Article in Journal
Proof-of-Friendship Consensus Mechanism for Resilient Blockchain Technology
 
 
Article

Article Versions Notes

Electronics 2025, 14(6), 1155; https://doi.org/10.3390/electronics14061155
Action Date Notes Link
article xml file uploaded 15 March 2025 08:57 CET Original file -
article xml uploaded. 15 March 2025 08:57 CET Update https://www.mdpi.com/2079-9292/14/6/1155/xml
article pdf uploaded. 15 March 2025 08:57 CET Version of Record https://www.mdpi.com/2079-9292/14/6/1155/pdf
article html file updated 15 March 2025 09:02 CET Original file https://www.mdpi.com/2079-9292/14/6/1155/html
Back to TopTop