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Article

Enhancing Automotive Intrusion Detection Systems with Capability Hardware Enhanced RISC Instructions-Based Memory Protection

by
Chathuranga Sampath Kalutharage
1,2,*,
Saket Mohan
1,
Xiaodong Liu
2 and
Christos Chrysoulas
3
1
Secure Elements, Coventry CV1 2NT, UK
2
School of Computing, Engineering & the Build Environment, Edinburgh Napier University, Edinburgh EH10 5DT, UK
3
School of Mathematical and Computer Sciences, Heriot-Watt University, Edinburgh EH14 4AS, UK
*
Author to whom correspondence should be addressed.
Electronics 2025, 14(3), 474; https://doi.org/10.3390/electronics14030474
Submission received: 17 December 2024 / Revised: 20 January 2025 / Accepted: 21 January 2025 / Published: 24 January 2025

Abstract

The rapid integration of connected technologies in modern vehicles has introduced significant cybersecurity challenges, particularly in securing critical systems against advanced threats such as IP spoofing and rule manipulation. This study investigates the application of CHERI (Capability Hardware Enhanced RISC Instructions) to enhance the security of Intrusion Detection Systems (IDSs) in automotive networks. By leveraging CHERI’s fine-grained memory protection and capability-based access control, the IDS ensures the robust protection of rule configurations against unauthorized access and manipulation. Experimental results demonstrate a 100% detection rate for spoofed IP packets and unauthorized rule modification attempts. The CHERI-enabled IDS framework achieves latency well within the acceptable limits defined by automotive standards for real-time applications, ensuring it remains suitable for safety-critical operations. The implementation on the ARM Morello board highlights CHERI’s practical applicability and low-latency performance in real-world automotive scenarios. This research underscores the potential of hardware-enforced memory safety in mitigating complex cyber threats and provides a scalable solution for securing increasingly connected and autonomous vehicles. Future work will focus on optimizing CHERI for resource-constrained environments and expanding its applications to broader automotive security use cases.
Keywords: automotive cybersecurity; IP spoofing; memory protection automotive cybersecurity; IP spoofing; memory protection

Share and Cite

MDPI and ACS Style

Kalutharage, C.S.; Mohan, S.; Liu, X.; Chrysoulas, C. Enhancing Automotive Intrusion Detection Systems with Capability Hardware Enhanced RISC Instructions-Based Memory Protection. Electronics 2025, 14, 474. https://doi.org/10.3390/electronics14030474

AMA Style

Kalutharage CS, Mohan S, Liu X, Chrysoulas C. Enhancing Automotive Intrusion Detection Systems with Capability Hardware Enhanced RISC Instructions-Based Memory Protection. Electronics. 2025; 14(3):474. https://doi.org/10.3390/electronics14030474

Chicago/Turabian Style

Kalutharage, Chathuranga Sampath, Saket Mohan, Xiaodong Liu, and Christos Chrysoulas. 2025. "Enhancing Automotive Intrusion Detection Systems with Capability Hardware Enhanced RISC Instructions-Based Memory Protection" Electronics 14, no. 3: 474. https://doi.org/10.3390/electronics14030474

APA Style

Kalutharage, C. S., Mohan, S., Liu, X., & Chrysoulas, C. (2025). Enhancing Automotive Intrusion Detection Systems with Capability Hardware Enhanced RISC Instructions-Based Memory Protection. Electronics, 14(3), 474. https://doi.org/10.3390/electronics14030474

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