Self-Tuning Current Control via ANN for Enhanced Harmonic Mitigation in Hybrid PV–Battery Storage Systems Utilizing the 3L-HANPC Inverter

Abstract

The accelerated integration of photovoltaic (PV) systems, particularly within Hybrid PV–Battery Storage Systems (PV-BSS), establishes a compelling need for advanced control strategies that are fundamental to achieving effective Energy Saving Management. However, conventional proportional–integral (PI) controllers demonstrate limited adaptability and necessitate tedious, manual parameter tuning, frequently resulting in suboptimal dynamic performance, especially under load transients. To specifically address these constraints within the domain of high-power electronics, this paper introduces a novel Artificial Neural Network (ANN)-based current controller tailored for the 1500 VDC Three-Level Hybrid Active Neutral Point Clamped (3L-HANPC) inverter, which is a widely accepted PV-BSS topology. The optimal Multi-Layer Perceptron (MLP) architecture was identified using a multi-criteria methodology, which strategically balanced Total Harmonic Distortion (THD) performance against training efficiency. Simulation results affirm that the proposed ANN controller achieves superior harmonic mitigation and demonstrates faster dynamic responses compared to the PI counterpart. Moreover, the controller fundamentally ensures stable operation while eliminating the necessity for complex PI parameter tuning. Its dependable performance across both trained and unseen operating points strongly validates its robust adaptability. This self-tuning ANN approach thus provides a viable pathway for enhancing the reliability of future hybrid energy storage systems.

1. Introduction

The simultaneous presence of three primary forces, namely the ongoing global energy crisis, the pursuit of carbon neutrality, and the gradual phase-out of fossil fuels, has fundamentally reshaped global energy policies over the last two decades. These factors have catalyzed a significant acceleration in the demand for renewable energy sources. As reported by the International Energy Agency (IEA), the cumulative installed capacity of global solar PV systems reached 1.6 Terawatts (TW) in 2023, with solar PV currently supplying over 8% of the world’s total electricity consumption [1]. Projections indicate that the contribution of solar photovoltaics to global electricity demand is expected to triple between 2024 and 2030, thereby surpassing both wind and hydropower to establish solar PV as the predominant energy source [2].

Although the DC voltage on the solar panel side has been standardized at 1000 V in the PV inverter sector for a number of years, contemporary applications now frequently utilize 1500 VDC due to recent technological progress. This higher DC voltage level is indispensable for large-scale PV-BSS, where these high-voltage DC-Links serve as the essential interface for both PV generation and high-capacity Battery Energy Storage Systems (BSS). The shift to 1500 VDC yields multiple benefits: it reduces the required cross-sectional areas of panel-side cables and significantly minimizes distribution losses, thereby directly supporting energy saving management objectives [3,4]. Furthermore, the recent revision of the low voltage limits in the Low Voltage Directive (LVD) [5,6] to 1500 VDC has provided a regulatory push, aligning power electronic equipment with sector-specific standards and enhancing industry-wide synchronization. However, this increase in DC-Link voltage is incompatible with conventional 2-Level Voltage Source Inverters (VSI), which dominated the market until the mid-2000s. In 2-level inverters, the full DC-Link voltage is imposed directly as switching stress, compelling the use of switches with significantly higher blocking voltages. This ultimately sacrifices overall efficiency and increases cost, especially under elevated switching frequencies. Consequently, Multi-Level Inverters (MLIs) have emerged as the superior and preferred topology, providing compelling advantages such as reduced switching voltage stress, enhanced efficiency, lower THD, and improved cost-effectiveness. These attributes have driven the rapid adoption of MLIs in modern solar inverter systems [7,8,9,10,11].

VSIs constitute the most prevalent topology among multi-level inverters, and this category is primarily categorized into three fundamental configurations: neutral point clamped (NPC), flying capacitor (FC), and cascaded H-bridge (CHB) [7,9]. NPC inverters, introduced approximately four decades ago [12], utilize clamping diodes and cascaded capacitors to synthesize multi-level voltage waveforms. These inverters can be configured to produce various voltage levels depending on specific application requirements. Among them, the three-level neutral point clamped (3L-NPC) inverter is the most thoroughly investigated and extensively deployed in industrial applications [13]. FC MLIs, while derived from two-level architectures, are notable for their modularity and reduced dv/dt rates. However, their practical implementation is often constrained by the necessity of complex pre-charge circuits for capacitor management and the inherent challenges associated with capacitor voltage balancing and control algorithms [7,13]. CHB inverters are frequently adopted in industrial settings, particularly for voltage levels between 7 and 11 [13]. Although the CHB topology offers key advantages, including a modular design and reduced THD, it is burdened by drawbacks such as the requirement for multiple isolated voltage sources and an increased component count, which consequently complicates system design and operation [13,14]. Fundamentally, increasing the number of levels in MLIs reduces the output voltage step size, leading to a smoother waveform with improved THD performance. Yet, this enhancement involves a trade-off: it concurrently increases the complexity of switching state management, demanding more sophisticated control. Furthermore, the higher component count introduces additional cost implications and poses challenges to overall system reliability and energy management.

In 3L-NPC inverters, as shown in Figure 1a, the neutral current path is inherently fixed by the sign of the load current, rendering it uncontrollable. This fixed characteristic frequently leads to an imbalanced thermal loss distribution across the switching devices during varying operating scenarios, such as fluctuations in power factor and modulation index [7]. Consequently, the 3L-NPC topology faces considerable difficulty in accommodating increasing power demands and stringent efficiency mandates in modern industrial applications [15]. To address this fundamental flaw, the 3-level Active Neutral Point Clamped (3L-ANPC) topology was introduced in the early 2000s (Figure 1b). It utilizes active switches to replace the passive clamp diodes, thereby facilitating the implementation of actively controllable neutral switching scenarios [7]. This design principle effectively mitigates the thermal loss imbalance that is endemic to the 3L-NPC. As a direct outcome, 3L-ANPC topologies are capable of delivering a higher power density from the same component set. This performance improvement has stimulated extensive investigation into ANPC-based converters. Furthermore, recent research has explored full-SiC, full-GaN, and hybrid ANPC (HANPC) converters (Si + SiC), which incorporate modern wide bandgap technologies (SiC, GaN) to offer substantially higher efficiency compared to conventional full-Si ANPCs [13,16,17,18,19].

In the context of grid-connected photovoltaic inverters, as exemplified by the 3L-ANPC topology, three primary control strategies are frequently employed: P-Q control, droop control, and fixed V/F control [20]. Fixed V/F control is typically an active-reactive power regulation approach utilized in weak grid environments or during islanded operation, where the inverter directly regulates the system’s output voltage. Droop control, conversely, relies on analyzing the relationships between active power/frequency and reactive power/voltage, using droop curves to derive system reference values. However, implementing traditional droop control is often complicated by the use of fixed droop curves and sensitivity to line impedance between inverters. P-Q control, by contrast, functions by referencing a controller to maintain constant active and reactive power. While this strategy prioritizes constant output power, permissible deviations in frequency and voltage are generally accepted. During application, the α-β or d-q synchronous reference frame is commonly employed to enhance the implementation of this control methodology. For photovoltaic systems, the P-Q approach is typically modified to regulate the DC-Link voltage, thereby enabling the decoupled control of both active and reactive power via the d-axis and q-axis current reference components, respectively [20,21,22]. This study will specifically investigate the current control performance of a 3L-ANPC inverter connected to the grid, employing the P-Q control method.

Thus far, the control strategies discussed have predominantly relied on conventional linear controllers, including proportional–integral (PI), proportional–integral–derivative (PID), and proportional–resonant (PR) structures. While these classical methods are widely adopted in industrial applications, they frequently prove insufficient in delivering the requisite performance for modern PV-BSS, particularly under dynamic and nonlinear operating conditions. Their inherent limitations are magnified by complex inverter topologies, external disturbances, and time-varying environmental parameters. Furthermore, the parameter tuning of these controllers typically relies on heuristic or inefficient, iterative approaches, which are intrinsically time-consuming. Achieving optimal performance across the vast operational envelope typical of PV-BSS restricts their deployment in self-tuning energy management systems, often mandating either detailed analytical modeling or computationally intensive optimization algorithms [23]. To effectively address these fundamental challenges, alternative approaches, including robust, nonlinear, and intelligent control techniques, have been developed, offering significantly enhanced adaptability and improved performance in the face of system uncertainties [20,21].

The fundamental principle underlying robust controllers is that they are explicitly designed to sustain performance even when subjected to uncertainties, which may arise from factors such as load variations, fluctuations in network parameters, or shifts in required active and reactive power. Within this domain, the H-infinity (H∞) control method is one of the most extensively studied techniques; it frames the control task as an optimization problem aimed at minimizing the worst-case system response under uncertainty. However, a significant limitation of this technique is its inherently slow dynamic response, stemming from the need to process extensive datasets [21]. Prominent examples of nonlinear controllers include the Sliding Mode Controller (SMC), Hysteresis Controller (HC), and Partial Feedback Linearization (PFL) controllers. For SMC, the primary challenge resides in accurately determining the sliding surface and selecting the appropriate sampling frequency. In the case of PFL, the method involves a transformation toward linearity, though the associated parameter uncertainties remain a considerable drawback [24]. Meanwhile, HC is noted for its simplicity and ease of implementation due to its bandwidth-based control, yet its high sensitivity to variations in switching frequency can severely compromise its long-term performance [21].

Intelligent controllers are broadly classified into four main categories: Fuzzy Logic Control (FLC), Expert System Control (ES), Model Predictive Control (MPC), and Artificial Neural Network Control (ANN). The core advantage of these methods resides in their capacity to efficiently manage inverters characterized by nonlinear dynamics and complex mathematical models, thereby offering substantial improvements over traditional controller structures. Although FLCs, which rely on rule-driven IF–THEN structures and multi-valued logic, exhibit favorable dynamic and steady-state performance, their practical utility is often restricted by the requirement for meticulous membership function tuning and considerable domain expertise. Consequently, FLCs are frequently deployed in hybrid configurations to enhance robustness and adaptability in power electronics systems such as converters, inverters, and active power filters [21,25]. ES controllers are fundamentally built upon the accumulated knowledge of domain specialists, incorporating both a knowledge base and a database. However, the necessity of obtaining substantial expertise remains the chief limitation of ES control, resulting in its minimal adoption in prior studies [25]. MPC, in contrast, operates based on a predictive model, controlling both the dynamic and static performance by estimating the system’s behavior at the next discrete time step. While this method is highly effective for nonlinear systems, its inherent reliance on an accurate mathematical model and its demand for considerable computational resources and a high sampling frequency constitute its primary limitations [8,25,26].

In sharp contrast to the intelligent control methods previously discussed, ANN controllers feature a distinct, multilayered architecture that grants them the capacity to model any nonlinear relationship with a high degree of precision and inherent adaptability. This structure, which mimics biological neural systems, allows ANN-based controllers to interface with the system as a “black box,” thereby eliminating the requirement for explicit mathematical modeling [25,27,28]. This critical independence from system models yields a significant benefit in managing parameter drifts, particularly in the context of complex multi-level inverters. Key advantages of ANN-based control over traditional strategies encompass inherent resilience, model independence, and a wide operating envelope, positioning them as optimal solutions for self-tuning energy management applications. Among various configurations, the feedforward neural network (FFNN), commonly known as the backpropagation network, is the most prevalent in power electronics due to its simple structure and strong generalization capability [25,27]. Despite these clear benefits, a survey of the existing literature reveals a scarcity of investigations into ANN-based current control for power electronic converters. Furthermore, these limited studies exhibit several critical deficiencies: they lack validation under varying power factor conditions [22,29,30,31,32,33,34,35]; their focus is primarily on topologies other than the 3L-ANPC inverter [22,29,30,31,32,33,34,35,36]; and they typically restrict their analysis to single-phase systems [22,29,30,31,34]. Recent reinforcement-learning (RL)-based control strategies, for example, the RL method proposed for LCL-filtered BESS converters under high-resonance conditions [37], address control objectives and system dynamics that differ from those of the converter and operating scenario considered in this work. As such, these RL-based approaches should be viewed as complementary rather than directly comparable within the scope of this study. To address this multifaceted research void, this work proposes a novel control approach by replacing the conventional PI-based d–q axis current controller with an ANN-based scheme within a 3L-HANPC inverter framework, and subsequently performs an in-depth performance assessment tailored specifically for Hybrid PV-BSS applications.

Therefore, the primary contributions of this article are summarized as follows:

• Self-Tuning Current Control Solution: This study presents the design of an ANN-based current controller for a 3L-HANPC inverter. By adopting this approach, the inherent limitations associated with the design and parameterization of traditional PI controllers, including the subsequent need for time-consuming manual tuning in energy management systems, are effectively eliminated, resulting in a robust self-tuning control solution.
• Multi-Criteria Design Methodology: A multi-criteria selection methodology was employed for determining the optimal architecture of the MLP-based ANN controller. This methodology incorporates both conventional training error metrics and practical indicators, such as THD performance and training duration, ensuring the chosen network structure satisfies implementation-oriented constraints for high-efficiency PV-BSS applications.
• Enhanced Performance Validation: Simulation studies conclusively demonstrate that the THD of the 3L-HANPC inverter output current is significantly reduced (Enhanced Harmonic Mitigation) when utilizing the ANN-based current controller, compared to conventional PI methods. Notably, the proposed controller yields superior or comparable THD performance across a wide range of power factor and active/reactive loading scenarios. Furthermore, the ANN-based controller exhibits improved dynamic transition performance, ensuring faster and more stable responses under varying operating conditions.

The remainder of this paper is organized as follows: Section 2 defines the topology, modulation, and switching states of the 3L-HANPC inverter, alongside the conventional control strategies utilized in this study, and expresses the relevant equations. Section 3 introduces the proposed current controller, which is based on an ANN. Section 4 presents the relevant simulation results and comprehensive analysis. Section 5 provides the conclusions and future directions derived from this study.

2. 3L-HANPC Inverter

2.1. Topology and Switching States

The widespread adoption of 3L-ANPC photovoltaic inverters, alongside the unrelenting increase in total installed power capacities, has triggered a pressing requirement for enhanced power density at the converter stage. This need is particularly severe for large-scale PV-BSS, which fundamentally demand compact, high-efficiency power stages. To boost power densities, the common strategy involves escalating the switching frequency, which subsequently allows for a reduction in the size of passive filter components. However, conventional 3L-ANPC topologies built exclusively upon silicon (Si) switching devices experience a significant deterioration in efficiency at elevated switching frequencies due to substantial switching losses, typically restricting practical operation to approximately 20 kHz or lower [38,39]. This fundamental limitation has been effectively addressed by the advent of wide bandgap (WBG) semiconductor technologies, namely silicon carbide (SiC) and gallium nitride (GaN), which enable high-efficiency switching at much higher frequencies. Despite these performance gains, the inherent increase in cost associated with full WBG devices has guided research efforts toward hybrid converter architectures that integrate both conventional Si and modern WBG technologies. Within this promising context, 3L-HANPC inverters have emerged as an optimal balance between performance and cost, positioning them as an ideal choice for high-power PV-BSS applications [17,18,19,40,41,42,43].

In 3L-HANPC inverter topologies, conventional Si-based semiconductor switches are driven at the grid frequency, while their SiC-based counterparts are operated at carrier frequencies. This hybrid switching configuration enables the concentration of switching losses onto the SiC devices, consequently lowering overall power losses due to the superior switching efficiency and high-frequency capabilities inherent to SiC technology. Given that each phase bridge arm of the ANPC topology comprises six power switches, the literature frequently explores configurations that incorporate either two or four SiC-based MOSFETs. Among these options, the 3L-HANPC topology with two SiC MOSFETs achieves an optimal trade-off between performance and cost, rendering it particularly appealing for cost-critical applications [18,44].

In this study, a three-phase 3L-HANPC inverter topology utilizing a two-SiC structure is employed. This configuration is detailed in Figure 2. Within this specific topology, switches S1, S4, S5, and S6 are conventional Si-based IGBTs, whereas S2 and S3 are SiC-based MOSFETs. Among these, the pairs S1–S6 and S4–S5 share identical gate signals and are operated complementarily at the grid frequency. Conversely, the S2–S3 switches are driven at the carrier frequency, also in a complementary manner. The resulting switching signals are depicted in Figure 3. In an n level ANPC inverter, the output terminal voltages ($V_{xO}$, where $x=a,b,c$) produce n discrete levels, while the phase-to-phase voltages achieve (2n − 1) levels. Specifically, for a 3L-HANPC inverter, the phase-to-neutral (or terminal) voltage levels are:

$$V_{xO}\in \left\{-{\displaystyle \frac{V_{dc}}{2}},\hspace{0.33em}0,\hspace{0.33em}{\displaystyle \frac{V_{dc}}{2}}\right\},\hspace{1em}x\in \{a,\hspace{0.33em}b,\hspace{0.33em}c\}$$

(1)

Similarly, the phase-to-phase voltages are determined by the difference $V_{xO}-V_{yO}$. These voltages exhibit multiple discrete levels, specifically:

$$V_{xy}\in \left\{\pm {\displaystyle \frac{V_{dc}}{2}},\hspace{0.33em}0,\hspace{0.33em}\pm V_{dc}\right\},\hspace{1em}x,y\in \{a,\hspace{0.33em}b,\hspace{0.33em}c\} \mathrm{and} x\ne y$$

(2)

The zero-voltage level can be achieved through four unique switching configurations: two of these are derived from the lower half of the circuit, and the remaining two originate from the upper half. These distinct switching states, specifically tailored for the 3L-HANPC topology, are meticulously documented in

Table 1. Switching states of 3L-HANPC inverter.

States	S1	S2	S3	S4	S5	S6	VxO
P	1	1	0	0	0	1	+Vdc/2
OU1	0	1	0	0	1	0	0
OU2	0	1	0	1	1	0
OL1	0	0	1	0	0	1
OL2	1	0	1	0	0	1
N	0	0	1	1	1	0	−Vdc/2

. The availability of these multiple zero-voltage switching states allows for precise control over the distribution of both conduction and switching losses, which is instrumental in facilitating improved thermal management within the inverter [13].

The establishment of a virtual ground reference is a pivotal technical feature of the proposed configuration, achieved by linking the star point of the output LCL filter’s capacitive branch directly to the midpoint of the DC-link. This specific topology provides a direct circulation path for both low- and high-frequency common-mode currents (CMCs). By directing these currents away from the grid, the propagation of common-mode noise is substantially curtailed. Consequently, the requirements imposed on the common-mode output filter are lessened, which inherently supports a more compact and cost-effective design. Moreover, in transformerless photovoltaic inverter topologies, this virtual ground actively and significantly mitigates ground leakage currents, a crucial factor for improving electromagnetic compatibility (EMC) and enhancing operational safety [45,46].

2.2. Modulation and Conventional Control Strategy

The conventional HANPC control strategy examined in this study, which is detailed in Figure 4, is founded upon the principle of regulating the currents in the d-q synchronous reference frame. This methodology involves transforming the grid voltages and currents into their DC counterparts within a reference frame that rotates synchronously with the grid voltage angle. This angle is reliably generated using a phase-locked loop (PLL) technique. Specifically, Clarke and Park transformations are applied to facilitate the abc-dq conversions of the grid voltages and inverter output currents. Within this framework, the d-axis current reference ($I_{dref}$) is responsible for achieving the desired active power and DC-link voltage regulation, while the q-axis current reference ($I_{qref}$) controls the reactive power. As illustrated in Figure 4, the modulation signals delivered to the switches are constructed from the summation of three distinct control elements: the classical PI current controller (Controller-1), the capacitor imbalance controller (Controller-2), and a third-harmonic injection control (Controller-3).

The controller labeled as “1” in Figure 4 constitutes the primary current regulation element. This controller is essentially implemented using two separate PI control blocks, dedicated individually to the d-axis and q-axis current components. Each PI block processes its respective input error signals ($I_{derr}$ and $I_{qerr}$) by calculating and summing their proportional and integral terms to generate the final output. The general transfer function ($G_{PI}^{\left(dq\right)}$) for the PI controllers employed in the fundamental current control is defined by the following expression:

$$u(t)=K_{p}e(t)+K_i{\int }_0^{t}e\left(t\right)dt$$

(3)

$$U(s)=(K_p+{\displaystyle \frac{K_i}{s}})E(s)$$

(4)

$$G_{PI}^{\left(dq\right)}(s)={\displaystyle \frac{U\left(s\right)}{E\left(s\right)}}=\left[\begin{array}{cc}{K}_p+{\displaystyle \frac{K_i}{s}}& 0\\ 0& K_p+{\displaystyle \frac{K_i}{s}}\end{array}\right]$$

(5)

In the preceding equations, $e\left(t\right)$ and $u\left(t\right)$ denote the PI controller input error signal (separated for d–q axes) and the PI controller output signal (separated for d–q axes), respectively. Furthermore, the parameters $K_p$ and $K_i$ represent the proportional and integral coefficients utilized within the corresponding PI controller.

The determination of the $K_p$ and $K_i$ coefficients can be executed through several established analytical approaches, including Ziegler–Nichols tuning, transfer-function-based pole–zero placement, or various optimization algorithms [23,47]. Nonetheless, while these procedures yield technically satisfactory outcomes, they invariably introduce a significant computational burden and necessitate profound engineering expertise, often resulting in a protracted design cycle. The complexity of parameter setting escalates proportionally with the inverter’s growing architecture, frequently devolving into cumbersome and often suboptimal trial-and-error methodologies. Critically, real-world operation compels designers to frequently re-calibrate these parameters to accommodate environmental fluctuations, dynamic PV-BSS charge/discharge load profiles, and long-term component drifts over time [24,48]. This persistent reliance on human intervention for manual parameter adjustment is a major impediment to integrating conventional PI control into modern self-tuning energy management architectures. Finally, to synthesize the required inverter output voltage references $E_d$ and $E_q$, cross-coupling feedforward terms are combined with the PI controller outputs $U_d$ and $U_q$. The corresponding equations are given as:

$$E_d=U_d+V_d-\omega L_t{I}_q$$

(6)

$$E_q=U_q+V_q+\omega L_t{I}_d$$

(7)

In the equations presented above, the variables $V_d$ and $V_q$ represent the grid voltage components in the d–q reference frame, stemming from the cross-coupling feedforward terms integrated with the PI controller output. Additionally, $L_t$ designates the cumulative inductance, which comprises both the inverter-side ($L_i$) and grid-side ($L_g$) inductances. Lastly, $\omega$ specifies the grid angular frequency.

The controller designated as “2” in Figure 4 corresponds to the capacitor imbalance controller, whose primary function is to maintain the voltage balance of the DC-link capacitors ($C_1$ and $C_2$) situated at the input stage of the 3L-HANPC inverter. These capacitor voltages can gradually become unbalanced over time due to factors such as capacitor degradation, uneven pre-charging procedures, and switching-related disturbances [49,50]. If this imbalance remains uncontrolled, it can precipitate undesirable consequences, including elevated harmonic distortion in the output voltage, introduction of uneven and excessive stress on the inverter switches, and the potential for hazardous operating conditions [11,40,51,52]. To effectively mitigate these adverse effects, the capacitor voltages are continuously monitored, and their 150 Hz average values are extracted. This specific frequency (three times the fundamental frequency of 50 Hz) is chosen because the neutral point voltage of NPC-type inverters, including the 3L-HANPC, typically oscillates at this predominant harmonic [50,53]. The averaged voltage differences are subsequently fed into a PI controller. The output of this controller generates a DC offset signal, denoted as psh, which is then integrated into the modulation signals to actively restore voltage balance.

The controller labeled as “3” in Figure 4 corresponds to the third harmonic injection (THI) block. This block adds a zero-sequence third-harmonic component, characterized by a certain amplitude and occurring at three times the fundamental frequency, to the modulation signal generated by Controller-1. In conventional sinusoidal PWM (SPWM), overmodulation reduces the effective utilization of the DC bus voltage. An important refinement of the conventional Carrier-Based Pulse Width Modulation (CB-PWM) technique is the Third Harmonic Injection PWM (THIPWM), which augments the fundamental reference signal with a suitably scaled third harmonic component. This modification effectively flattens the peak of the modulation waveform, thus enabling enhanced utilization of the DC-link voltage without exceeding the linear modulation region. Specifically, recent empirical results demonstrate that THIPWM can improve DC-bus voltage usage by up to 15% in low-voltage inverter systems [4,13,54], offering a meaningful increase in the inverter’s active output range. In this study, the injected third harmonic component is chosen with an amplitude ratio of 1/6, corresponding to a zero-sequence triplen harmonic with an amplitude of 0.235 V added to the modulation signal. While the added component does not affect the output line-to-line voltage, it increases the circulating common-mode currents within the system. From a control perspective, THIPWM seamlessly integrates into the CB-PWM framework, requiring no structural modifications to the modulation process aside from signal preprocessing. This integration enables a computationally efficient and hardware-friendly implementation, which contrasts favorably with more complex techniques such as Space Vector Modulation (SVM) and Selective Harmonic Elimination (SHE). Furthermore, the addition of a zero-sequence component to the modulation signal is also employed as a method for neutral-point voltage balancing [50,54].

In the family of 3L-NPC inverters, including the 3L-HANPC topology, the modulation signals necessary for switching operations can be synthesized through three primary techniques: CB-PWM, SVM, and SHE [4,7].

In the SVM technique, a 3L-ANPC inverter yields $3^3=27$ distinct switching state combinations. These switching states are represented by 27 spatial vectors arranged in a hexagonal structure within the vector space. The reference vector, which is synthesized during modulation, lies within one of the sub-sectors that geometrically partition this hexagon and is typically constructed by combining the three nearest neighboring vectors. This approach is known as the Nearest Three Vector (NTV) method [55]. The duration allocated to each phase vector component during modulation is determined through this method, which in turn dictates the switching actions. Nevertheless, calculating the appropriate timing and identifying the corresponding sector demand requires intensive numerical computations and often relies on supplementary look-up tables. While this modulation scheme allows for the mitigation of DC-link voltage oscillations and suppression of common-mode noise by adjusting the selected vectors, it inherently suffers from increased switching losses. This is primarily due to the unique switching sequence associated with each sector in SVM. Consequently, various modified SVM strategies have been proposed to address these issues, although they further complicate an already intricate switching algorithm [50].

The SHE technique is fundamentally a pre-programmed modulation method, wherein the primary objective is to determine the inverter switching angles offline by solving a set of nonlinear equations aimed at eliminating low-order unwanted harmonics in the output current. These optimal angles are then stored in a lookup table and utilized during inverter operation. To suppress specific harmonics, transcendental equations are formulated based on Fourier series analysis, and numerical techniques such as the Newton–Raphson method are typically employed to solve these equations [13,56]. While the SHE method is highly effective in mitigating selected harmonics, its practical implementation is often limited by the computational complexity of solving the equations and the requirement for extensive storage of pre-calculated switching angles.

CB-PWM represents a widely adopted modulation strategy in multilevel inverter applications due to its algorithmic simplicity, real-time implementation capability, and compatibility with digital control platforms. In the carrier-based modulation method, a sinusoidal reference signal is compared with multiple carrier signals to generate the corresponding switching signals for the inverter [7]. For an M-level inverter, a total of (M–1) carrier signals are required to realize the modulation process [13]. In three-level inverter topologies, CB-PWM is typically realized through level-shifted multi-carrier schemes, such as Phase Disposition (PD), Phase Opposition Disposition (POD), or Alternative Phase Opposition Disposition (APOD), which modulate sinusoidal reference signals against multiple high-frequency triangular carriers to generate multi-stepped output waveforms [57]. While SVM necessitates complex space vector calculations and sector identification, and SHE relies on solving nonlinear transcendental equations for predetermined harmonic suppression, CB-PWM with THIPWM provides a continuous modulation index range, improved harmonic performance, and enhanced thermal distribution, attributes particularly beneficial in hybrid ANPC inverter architectures. The modulation scheme employed in this study is based on the PD-PWM, which is one of the CB-PWM methods. PD-PWM is widely preferred in multilevel inverters because it aligns all carriers in phase, which simplifies implementation and ensures superior harmonic performance compared to other disposition methods. In particular, the phase-aligned carriers lead to lower THD and a more uniform voltage distribution across the inverter switches, making PD-PWM especially suitable for PV and grid-tied applications [58]. In this approach, as described in the previous sections, a third harmonic component is added to the sinusoidal modulation signal in order to extend the maximum modulation region and enhance DC-bus voltage utilization. The resulting modified signal is referred to as the reference terminal voltage signal, $V_{xr}$:

$$V_{xr}=m_x^{\ast }+V_{th}^{\ast } , x\in \{a,b,c\}$$

(8)

In the above equation, $V_{th}^{\ast }$ denotes the injected third-harmonic component, and $m_x^{\ast }$ represents the modulation signal of the corresponding phase. The obtained reference terminal voltage signal is then normalized using the following equation to generate the normalized reference signal, denoted as $M_x$:

$$M_x=1+({\displaystyle \frac{2V_{xr}}{V_{dc}}})$$

(9)

Subsequently, in order to both reduce the number of carrier signals in PD-PWM from two to one and to facilitate easier implementation with microcontrollers in practical applications, the expression for the M_xx signal (final modulation) is derived as follows:

$$M_{xx}=\left\{\begin{array}{l}{M}_x, M_x<1\\ M_x-1,M_x\ge 1\end{array}\right.$$

(10)

The final modulation signal, obtained in this manner and further combined with the capacitor imbalance control signal, along with the resulting switching patterns for the Si IGBT and SiC MOSFET devices, are presented in Figure 5.

While traditional PI controllers are limited by their fixed-parameter nature, often leading to suboptimal performance and a demanding manual tuning process, which restricts autonomous operation, this study proposes an advanced current control strategy based on an ANN to overcome these limitations. The goal is to provide a self-tuning solution for enhanced harmonic mitigation and dynamic stability in hybrid energy storage applications. The design methodologies and simulation results of this proposed controller will be elaborated in the following sections, along with a comprehensive performance analysis under various operating conditions.

3. Proposed ANN-Based Control of 3L-HANPC Inverter

This study investigates the application of machine learning techniques to the current control of a 3L-HANPC inverter. In this context, an ANN-based controller is developed as a replacement for the conventional PI-based primary current controller (Controller-1) illustrated in Figure 4. The successful elimination of the PI controller directly contributes to a self-tuning control solution for modern energy management systems. The overall framework of the proposed control strategy is presented in Figure 6. Comprehensive details regarding the ANN controller design, including the selection of network architecture, training methodology, evaluation criteria for network selection, and performance assessment, are provided in the subsequent sections.

3.1. ANN Architecture

ANNs are fundamentally built upon the perceptron model, which draws inspiration from the biological neural systems of the human brain. The schematic of a multiple-input single-neuron perceptron is depicted in Figure 7, and its corresponding mathematical representation is provided in (11).

$$a=f(\mathit{W}\mathit{P}+b)$$

(11)

As illustrated, the perceptron output ($a$) is determined by three key elements: the synaptic weights ($\mathit{W}$—weights matrix), the bias term ($b$), and the activation function ($f$). The input signals ($\mathit{P}$—input matrix) are first multiplied by their associated weights, thereby reflecting the relative importance of each input. A bias component is then incorporated to adjust the activation threshold of the neuron. The resulting weighted sum is subsequently passed through an activation function, which enables the perceptron to model complex input–output relationships beyond simple linear mappings. Depending on the mathematical formulation and the intended control objective, different activation functions (e.g., step, tansig, sigmoid, rectified linear unit and so on) can be employed to achieve various functional characteristics.

Analogous to its biological counterpart, the MLP architecture extends the single-neuron perceptron by incorporating multiple neurons per layer and stacking several layers in sequence. This hierarchical structure enables the MLP to capture and approximate highly nonlinear input–output relationships, which explains its widespread adoption in various power electronics applications [27,59,60,61]. Motivated by these advantages, this study employs MLP-based ANN controllers, specifically designed to regulate both the $I_d$ and $I_q$ current components. Accordingly, two independent ANN controllers are proposed: the ANN-Id and ANN-Iq controllers, respectively. The general architecture of the proposed controllers is depicted in Figure 8. The figure illustrates the MLP architecture employed for the ANN-Id controller, consisting of two hidden layers with 6 and 9 neurons, respectively.

As illustrated, an MLP network comprises an input layer, one or more hidden layers, and an output layer, interconnected through weighted links and bias terms. The performance of the controller is directly influenced by the proper adjustment of these parameters. The number of neurons in the input and output layers is determined by the dimensionality of the controller’s input and output variables. For both ANN-Id and ANN-Iq controllers, the input layer consists of three neurons, while the output layer consists of one neuron. As shown in Figure 6 and Figure 8, ANN-Id controller inputs are defined as the current error $I_{derr}\left(k\right)$, the previous value of the current error $I_{derr}(k-1)$, and the previous value of the controller output $u_d(k-1)$. The inputs of the ANN-Iq controller are defined as the q-axis counterparts of the signals utilized in the ANN-Id controller. The outputs of the proposed ANN controllers correspond to the predicted reference voltage signals, $u_d\left(k\right)$ for the ANN-Id controller and $u_q\left(k\right)$ for the ANN-Iq controller. As illustrated in Figure 8, for the proposed ANN controller with an MLP architecture comprising two hidden layers, the output value $u_d$ can be mathematically expressed as follows:

$$u_d=f^3\left({\mathit{W}}^{\mathbf{3}}{f}^2\right({\mathit{W}}^{\mathbf{2}}{f}^1({\mathit{W}}^{\mathbf{1}}{\mathit{p}}_{\mathit{M}\mathit{L}\mathit{P}}+{\mathit{b}}_{\mathbf{1}})+{\mathit{b}}_{\mathbf{2}})+{\mathit{b}}_{\mathbf{3}})$$

(12)

In (12), ${\mathit{p}}_{\mathit{M}\mathit{L}\mathit{P}}=\left[I_{derr}\right(k),I_{derr}(k-1),u_d(k-1\left)\right]$ denotes the input vector; ${\mathit{W}}^{\mathbf{1}}$ and ${\mathit{W}}^{\mathbf{2}}$ represent the learnable weight matrixes of the first and second hidden layers, respectively; ${\mathit{W}}^{\mathbf{3}}$ corresponds to the learnable weight matrix of the output layer. Similarly, $f^1$ and $f^2$ denote the activation functions of the first and second hidden layers, while $f^3$ is the activation function of the output layer. The terms ${\mathit{b}}_{\mathbf{1}}$, ${\mathit{b}}_{\mathbf{2}}$, and ${\mathit{b}}_{\mathbf{3}}$ are the learnable bias matrixes associated with the first hidden layer, second hidden layer, and output layer, respectively.

A critical aspect in the design of MLP architectures is the determination of the number of hidden layers and the number of neurons within these layers. While no universally established analytical rule exists for this selection, several practical heuristics and empirical approaches are commonly discussed in the literature. In general, as the complexity of the problem increases, more hidden layers and neurons are required to adequately capture nonlinear relationships [60,61]. Nevertheless, it should be emphasized that increasing the number of neurons and layers not only raises the computational burden during training and implementation but also increases the risk of overfitting [62].

In the present study, for the proposed current controllers (ANN-Id and ANN-Iq), the number of input and output neurons was fixed, whereas the alternatives for the hidden layer and neuron counts were systematically evaluated. These alternatives were analyzed through comparative performance assessments and a multi-criteria decision-making methodology, which will be elaborated in subsequent sections. Considering both computational cost and practical implementation constraints, architectures with one and two hidden layers were investigated. For clarity, MLP configurations in this work are denoted only by the number of neurons in the hidden layers, expressed in square brackets. For instance, [9] refers to a single hidden layer with nine neurons, whereas [6 × 9] denotes a two-hidden-layer architecture with six and nine neurons, respectively.

In the design of the MLP-based current controllers proposed in this study, the determination of the number of neurons in the hidden layers as well as the type of activation functions was guided by Cover’s theorem on linear separability. According to this theorem, the probability of achieving linear separability in a learning problem increases when data that are not linearly separable in a lower-dimensional space are mapped into a higher-dimensional space through nonlinear activation functions [63,64,65,66]. Based on this theoretical foundation, and by also considering computational load and overfitting sensitivity, the candidate MLP architectures investigated in this work were configured such that the number of neurons in the first and, if present, the second hidden layers took values of 3, 6, 9, and 12. This systematic combination resulted in a total of 20 candidate MLP architectures, which were subjected to comparative analysis. The configurations of these candidate MLP architectures are summarized in

Table 2. Candidate MLP architectures used in the comparative analysis.

Candidate Number	Formation	Candidate Number	Formation
1	[3]	11	[3 × 12]
2	[6]	12	[6 × 3]
3	[9]	13	[6 × 9]
4	[12]	14	[6 × 12]
5	[3 × 3]	15	[9 × 3]
6	[6 × 6]	16	[9 × 6]
7	[9 × 9]	17	[9 × 12]
8	[12 × 12]	18	[12 × 3]
9	[3 × 6]	19	[12 × 6]
10	[3 × 9]	20	[12 × 6]

. In all hidden layers, the nonlinear ‘tansig (hyperbolic tangent sigmoid)’ activation function was employed, while in the output layer, the linear ‘purelin’ function was used. The mathematical expressions of these activation functions are presented in (13) and (14), respectively.

$$\mathit{tan}sig(x)=\mathit{tan}h\left(x\right)={\displaystyle \frac{2}{1+e^{-2x}}}-1$$

(13)

$$purelin\left(x\right)=x$$

(14)

In an MLP architecture, the direction of data flow between inputs and outputs is a key factor in determining whether the network is suitable for static or dynamic applications. Artificial neural networks based on MLP can generally be categorized as feedforward or feedback types [61]. In the feedforward MLP, the data flow is strictly forward, and the output at a given instant depends solely on the current fixed input. Hence, such structures are more suitable for static or instantaneous-response problems.

However, in complex power converters such as the 3L-HANPC, the input–output relationship of the current controllers is highly dynamic. In such systems, the controller must not only respond promptly to sudden variations but also exhibit a form of memory property, analogous to the behavior of capacitors or inductors in electrical circuits. To address this requirement, feedback-type MLP controllers are employed [61,66].

In this study, the proposed MLP-based ANN-Id and ANN-Iq controllers are designed to consider not only the instantaneous values of the inputs but also the previous values (k − 1) of both inputs and outputs. This delay term is represented by the $z^{-1}$ operators in Figure 8. In this way, through the training process, the proposed network learns the input–output mapping by incorporating past information, thereby functioning as a time-delayed feedback controller capable of handling dynamic system control. This design strategy ensures that the controllers can effectively capture the temporal dependencies inherent in power converter dynamics, leading to improved adaptability and robustness in real-time operation. With this structure, the proposed MLP-based ANN controller essentially constitutes a Recurrent Neural Network (RNN). The primary reason is that the output signal is fed back into the input, thereby establishing a recurrent connection.

3.2. Network Training Methodology

As emphasized in the previous sections, an artificial neural network contains trainable parameters, namely the weights ($\mathit{w}$) and biases ($\mathit{b}$), whose accurate determination is crucial for the reliable operation of MLP-based controllers. These parameters are tuned during the training phase of the network. In this study, a supervised learning approach is adopted, and the proposed MLP-based neural network is trained offline (prior to deployment). In supervised learning, the network is trained by providing sample input–output data pairs. Such training data can be obtained from simulation studies, analytical model outputs, or experimental measurements [25]. In this study, the training of the proposed artificial neural network is carried out using data obtained from simulation studies of a conventional 3L-HANPC model developed in the MATLAB/Simulink R2022b environment. The parameters of the simulation model, designed for high-voltage PV-BSS applications, are summarized in

Table 3. Main parameters of the conventional 3L-HANPC simulation model used for supervised learning.

Parameter	Value
DC Link Voltage—${\mathit{V}}_{\mathit{d}\mathit{c}}$	900 V
Grid Voltage (rms, line-to-line)	400 V
Rated Output Power	62.5 kW
Grid Frequency	50 Hz
Controller Sampling Time	31.25 µs
Simulation Model Sampling Time	1 µs
Solver Type	Fixed Step
DC-Link Capacitors (${\mathit{C}}_{\mathbf{1}}$ and ${\mathit{C}}_{\mathbf{2}}$)	0.3 mF
Inverter Side Inductance (${\mathit{L}}_{\mathit{i}}$)	160 µH
Grid Side Inductance (${\mathit{L}}_{\mathit{g}}$)	40 µH
Switching Frequency (${\mathit{f}}_{\mathrm{sw}}$)	32 kHz
Id Controller Kp	1
Id Controller Ki	1000
Iq Controller Kp	1.75
Iq Controller Ki	1000

. Table 3 indicates the DC-Link voltage used for training was 900 V. While the target application is 1500 VDC (as discussed in Section 1), the methodology is validated effectively at this high-voltage level to demonstrate the controller’s suitability for dynamic PV-BSS, where the control must maintain stability despite large power transients.

To enhance the generalization capability of the proposed ANN controller and to ensure sufficient diversity in the training dataset, simulation-based data recording was conducted across three distinct operating regions (OR): Variable Power Factor (VarPF), Variable Active Power (VarP), and Variable Reactive Power (VarQ).

(1)

VarPF: Five different power factor levels are considered, namely 0.6, 0.7, 0.8, 0.9, and 1.0.

(2)

VarP: Five active power levels corresponding to 100%, 80%, 60%, 40%, and 20% of the rated output power are employed. In this region, the inverter supplies active power to the grid.

(3)

VarQ: Five reactive power levels corresponding to 100%, 80%, 60%, 40%, and 20% of the rated output power are employed. In this region, the inverter supplies reactive power to the grid.

Accordingly, the simulated data have been collected for a total of 15 different operating points, and the details of these datasets are provided in

Table 4. Simulation dataset for ANN training across 15 operating points (VARPF, VARP, VARQ regions).

Name of OR	# of OP	Power Factor (pf)	IdRef Value (A)	IqRef Value (A)	Recording Time Range (s)
VarPF	1	1	127	0	0–0.4
	2	0.9	114	55	0.4–0.8
	3	0.8	102	76	0.8–1.2
	4	0.7	89	91	1.2–1.6
	5	0.6	76	102	1.6–2.0
VarP	6	1	127	0	0–0.4
	7	1	101.6	0	0.4–0.8
	8	1	76.2	0	0.8–1.2
	9	1	50.8	0	1.2–1.6
	10	1	25.4	0	1.6–2.0
VarQ	11	0	0	127	0–0.4
	12	0	0	101.6	0.4–0.8
	13	0	0	76.2	0.8–1.2
	14	0	0	50.8	1.2–1.6
	15	0	0	25.4	1.6–2.0

.

For each operating point (OP), the collected data correspond to the input and output signals of the proposed ANN-based controllers, as described in Figure 8. While the current error and PI controller output signals are directly obtained from the simulation model, their delayed counterparts were recorded in the same simulation environment by introducing a one-sample delay. A dataset of 20 cycles $(20 \times 20 \mathrm{m}\mathrm{s}=0.4 \mathrm{s})$ was gathered for each OP, resulting in a total of 1 s of data for each OR. The sampling interval, which corresponds to the current controller sampling time, was set to 31.25 µs, consistent with practical microcontroller-based implementations of such applications. Consequently, for each input–output signal of the ANN controller, the dataset consists of 12,800 samples per OP and 64,000 samples per OR, resulting in 192,000 samples in total used for the machine learning.

Subsequently, the acquired data were randomly divided into three subsets: 70% for training, 15% for validation, and 15% for testing. The training of the proposed network is carried out using a backpropagation-based (BP) algorithm. At the beginning of the training, the initial weights and biases are used to compute the network output for the training dataset. This output is then compared with the desired target output, and an error value is obtained. The error calculation is repeated for the entire training dataset, after which the error is propagated backward through the network. Using the selected BP algorithm, the weights and biases are iteratively updated to minimize the error.

The validation dataset is employed to evaluate the generalization capability of the network, i.e., to monitor whether the network is suffering from overfitting or underfitting. For this purpose, the updated weights and biases are evaluated against the validation data, and the corresponding validation error is used as the stopping criterion during training. In this study, the error function is defined based on the Mean Squared Error (MSE), whose mathematical expression is given in (15). Finally, the test dataset is used only for performance evaluation. Since it contains data that the network has not seen during training or validation, it provides a better measure of how well the trained model performs.

$$\mathrm{M}\mathrm{S}\mathrm{E}={\displaystyle \frac{1}{N}}{\sum }_{i=1}^N{e_i}^2={\displaystyle \frac{1}{N}}{\sum }_{i=1}^N(y_i^{\ast }-y_{i,MLP}{)}^2$$

(15)

In the above equation, $y_i^{\ast }$ denotes the desired output, $y_{i,MLP}$ represents the neural network output, $e_i$ indicates the error, and $N$ is the number of samples. The offline training of the proposed ANN-based controllers was performed on a computer equipped with an Intel Core i7-11700 K processor (8 cores, 3.6 GHz clock frequency) and 32 GB of RAM. The system also supports parallel processing in MATLAB R2022b environment, which was utilized to accelerate the training procedure.

For reducing the MSE during the training of the proposed neural network, the Levenberg–Marquardt (LM) backpropagation algorithm is employed. The LM algorithm is widely utilized in the literature due to its fast convergence characteristics in various optimization problems. Fundamentally, LM is an optimization method based on the Newton approach, making it particularly well-suited for training artificial neural networks where the performance index is defined as the MSE [60,66]. According to this algorithm, the updates of weights and biases are performed based on the following expression:

$${\mathit{\theta }}_{\mathit{k}\mathbf{+}\mathbf{1}}={\mathit{\theta }}_{\mathit{k}}-{{\mathit{A}}_{\mathit{k}}}^{-\mathbf{1}}{\mathit{g}}_{\mathit{k}}$$

(16)

In this equation, ${\mathit{\theta }}_{\mathit{k}}$ represents the current weights and biases, while ${\mathit{\theta }}_{\mathit{k}\mathbf{+}\mathbf{1}}$ denotes the updated weights and biases at the next iteration. ${\mathit{A}}_{\mathit{k}}$ and ${\mathit{g}}_{\mathit{k}}$ correspond to the Hessian matrix and the gradient, respectively. They can be written as:

$${\mathit{A}}_{\mathit{k}}={\mathsf{\nabla }}^{\mathbf{2}}\mathit{E}\left(\mathit{\theta }\right)\left|\mathit{\theta }={\mathit{\theta }}_{\mathit{k}}\right.$$

(17)

$${\mathit{g}}_{\mathit{k}}=\mathsf{\nabla }\mathit{E}\left(\mathit{\theta }\right)\left|\mathit{\theta }={\mathit{\theta }}_{\mathit{k}}\right.$$

(18)

Here, $\mathit{E}\left(\mathit{\theta }\right)$ denotes the error function as a performance index with respect to the parameter vector $\mathit{\theta }$, as previously defined, is expressed in terms of the MSE. Accordingly, the gradient and the Hessian matrix can be computed as follows:

$$[\mathsf{\nabla }\mathit{E}(\mathit{\theta }){]}_j={\displaystyle \frac{\partial E\left(\theta \right)}{\partial {\theta }_j}}=2{\sum }_{i=1}^N{\mathit{e}}_{\mathit{i}}\left(\mathit{\theta }\right){\displaystyle \frac{\partial e_i\left(\theta \right)}{\partial {\theta }_j}}$$

(19)

This equation is given for the $j$th element of the gradient, and the gradient can also be expressed as follows:

$$\mathsf{\nabla }\mathit{E}\left(\mathit{\theta }\right)=2{\mathit{J}}^T\mathit{e}\left(\mathit{\theta }\right)$$

(20)

In this equation, $e\left(\theta \right)$ denotes the error vector, and $J$ represents the Jacobian matrix, which is expressed as follows:

$$J(\theta )=\left(\begin{array}{cccc}{\displaystyle \frac{\partial e_{11}}{\partial {\theta }_1}}& {\displaystyle \frac{\partial e_{11}}{\partial {\theta }_2}}& ...& {\displaystyle \frac{\partial e_{11}}{\partial {\theta }_N}}\\ {\displaystyle \frac{\partial e_{21}}{\partial {\theta }_1}}& {\displaystyle \frac{\partial e_{21}}{\partial {\theta }_2}}& ...& {\displaystyle \frac{\partial e_{21}}{\partial {\theta }_N}}\\ ⋮& & & \\ {\displaystyle \frac{\partial e_{ij}}{\partial {\theta }_1}}& {\displaystyle \frac{\partial e_{ij}}{\partial {\theta }_2}}& ...& {\displaystyle \frac{\partial e_{ij}}{\partial {\theta }_N}}\end{array}\right)$$

(21)

The Hessian matrix is then expressed as follows:

$${\mathsf{\nabla }}^{\mathbf{2}}\mathit{E}\left(\mathit{\theta }\right)=2{\mathit{J}}^{\mathit{T}}\left(\mathit{\theta }\right)\mathit{J}\left(\mathit{\theta }\right)$$

(22)

By substituting the obtained expressions into (16), the subsequent iteration of the parameter vector ${\mathit{\theta }}_{\mathit{k}+1}$ is updated as follows:

$${\mathit{\theta }}_{\mathit{k}+\mathbf{1}}={\mathit{\theta }}_{\mathit{k}}-\left[{\mathit{J}}^{\mathit{T}}\right({\mathit{\theta }}_{\mathit{k}}\left)\mathit{J}\right({\mathit{\theta }}_{\mathit{k}})+\mathit{\mu }\mathit{I}{]}^{-\mathbf{1}}{\mathit{J}}^{\mathit{T}}({\mathit{\theta }}_{\mathit{k}}\left)\mathit{e}\right({\mathit{\theta }}_{\mathit{k}})$$

(23)

In this equation, $\mathit{I}$ denotes the unit matrix, while $\mathit{\mu }$ serves as a damping factor. Accordingly, as $\mathit{\mu }$ increases, the algorithm behaves more like the steepest descent method, whereas smaller values of $\mathit{\mu }$ make algorithm converge towards the Gauss–Newton method [66]. The parameter $\mathit{\mu }$ is adaptively updated at each iteration according to the condition given below, with $\mathit{\beta }$ kept constant throughout the training.

$${\mathit{\mu }}_{\mathit{k}+\mathbf{1}}=\left\{\begin{array}{c}{\mathit{\mu }}_{\mathit{k}}\mathit{\beta }, \mathit{E}(\mathit{\theta }{)}_{\mathit{k}+\mathbf{1}}<\mathit{E}(\mathit{\theta }{)}_{\mathit{k}}\\ {\displaystyle \frac{{\mathit{\mu }}_{\mathit{k}}}{\mathit{\beta }}}, \mathit{E}(\mathit{\theta }{)}_{\mathit{k}+\mathbf{1}}>\mathit{E}(\mathit{\theta }{)}_{\mathit{k}}\end{array}\right.$$

(24)

In this context, the error function $\mathit{E}\left(\mathit{\theta }\right)$ is iteratively minimized until its value falls below the predefined error target (MSE). The error target is evaluated on the validation dataset, thereby ensuring that the trained network achieves generalization capability rather than simply memorizing the training data. The LM BP initial training parameters employed in this study are summarized in

Table 5. Levenberg–Marquardt back propagation initial training parameters.

Parameter	Value
Maximum Iterations (Epoch)	5000
MSE Goal (Test Error)	1 × 10−4
Minimum Gradient	1 × 10−3
$\mathit{\mu }$	1 × 10−3
$\mathit{\beta }$	10
Time Constraint	No
Maximum Validation Failures	6
Number of Parallel Workers (local machine)	8

, while a flowchart of the LM algorithm within the scope of this work is presented in Figure 9.

Consequently, using the training methodology and parameters defined thus far, the artificial neural networks (ANN-Id and ANN-Iq) with the architectures specified in Table 2 were trained using the dataset detailed in Table 4. Their training performance parameters were then recorded. In the next section a multi-criteria evaluation approach is presented, where the test error is considered together with additional performance measures to ensure a more reliable and application-oriented assessment of the ANN-based controller architectures.

3.3. Evaluation Criteria for Network Selection

Selecting the optimal neural network architecture requires a comprehensive evaluation that goes beyond a single performance metric. While the MSE on the test dataset provides a crucial measure of predictive accuracy, relying on it as the sole criterion can be misleading and may not ensure the model’s robustness or practical utility. The test dataset MSE serves primarily as an initial indicator of a model’s generalization capability. A low test MSE suggests that the model has learned the underlying patterns in the data and is less prone to overfitting. However, it offers no insight into other critical aspects of the model’s performance in a real-world application. For instance, a model with a very low test MSE might still fail to capture critical, high-impact data points or specific operational corner cases that were not sufficiently represented in the test dataset.

To address these limitations, we propose a multi-criteria network selection methodology. This approach complements the test set MSE by incorporating additional key performance indicators:

• Full-load THD Performance: The model’s ability to generalize to full-load conditions is a critical measure of its practical effectiveness. In the context of energy saving management, achieving low THD directly translates to reduced harmonic losses, which is a key performance metric for high-efficiency PV-BSS applications. We consider the THD performance in both active and reactive power regions to ensure robust and reliable operation under varying load conditions.
• Training Time: The computational efficiency of the training process is a significant factor in network selection, particularly for large-scale or real-time applications. A reduced training time is vital for ensuring the practical feasibility and deployment speed of this self-tuning control solution. A model with excellent performance but an excessively long training time may not be a viable solution.

Our proposed method integrates these metrics by normalizing and weighting them, resulting in a single modified loss score. The network with the lowest loss score is then selected as the optimal architecture. This multi-criteria selection method ensures that the chosen model not only provides accurate predictions but also demonstrates superior performance in critical operational areas and has an acceptable computational overhead. This holistic approach provides a more realistic and practical basis for model selection, thereby enhancing the reliability and applicability of the proposed solution. The modified loss function ($ℒ$_mod) proposed in this work is formulated as follows:

$ℒ$_mod = αMSE_test + λ₁THD_active + λ₂THD_reactive + γt_train

(25)

In this function, the coefficients $\alpha$, ${\lambda }_1$, ${\lambda }_2$, and $\gamma$ respectively correspond to the normalized and weighted terms of the test dataset MSE value, full active power THD, full reactive power THD, and the offline training time. For the 20 ANN architectures listed in Table 2, the proposed modified loss function was evaluated in both the full-active and full-reactive operating regions, and the resulting modified loss scores were recorded. The time window used for calculating the current THD was consistently set to five cycles of the grid current across all analyses. For comparison, the current THD values obtained using conventional PI controllers under identical operating conditions are also reported in

Table 6. Grid current THD values obtained using conventional PI controllers.

Name of OR	# of OP	Grid Current THD (%)	Explanations
VarPF	1	4.25	pf = 1
	2	5.25	pf = 0.9
	3	5.52	pf = 0.8
	4	5.56	pf = 0.7
	5	5.42	pf = 0.6
VarP	6	4.25	100% rated power
	7	5.63	80% rated power
	8	7.17	60% rated power
	9	11.70	40% rated power
	10	22.07	20% rated power
VarQ	11	5.60	100% rated power
	12	7.34	80% rated power
	13	10.26	60% rated power
	14	14.70	40% rated power
	15	23.68	20% rated power

.

The training time is expressed in seconds and refers to the duration of offline training carried out in the MATLAB environment using the computational setup specified earlier. By separately evaluating both the full-active and full-reactive regions, the modified loss scores and all other performance metrics defined in (25) were obtained for the candidate ANN architectures. The training results are presented in

Table 7. Proposed ANN-Id controller training results.

Network Number	Network Type	MSE (Test Dataset)	Full Active Power Grid Current THD (%)	Full Reactive Power Grid Current THD (%)	Training Time (s)	Modified Loss (${\mathcal{L}}_{\mathit{m}\mathit{o}\mathit{d}}$)
1	[3]	2.07 × 10−4	3.78	5.68	5.25	1.28
2	[6]	1.52 × 10−4	3.92	5.49	2.74	1.01
3	[9]	6.98 × 10−5	3.81	5.53	2.78	6.41 × 10−1
4	[12]	4.85 × 10−4	4	5.6	2.83	2.48
5	[3 × 3]	1.28 × 10−4	4.02	5.49	8.37	9.82 × 10−1
6	[6 × 6]	1.65 × 10−4	4.12	5.6	4.5	1.10
7	[9 × 9]	5.62 × 10−5	4.13	5.94	12.04	7.34 × 10−1
8	[12 × 12]	6.11 × 10−5	4.15	5.71	3.95	6.37 × 10−1
9	[3 × 6]	7.29 × 10−5	3.97	5.52	8.43	7.39 × 10−1
10	[3 × 9]	1.17 × 10−4	3.86	5.62	5.17	8.87 × 10−1
11	[3 × 12]	9.40 × 10−5	3.97	5.3	5.9	7.91 × 10−1
12	[6 × 3]	7.07 × 10−5	4.15	5.38	12.31	7.87 × 10−1
13	[6 × 9]	4.92 × 10−5	4	5.32	3.02	5.55 × 10−1
14	[6 × 12]	6.62 × 10−5	3.89	5.58	3.13	6.34 × 10−1
15	[9 × 3]	2.43 × 10−4	3.77	5.65	15.245	1.58
16	[9 × 6]	1.56 × 10−4	3.85	5.74	7.02	1.09
17	[9 × 12]	1.56 × 10−4	4	5.2	3.57	1.03
18	[12 × 3]	1.50 × 10−4	3.96	5.38	16.02	1.18
19	[12 × 6]	1.23 × 10−4	3.75	5.53	17.57	1.08
20	[12 × 9]	1.00 × 10−4	3.92	5.48	3.4	7.86 × 10−1

for the ANN-Id controller and in

Table 8. Proposed ANN-Iq controller training results.

Network Number	Network Type	MSE (Test Dataset)	Full Active Power Grid Current THD (%)	Full Reactive Power Grid Current THD (%)	Training Time (s)	Modified Loss (${\mathcal{L}}_{\mathit{m}\mathit{o}\mathit{d}}$)
1	[3]	2.29 × 10−4	3.78	5.68	2.79	1.23
2	[6]	7.44 × 10−5	3.92	5.49	6.05	6.99 × 10−1
3	[9]	3.59 × 10−5	3.81	5.53	16.04	7.38 × 10−1
4	[12]	2.78 × 10−4	4	5.6	2.91	1.43
5	[3 × 3]	1.45 × 10−5	4.02	5.49	12.21	5.89 × 10−1
6	[6 × 6]	1.35 × 10−4	4.12	5.6	3.75	8.99 × 10−1
7	[9 × 9]	1.22 × 10−5	4.13	5.94	2.76	4.17 × 10−1
8	[12 × 12]	6.05 × 10−5	4.15	5.71	3.42	6.10 × 10−1
9	[3 × 6]	6.88 × 10−5	3.97	5.52	3.01	6.23 × 10−1
10	[3 × 9]	2.36 × 10−5	3.86	5.62	3.69	4.60 × 10-1
11	[3 × 12]	1.29 × 10−4	3.97	5.3	4.17	8.71 × 10−1
12	[6 × 3]	6.80 × 10−4	4.15	5.38	9.48	3.10
13	[6 × 9]	3.44 × 10−5	4	5.32	3.1	4.87 × 10−1
14	[6 × 12]	1.93 × 10−5	3.89	5.58	2.9	4.28 × 10−1
15	[9 × 3]	1.10 × 10−4	3.77	5.65	4.09	7.98 × 10−1
16	[9 × 6]	5.90 × 10−4	3.85	5.74	8.08	2.73
17	[9 × 12]	1.76 × 10−4	4	5.2	6.66	1.10
18	[12 × 3]	2.16 × 10−4	3.96	5.38	4.27	1.21
19	[12 × 6]	9.12 × 10−5	3.75	5.53	2.9	6.99 × 10−1
20	[12 × 9]	1.37 × 10−4	3.92	5.48	2.95	8.81 × 10−1

for the ANN-Iq controller. Specifically, the ANN-Id training employed the input–output data $I_{derr}\left(k\right)$, $I_{derr}(k-1)$, $u_d(k-1)$, $u_d\left(k\right)$ as illustrated in Figure 6 and under the operating points defined in Table 4. Similarly, the ANN-Iq training employed $I_{qerr}\left(k\right)$, $I_{qerr}(k-1)$, $u_q(k-1)$ and $u_q\left(k\right)$, under the same conditions.

In both Table 7 and Table 8, the full active and full reactive power grid current THD values are recorded for the case where both ANN-Id and ANN-Iq controllers are implemented using the same architecture specified in the corresponding row. For example, in row 12 of both tables, the THD values (full active and full reactive) obtained with the [6 × 3] configuration represent the results when both ANN-Id and ANN-Iq controllers are implemented with the [6 × 3] architecture.

Regarding the normalization and weighting coefficients used in the modified loss function, each metric was first scaled by the inverse of its average value across all 20 network architectures. This method, a deliberate choice over standard min-max scaling, created a weighting mechanism tailored to our specific problem. Following this, the weights were determined based on the relative importance of each metric. A higher weight was assigned to $MS{E}_{\mathrm{test}}$ (0.6) as the primary indicator of generalization, while equal weights were given to $TH{D}_{\mathrm{active}}$ and $TH{D}_{\mathrm{reactive}}$ (0.15 each), reflecting their critical role in practical performance. To reflect computational efficiency while preventing it from becoming the dominant factor, a relatively small weight (0.1) was assigned to $t_{\mathrm{train}}$. In order to ensure a fair and consistent evaluation, the same set of weightings was applied to both the ANN-Id and ANN-Iq controllers within the modified loss function. This resulted in the following modified loss function formula:

$$\begin{array}{ll}{\mathcal{L}}_{mod}=& \left({\displaystyle \frac{1}{{\overline{MSE}}_{\mathrm{test}}}}\right)\left(0.6\right)MS{E}_{\mathrm{test}}+\left({\displaystyle \frac{1}{{\overline{THD}}_{\mathrm{active}}}}\right)\left(0.15\right)TH{D}_{\mathrm{active}} +\left({\displaystyle \frac{1}{{\overline{THD}}_{\mathrm{reac}}}}\right)(0.15)TH{D}_{\mathrm{reactive}}\\ & +\left({\displaystyle \frac{1}{{\overline{t}}_{\mathrm{train}}}}\right)(0.1)t_{\mathrm{train}}\end{array}$$

(26)

In conclusion, this part of the study aimed to select, from the candidate architectures in Table 7 and Table 8, the ANN-Id and ANN-Iq controllers with the lowest modified loss values. The proposed multi-criteria method identified the [6 × 9] configuration for ANN-Id and the [9 × 9] configuration for ANN-Iq, as they provide the best balance between performance and efficiency.

To provide a clear overview of the development pipeline, the complete end-to-end workflow of the proposed ANN-based self-tuning current controller is illustrated in Figure 10. The diagram covers dataset generation, preprocessing, candidate architecture evaluation, supervised training, post-training verification, and the preparation of the trained networks for real-time deployment. This structured methodology clarifies how the selected ANN models in Table 7 and Table 8 were systematically derived and validated.

3.4. Performance Assessment

In this section, the performance evaluation of the ANN-based current controllers selected through the multi-criteria decision-making method is presented. Specifically, the [6 × 9] MLP architecture was selected for the ANN-Id controller, while the [9 × 9] architecture was chosen for the ANN-Iq controller. Figure 11 and Figure 12 illustrate the evolution of the MSE values during the training process for the [6 × 9] and [9 × 9] networks, respectively.

The artificial neural network for the $I_d$ controller was trained with the LM algorithm to minimize the MSE. As training progressed, the network demonstrated rapid and successful convergence, achieving its best validation performance of 4.9281 × 10⁻⁵ at epoch 10. Training was terminated as this value met the predefined MSE goal of 1 × 10⁻⁴. At the point of termination, the test MSE was recorded at 4.9257 × 10⁻⁵. The close alignment between the validation and test curves, which exhibit a synchronized decrease, provides strong evidence of the network’s robust generalization capabilities. This behavior confirms that the model has effectively learned the core control dynamics and is not overfitting to the training data. Consequently, the resulting network provides a reliable and solid foundation for the $I_d$ current control application.

For the $I_q$ controller, the artificial neural network was trained using the LM algorithm with the objective of minimizing the MSE. The training process showed a strong and rapid convergence, with the network reaching a final validation MSE of 2.1134 × 10⁻⁴. This marked the point of termination, as the validation value had successfully met the predefined MSE goal of 1 × 10⁻⁴. At the time of termination, the test MSE was documented to be an extremely low 1.2260 × 10⁻⁵. A key observation is that the final test MSE proved to be considerably lower than the validation MSE, which strongly indicates the network’s excellent generalization on an unseen dataset. This confirms that the model has not overfit and has effectively learned the core control dynamics. Evidence of this is the synchronized decrease observed in both the validation and test curves. Consequently, the final network provides a reliable and solid foundation for the $I_q$ current control application, similar to $I_d$ current control application.

Figure 13 and Figure 14 present the regression plots (R-Plot) corresponding to the training of the proposed ANN-Id and ANN-Iq controllers, respectively. In both figures, the regression curves for the training, validation, and test datasets are shown separately, providing a comprehensive assessment of the network fitting performance across all data subsets.

The R-Plots for the ANN-Id controller provide strong visual evidence of its exceptional performance. The three subplots reveal a consistent and high degree of correlation between the network’s outputs and the true current targets. This relationship is quantified by the regression-value (R-value), which is observed to be 1 for all datasets. The unity R-value on the training dataset confirms that the network has successfully learned the underlying nonlinear dynamics of $I_d$ current control. Consistent performance on the validation dataset demonstrates that the learning process avoided significant overfitting. On the critical test dataset, the high R-value provides robust evidence that the ANN-Id can generalize its knowledge to new, unseen data. This analysis serves as a compelling visual complement to the low MSE, highlighting the model’s accuracy. The consistent performance across all datasets confirms that the proposed ANN-Id controller provides a highly reliable nonlinear mapping for the $I_d$ current.

Upon examining the R-Plots for the ANN-Iq controller, compelling visual evidence of its exceptional performance is revealed. The three subplots consistently demonstrate a very high degree of correlation between the controller’s outputs and their corresponding true targets. This strong correlation is quantified by the R-value, which was determined to be 1 for all tested datasets. The unity R-value on the training set confirms that the network has fully captured the inherent relationships within the training dataset. The consistent performance observed on the validation dataset demonstrates the effectiveness of the learning process in preventing overfitting. The R-value of 1 on the critical test set provides robust evidence that the ANN-Iq can generalize its learned knowledge to new and completely unseen data. This visual analysis acts as a powerful complement to the low MSE values, showing the model’s accuracy. Overall, the consistent performance across all datasets confirms that the proposed ANN-Iq controller provides a highly reliable nonlinear mapping for the $I_q$ current.

The performance of the ANN-Id controller was further validated through a statistical analysis of its prediction errors. The 95% confidence interval (CI) was calculated using the Normal Approximation Method [67,68], which assumes the error distribution approximates a normal distribution. The resulting interval for the prediction errors was found to be a very narrow [6.164 × 10⁻³, 7.846 × 10⁻³]. The limited width of this interval provides strong statistical evidence that the model’s predictions are consistently reliable and accurate within this specific range. This finding reinforces the robust performance observed in the MSE and R-Plot analyses, collectively proving the proposed controller’s effectiveness and high degree of precision for the $I_d$ current control application.

The performance of the ANN-Iq controller was also statistically validated by analyzing its prediction errors. Using the same statistical method as in the case of ANN-Id controller, a 95% CI was calculated. The analysis revealed a very narrow interval of [−7.389 × 10⁻³, 6.104 × 10⁻³]. A key finding is that this interval spans zero, which indicates the model’s predictions are reliable with a negligible bias. This statistical evidence directly reinforces the strong performance seen in the MSE and R-plot analyses. Overall, the proposed controller’s effectiveness and high precision for the $I_q$ current are clearly proven.

4. Simulation Studies

4.1. Steady-State Performance and THD Analysis

In this section, the detailed simulation studies and analysis results conducted in MATLAB/Simulink are presented to evaluate the application of the proposed ANN-based current control method in a 3L-HANPC inverter. The studies specifically aim to validate the strategy’s suitability for Energy Saving Management in PV-BSS. Figure 15 illustrates the diagram of the “fundamental operational” simulation blocks corresponding to the proposed control strategy. As shown, the diagram includes the THIPWM block, the SPWM-based modulation block, the power stage block comprising the 3L-HANPC and the LCL filter, the grid-connection block, the modulation signal generation block, and the transformation calculation block. Collectively, these blocks constitute the power stage of the 3L-HANPC inverter under study and provide the generation of fundamental modulation signals in accordance with the P–Q control principles.

In the block diagram presented in Figure 16, both the current control block incorporating the proposed method and the capacitor imbalance PI controller are included. Notably, the current control section of this block provides the necessary tools for defining and generating the operating regions (VarP, VarQ, VarPF) that were employed during the training and testing phases of the proposed ANN-based controllers.

The current control block essentially consists of both the conventional PI controller and the proposed ANN-based controller. The detailed structure of this block, which incorporates the ANN controllers designed according to the proposed methodology, is illustrated in Figure 17. A switching mechanism enables seamless transition between the classical PI and the ANN-based controllers. While the PI controller is implemented as two separate blocks for the $I_d$ and $I_q$ currents, the proposed ANN-based current controller comprises two independently trained neural networks corresponding to $I_d$ and $I_q$ regulation. The interconnections and configurations of all simulation blocks were established in accordance with the control strategy previously introduced in Figure 6. The specifications of the simulation parameters were also provided earlier in Table 3.

To evaluate the performance of the proposed ANN-based controllers, the THD values of the currents injected into grid were analysed at all operating points used for the training dataset. The THD values of the grid current obtained from simulations using the conventional PI controller were previously presented in Table 6. In contrast,

Table 9. THD comparison of the PI and ANN controllers for enhanced energy management under trained operating conditions.

Name of OR	# of OP	PI Control THD (%)	ANN Control THD (%)	Explanations
VarPF	1	4.25	4.04	pf = 1
	2	5.25	5.17	pf = 0.9
	3	5.52	5.44	pf = 0.8
	4	5.56	5.42	pf = 0.7
	5	5.42	5.52	pf = 0.6
VarP	6	4.25	4.04	100% rated power
	7	5.63	5.47	80% rated power
	8	7.17	7.38	60% rated power
	9	11.70	12.25	40% rated power
	10	22.07	20.69	20% rated power
VarQ	11	5.60	5.47	100% rated power
	12	7.34	7.04	80% rated power
	13	10.26	10.26	60% rated power
	14	14.70	15.18	40% rated power
	15	23.68	25.78	20% rated power

provides a comparative analysis, presenting the grid phase-A current THD values obtained with the proposed ANN-based controller at the same operating points. The time window used for this analysis was consistent for both methods, starting at the 0.1-s and lasting for 5 cycles. This approach ensures a fair and accurate comparison between the two control strategies.

The results presented in Table 9 clearly demonstrate that the proposed ANN-based current controller exhibits enhanced harmonic mitigation compared to the conventional PI controller across various trained operating conditions. The findings, therefore, confirm the effectiveness and adaptability of the proposed ANN approach, which directly contributes to reducing harmonic losses and enhancing overall system efficiency for energy saving management. While both controllers experienced an increase in THD under challenging low-load conditions, the ANN controller’s performance remained comparable to the PI counterpart, suggesting this behavior is inherent to the system dynamics. Following these results, the self-tuning capability of the proposed controller, essential for autonomous energy management, was further evaluated by assessing its generalization ability at randomly selected operating points that were not included in the training dataset. The grid current THD comparisons for these specified randomly selected regions are given in

Table 10. Grid current THD comparison for self-tuning control validation at unseen operating points.

Name of OR	PI Control THD (%)	ANN Control THD (%)	Explanations
VarPF	4.86	4.81	pf = 0.93
	5.35	4.95	pf = 0.88
	5.19	5.51	pf = 0.85
	5.74	5.60	pf = 0.75
	5.54	5.37	pf = 0.65
VarP	4.92	4.48	90% rated power
	6.17	6.28	75% rated power
	6.41	6.16	73% rated power
	9.09	8.73	50% rated power
	15.91	15.08	30% rated power
VarQ	6.06	5.99	90% rated power
	8.85	8.89	70% rated power
	9.23	8.99	65% rated power
	11.24	10.60	55% rated power
	20.76	19.46	25% rated power

.

The results presented in Table 10 demonstrate the strong generalization capability of the proposed ANN controller. Across various power factor, active, and reactive power operating regions, the ANN controller consistently exhibited lower or comparable THD values compared to its PI counterpart. Specifically, the ANN-based method achieved a more effective reduction in grid current harmonics, even in unseen, low-power scenarios. These findings confirm that the controller is capable of accurately generalizing its learned behavior to new conditions, solidifying its foundation as a reliable and adaptable self-tuning control solution for dynamic PV-BSS applications.

In both Table 9 and Table 10, the THD values remain within a relatively narrow band when the power factor is varied between 1.0 and 0.6, indicating that low power factor operation does not significantly deteriorate the harmonic performance, and the ANN closely tracks the PI controller in these cases. The pronounced increase in THD is mainly observed at light-load operating points, i.e., below approximately 60% of the rated active or reactive power, where both controllers exhibit similarly degraded performance. At such low current levels, the effective signal-to-noise ratio and numerical resolution of the current measurements are reduced, and the training data become less dense around these operating points, making them inherently more difficult for the ANN to approximate accurately. For the sake of a fair and practically relevant comparison, a single set of PI current-controller gains was used across all operating points; therefore, the PI controller was not re-tuned for each low-load condition, which naturally contributes to its increased THD in this region and is partly inherited by the ANN through the training data. In addition to these factors, light-load operation typically corresponds to low modulation indices, where the relative amplification of filter resonance effects becomes more pronounced, further impacting the harmonic quality for both controllers. This behavior can be mitigated in future work by increasing the sampling density at low-current operating points or by applying a weighted loss function that emphasizes accuracy in the light-load region.

To visually support the consistency of the proposed ANN controller performance under different operating conditions, the obtained THD values and grid current waveforms are presented in Figure 18 and Figure 19. Figure 18 illustrates the performance under three trained conditions, while Figure 19 visualizes the generalization capability at three distinct operating points from the untrained regions.

4.2. Dynamic Performance Analysis

To assess the dynamic performance of the proposed strategy, a step change in the power factor reference (from 0.9 to 0.8) was introduced at t = 0.4 s, with the resulting grid phase-A current waveforms illustrated in Figure 20. The graph demonstrates a clear superiority of the ANN controller (orange line) over the PI controller (blue line) in transient operation. Specifically, the ANN controller reaches the new steady-state condition faster and exhibits notably less overshoot compared to the PI control, which shows a higher peak current and prolonged oscillations during the transition period. This faster and more damped response confirms that the ANN enhances the dynamic stability of the 3L-HANPC converter against abrupt changes in operating conditions, a crucial requirement for BSS charge/discharge cycles in energy management systems. This robust dynamic behavior is crucial for real-world grid applications and further validates the ANN controller’s self-tuning capability.

To strengthen the performance evaluation and demonstrate the controller’s ability to operate reliably beyond its trained operating envelope, the dynamic response was additionally examined under a disturbance scenario that was intentionally excluded from the ANN training dataset. Specifically, a 30% grid-voltage sag was introduced between t = 0.10 s and t = 0.20 s while the converter was operating at a power factor of 0.9, corresponding to reference currents of $I_{dref}=114 \mathrm{A}$ and $I_{qref}=55 \mathrm{A}$. This test provides a representative example of grid faults and voltage imbalances that the ANN has never encountered during learning. Figure 21 presents the resulting d– and q–axis current responses, where the shaded region indicates the sag interval and the red dashed insets highlight the transient behavior at both the onset and the clearance of the fault.

At sag initiation, both controllers experience a brief transient due to the sudden drop in grid voltage; however, the ANN-controlled system maintains a well-bounded and physically coherent response. The zoomed insets show that the ANN waveform remains closely aligned with that of the PI controller, exhibiting no signs of destabilizing overshoot, high-frequency bursts, or non-physical waveform distortions despite the fact that this fault scenario lies entirely outside the ANN’s training range.

A similarly consistent performance is observed during sag clearance. As the grid voltage recovers, both controllers return rapidly to their pre-disturbance current envelopes. Minor deviations in ripple characteristics are visible between the ANN and PI responses, which are expected due to the ANN’s learned non-linear mapping. Importantly, the ANN does not amplify the disturbance or introduce additional harmonic content; instead, it preserves the damping behavior and stability margins of the inner current loop.

Throughout the entire sag interval, the steady-state amplitudes and envelope shapes of both $I_d$ and $I_q$ remain closely matched between the ANN and PI controllers. No divergence, instability, or loss of synchronism is observed. These results confirm that the proposed ANN controller exhibits robust generalization capability, maintaining stable, grid-compatible current regulation even under severe and previously unseen grid-voltage disturbances at a non-unity power factor.

Beyond the transient response analysis, the potential interaction between the ANN-based inner current loop and the capacitor-voltage balancing loop was also examined from a stability perspective. A key concern is whether the higher dynamic bandwidth of the ANN could adversely influence the slower balancing mechanism. In the proposed converter architecture, these loops are inherently decoupled due to their strong separation in time scales. The ANN current controller operates at the switching frequency and provides fast regulation characteristic of high-bandwidth current control, whereas the capacitor-voltage balancing controller acts on DC-link capacitor voltages that are intentionally averaged over several cycles of the grid fundamental frequency, resulting in a much slower dynamic response in the tens-of-hertz range.

Because of this pronounced spectral separation, the fast transient actions of the ANN are naturally filtered by the slow dynamics of the outer-loop controller, while the balancing PI regulator generates only gradual offset commands that appear to the ANN as quasi-static operating-point variations. Across all tested operating scenarios, including the 30% sag event, the capacitor voltages remained within acceptable limits, with no evidence of sustained oscillations, low-frequency resonances, or adverse loop interaction. These results confirm that the enhanced dynamic speed of the ANN current controller does not compromise the stability of the capacitor-voltage balancing mechanism.

4.3. Computational Burden and Real-Time Implementation Analysis

The successful deployment of any advanced control strategy, such as the proposed Artificial Neural Network (ANN), is intrinsically linked to its computational feasibility and real-time execution performance on the target hardware. To fully validate the practical applicability of the proposed solution, a comprehensive analysis of the memory footprint and latency requirements for the selected ANN controllers (ANN-Id: [6 × 9] and ANN-Iq: [9 × 9]) is presented in this section. This analysis serves to justify the minimal increase in computational complexity by demonstrating the solution’s robust real-time performance relative to both specialized Digital Signal Processors (DSPs) and high-performance microcontroller units (MCUs).

4.3.1. Memory Footprint Analysis

The total memory required to store the ANN model is determined by the number of trainable weights ($\mathit{w}$) and biases ($\mathit{b}$). This count, referred to as the total number of parameters (P_x, where $x=d,q$), is critical for evaluating the memory requirements on the target hardware (MCUs/DSPs). Our control scheme utilizes two separate networks, both structured as an MLP with two hidden layers. The total parameters (P_x) for a network with L layers is calculated as the sum of all weights and biases across all connections:

$$P=\underset{\mathrm{Total} \mathrm{weights}, w_{\mathrm{total}}}{\underbrace{{\sum }_{i=0}^{L-1}(N_i\times N_{i+1})}}+\underset{\mathrm{Total} \mathrm{biases}, b_{\mathrm{total}}}{\underbrace{{\sum }_{i=1}^L{N}_i}}$$

(27)

where N_i represents the number of neurons in layer i, N₀ = N_in (input neurons), and the summation spans from the input layer to the output layer (L = 3 for our two hidden layers and one output layer). The calculated parameter totals are as follows:

ANN-Id: P_d = 87 (weights) + 16 (Biases) = 103

(28)

ANN-Iq: P_d = 126 (weights) + 19 (Biases) = 145

(29)

The total parameter count for the integrated control system is $P_{total}=P_d+P_q=248$. For hardware implementation, the parameters are typically stored using 32-bit (4-byte) floating-point precision. Therefore, the total required memory footprint is calculated as:

$$\mathrm{Total} \mathrm{Memory}=248 \mathrm{parameters}\times 4 \mathrm{bytes}/\mathrm{parameter}=992 \mathrm{Bytes}$$

(30)

The resulting memory requirement is approximately 1 kB. This small footprint is easily accommodated by the Static Random-Access Memory (SRAM) of standard power electronics hardware, including the high-performance STM32H7 series MCUs and modern DSPs, confirming the storage feasibility of the ANN model.

4.3.2. Latency and Computational Feasibility

The computational burden (number of operations) is quantified by the total Floating-Point Operations (FLOPs) required for a single forward-pass inference,

$$F_{\mathrm{total}}=F_{\mathrm{Core}}+F_{\mathrm{Activation}}$$

(31)

• Calculation of  $F_{\mathrm{Core}}$  (Core Operations)

The $F_{\mathrm{Core}}$ cost consists of all floating-point multiplications (M), additions (A), and bias summation. Based on the two selected network architectures (ANN-Id [6 × 9] and ANN-Iq [9 × 9]) in this study, the calculations are as follows:

• Total Multiplications ($M_{\mathrm{Total}}$):

$$M_{\mathrm{Total}}=\underset{{ANN-I}_d \mathrm{weights}}{\underbrace{(4\times 6+6\times 9+9\times 1)}}+\underset{ANN-I_q \mathrm{weights}}{\underbrace{(4\times 9+9\times 9+9\times 1)}}=87+126=213 \mathrm{Multiplications}$$

(32)

• Total Additions ($A_{\mathrm{Total}}$):

This includes all sums from the weight multiplication results and the bias additions:

$$A_{\mathrm{Total}}=\underset{\mathrm{from} \mathrm{Multiplications}}{\underbrace{213}}+\underset{\mathrm{from} \mathrm{Biases}}{\underbrace{35}}=248 \mathrm{Additions}$$

(33)

Thus, the Core Operation Cost is calculated as $F_{\mathrm{Core}}=213\left(M\right)+248\left(A\right)=461$ FLOPs.

• Calculation of  $F_{\mathrm{total}}$  (Total FLOPs)

Given that the output layers utilize a linear activation function, the cost calculation for is $F_{\mathrm{Activation}}$ based solely on the 33 non-linear neurons in the hidden layers. The cost associated with transcendental functions, such as tansig is substantially higher than basic arithmetic on embedded platforms. Based on prior studies analyzing activation function implementations in high-performance microcontrollers [69], the cost of evaluating tansig is conservatively estimated to be 15 FLOPs per activation.

$$F_{\mathrm{Activation}}=33 Neurons\times 15{\displaystyle \frac{FLOPs}{Neuron}}=495 FLOPs$$

(34)

The total computational burden required for one complete inference cycle is thus conservatively estimated as

$$F_{\mathrm{Total}}=F_{\mathrm{Core}}+F_{\mathrm{Activation}}=461+495=956 \mathrm{FLOPs}$$

(35)

Given the actual switching frequency ($f_{\mathrm{sw}}$) of 32 kHz, the available control period is 31.25 µs. To demonstrate feasibility, we reference a modern, high-performance MCU, such as the STM32H723ZGT6 (Cortex-M7 core with FPU, 550 MHz). Leveraging the processor’s high clock speed and efficient single-cycle Floating-Point Unit (FPU), the estimated execution time for the 956 FLOPs is confirmed to be significantly less than 3 µs. This fast execution time ensures that the latency requirements consume less than 10% of the control period, allowing the ANN to run in a highly deterministic manner necessary for high-frequency power electronics applications.

4.3.3. Justification Against Simpler Techniques

To provide a comprehensive justification for the implementation feasibility, it is necessary to contextualize the proposed ANN controller against other highly effective adaptive techniques. The literature presents various robust methods, such as the Adaptive Filtering Damping (AFD) approach, which offers an elegant and highly efficient solution for LCL filter resonance damping, as detailed in the esteemed work [70].

Techniques like AFD are specialized, model-aware solutions designed to solve localized stability problems (for example LCL resonance damping). It is acknowledged that this specialization inherently results in a lower computational burden compared to a full ANN inference. However, this comparison must account for the scope of control and the desired level of system autonomy.

In contrast, the ANN-based controller proposed in this study serves a broader, more autonomous objective: to provide a model-free, global current controller tasked with the full optimization of the d-q axis currents (THD minimization, dynamic response) across all operating points. This model-free approach and its inherent self-tuning capability necessitate a different computational structure compared to specialized, model-aware damping techniques.

As demonstrated in previous subsections, the ANN’s total computational burden (nearly 950 FLOPs, resulting in < 3 µs latency) is minimal and confirmed to be highly feasible for the 32 kHz control loop on modern hardware. Therefore, this marginal increase in computational cost is considered a justifiable trade-off to achieve a controller with global performance optimization, model-independence, and inherent self-tuning capability, features that simpler, specialized damping techniques do not offer.

Finally, addressing the broader applicability of this methodology, the proposed ANN-based approach is inherently scalable and portable. For larger or higher-power inverter systems, the fundamental d-q current control structure remains consistent. While increased system complexity might necessitate a slightly larger network architecture, the corresponding increase in computational burden (for example, 2000–2500 FLOPs) remains well within the capacity of modern MCUs (for example, executing in 6–7 µs), confirming the methodology’s scalability. The primary advantage of the ANN’s model-free nature is its portability. If this methodology were applied to a different inverter topology, the core control architecture and hardware implementation would remain identical. The only required step would be re-training the network using new data generated from the target plant. This confirms the feasibility for diverse power electronics applications.

The extensive simulation results, including static THD comparisons under trained and untrained conditions and a dynamic step-change analysis, have collectively validated the superiority of the proposed ANN controller. The findings confirm that the ANN approach significantly enhances grid current quality and provides a faster, more stable dynamic response for the 3L-HANPC converter compared to the conventional PI method. Finally, the proven ability of the ANN to accurately generalize its learned behavior to unfamiliar operating points further solidifies its value for self-tuning control. Given this comprehensive and robust validation, the following Conclusions section summarizes the key contributions of this work and discusses its impact on future research.

5. Conclusions

In this paper, a novel ANN-based current control strategy was successfully implemented for a 3L-HANPC inverter, serving as a self-tuning alternative to the conventional PI approach. The fundamental objective of this work was to address the critical demand for adaptive control within PV-BSS. By employing a multi-criteria selection methodology, the optimal MLP architectures for the $I_d$ and $I_q$ controllers were determined, effectively balancing training accuracy, THD, and computational efficiency. The subsequent training process, which utilized the LM backpropagation algorithm, ensured rapid convergence and secured strong generalization capability.

Comprehensive simulation studies verified that the ANN-based controller achieves enhanced harmonic mitigation compared to the PI method, directly translating to reduced harmonic losses and improved system efficiency across a broad operational range. Furthermore, the ANN controller demonstrated markedly faster transient responses with significantly reduced overshoot, thereby enhancing dynamic stability, which is an essential requirement for BSS charge and discharge cycles.

Crucially, the proposed methodology successfully eliminates the need for time-consuming, iterative PI parameter tuning while maintaining exceptional steady-state and transient performance. The verified ability of the ANN controller to generalize effectively to unseen operating points further substantiates its applicability for dynamic PV-BSS environments and autonomous energy management systems.

As a logical continuation of this work, future research efforts will focus on achieving experimental validation through hardware implementation, aiming to confirm the effectiveness of the proposed control strategy in real-world hybrid energy storage applications. Although this study focuses on a simulation-based evaluation of the proposed ANN current controller, the complete training–deployment workflow presented in Figure 10 enables straightforward integration into a real-time embedded MCU environment. Validating the approach on a hardware prototype under practical grid conditions (for example, harmonic distortions, voltage sags, and resonance-prone LCL interfaces) is planned as future work to experimentally confirm the generalization and robustness demonstrated in the simulations.